BCM8320 System Architecture
•Guaranteed Class of Service through the system –
fabric interface chip (BCM8320) schedules based on
destination, while the fabric switch chip (BCM8332)
schedules based on source. QoS can be set on a
source/destination basis with no interference from
other channels.
•Supports dual 10G interfaces in a single device.
•Excellent redundancy: all links that are used are
always active. N-1, N+1, and N¥2 redundancy modes
are all supported – no software intervention is
necessary.
•Automatic link failure detection – no software
intervention is necessary.
•Integrated SerDes provides a cost-effective and power-
conscious solution.
SUMMARY OF BENEFITS
DUAL 10G FABRIC INTERFACE
•Highly integrated, scalable switch fabric
•Single-chip bandwidth of up to 40 Gbps
•Supports two CSIX interfaces to line side
• Each CSIX supports 32, 64, or 128 bits at speeds up to
166 MHz
• HSTL Class 1 drivers
• Optional out-of-band flow control
• Four Egress Queues per CSIX interface
•96-byte or 112-byte payloads
•Flexible fabric speedup and redundancy schemes
• Additional speedup to handle Cell Size + 1 byte case
• Link failure causes graceful reduction in speed-up
•Support for 16k Multicast Groups
• Full multicast group ID carries through the fabric
•Static or dynamic configurable VOQ cell buffering
•Single level or hierarchical Weighted Round Robin
scheduling
•Proven high-speed 3.125 Gbps SerDes technology
• Built-in BERT
• SerDes runs over backplane or infiniband cables
•16-bit CPU interface @ up to 66 MHz