IRFB41N15DPbF
IRFIB41N15DPbF
IRFS41N15DPbF
IRFSL41N15DPbF
1 2017-04-27
Absolute Maximum Ratings
Symbol Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 41
A
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 29
IDM Pulsed Drain Current 164
PD @TA = 25°C Maximum Power Dissipation D2-Pak 3.1
W
PD @TC = 25°C Maximum Power Dissipation TO-220 200
PD @TC = 25°C Maximum Power Dissipation TO-220 Full-Pak 48
Linear Derating FactorTO-220 1.3
Linear Derating FactorTO-220 Full-Pak 0.32
VGS Gate-to-Source Voltage ± 30 V
dv/dt Peak Diode Recovery dv/dt 2.7 V/ns
TJ Operating Junction and -55 to + 175
TSTG Storage Temperature Range °C
Soldering Temperature, for 10 seconds (1.6mm from case) 300
Mounting torque, 6-32 or M3 screw 10 lbf•in (1.1N•m)
W/°C
Thermal Resistance
Symbol Parameter Typ. Max. Units
RJC Junction-to-Case ––– 0.75
°C/W
RJC Junction-to-Case, TO-220 Full-Pak ––– 3.14
RCS Case-to-Sink, Flat, Greased Surface 0.50 –––
RJA Junction-to-Ambient,TO-220 ––– 62
RJA Junction-to-Ambient, TO-220 Full-Pak ––– 65
RJA Junction-to-Ambient,D2-Pak ––– 40
D2 Pak
IRFS41N15DPbF
G D S
Gate Drain Source
Applications
High frequency DC-DC converters
S
D
G
S
D
G
D
TO-262 Pak
IRFSL41N15DPbF
HEXFET® Power MOSFET
S
D
G
TO-220AB
IRFB41N15DPbF
Base part number Package Type Standard Pack Orderable Part Number
Form Quantity
IRFB41N15DPbF TO-220 Tube 50 IRFB41N15DPbF
IRFSL41N15DPbF TO-262 Tube 50 IRFSL41N15DPbF
IRFIB41N15DPbF TO-220 Full-Pak Tube 50 IRFIB41N15DPbF
IRFS41N15DPbF D2-Pak Tube 50 IRFS41N15DPbF
Tape and Reel Left 800 IRFS41N15DTRLPbF
Benefits
Low Gate-to-Drain Charge to Reduce
Switching Losses
Fully Characterized Capacitance Including
Effective COSS to Simplify Design, (See App.
Note AN1001)
Fully Characterized Avalanche Voltage
and Current
Lead-Free
VDSS 150V
RDS(on) max 0.045
ID 41A
G
D
S
TO-220 Full-Pak
IRFB41N15DPbF
IRFB/IB/S/SL41N15DPbF
2 2017-04-27
Notes:
Repetitive rating; pulse width limited by max. junction temperature.
starting TJ = 25°C, L = 1.5mH, RG = 25, IAS = 25A.
I
SD 25A, di/dt 340A/µs, VDD V(BR)DSS, TJ 175°C.
Pulse width 300µs; duty cycle 2%.
C
oss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS.
This is only applied to TO-220AB package.
This is applied to D2Pak, when mounted on 1" square PCB (FR-4 or G-10 Material ). For recommended footprint and
soldering techniques refer to application note #AN-994.
Static @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 150 ––– ––– V VGS = 0V, ID = 250µA
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient ––– 0.17 ––– V/°C Reference to 25°C, ID = 1mA
RDS(on) Static Drain-to-Source On-Resistance ––– ––– 0.045  VGS = 10V, ID = 25A
VGS(th) Gate Threshold Voltage 3.0 ––– 5.5 V VDS = VGS, ID = 250µA
IDSS Drain-to-Source Leakage Current ––– ––– 25 µA VDS = 150 V, VGS = 0V
––– ––– 250 VDS = 120V,VGS = 0V,TJ =150°C
IGSS Gate-to-Source Forward Leakage ––– ––– 100 nA VGS = 30V
Gate-to-Source Reverse Leakage ––– -100 VGS = -30V
Dynamic @ TJ = 25°C (unless otherwise specified)
gfs Forward Trans conductance 18 ––– ––– S VDS = 50V, ID = 25A
Qg Total Gate Charge ––– 72 110 ID = 25A
Qgs Gate-to-Source Charge ––– 21 31 VDS = 120V
Qgd Gate-to-Drain Charge ––– 35 52 VGS = 10V
td(on) Turn-On Delay Time ––– 16 –––
ns
VDD = 75V
tr Rise Time ––– 63 ––– ID = 25A
td(off) Turn-Off Delay Time ––– 25 ––– RG= 2.5
tf Fall Time ––– 14 ––– VGS = 10V
Ciss Input Capacitance ––– 2520 –––
pF
VGS = 0V
Coss Output Capacitance ––– 510 ––– VDS = 25V
Crss Reverse Transfer Capacitance ––– 110 ––– ƒ = 1.0MHz
Coss Output Capacitance ––– 3090 ––– VGS = 0V, VDS = 1.0V ƒ = 1.0MHz
Coss Output Capacitance ––– 230 ––– VGS = 0V, VDS = 120V ƒ = 1.0MHz
Coss eff. Effective Output Capacitance ––– 250 ––– VGS = 0V, VDS = 0V to 120V
nC
Diode Characteristics
Parameter Min. Typ. Max. Units Conditions
IS Continuous Source Current ––– ––– 41
A
MOSFET symbol
(Body Diode) showing the
ISM Pulsed Source Current ––– ––– 164 integral reverse
(Body Diode) p-n junction diode.
VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C,IS = 25A,VGS = 0V 
trr Reverse Recovery Time ––– 170 260 ns TJ = 25°C ,IF = 25A
Qrr Reverse Recovery Charge ––– 1.3 1.9 C di/dt = 100A/µs 
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Avalanche Characteristics
Parameter Typ. Max. Units
EAS Single Pulse Avalanche Energy ––– 470 mJ
IAR Avalanche Current ––– 25 A
EAR Repetitive Avalanche Energy ––– 20 mJ
IRFB/IB/S/SL41N15DPbF
3 2017-04-27
Fig. 2 Typical Output Characteristics
Fig. 3 Typical Transfer Characteristics Fig. 4 Normalized On-Resistance
vs. Temperature
Fig. 1 Typical Output Characteristics
1
10
100
1000
0.1 1 10 100
20µs PULSE WIDTH
T = 25 C
J°
TOP
BOTTOM
VGS
15V
10V
9.0V
8.0V
7.5V
7.0V
6.5V
6.0V
V , Drain-to-Source Voltage (V)
I , Drain-to-Source Current (A)
DS
D
6.0V
1
10
100
1000
0.1 1 10 100
20µs PULSE WIDTH
T = 175 C
J°
TOP
BOTTOM
VGS
15V
10V
9.0V
8.0V
7.5V
7.0V
6.5V
6.0V
V , Drain-to-Source Voltage (V)
I , Drain-to-Source Current (A)
DS
D
6.0V
1
10
100
1000
6 7 8 9 10 11
V = 25V
20µs PULSE WIDTH
DS
V , Gate-to-Source Voltage (V)
I , Drain-to-Source Current (A)
GS
D
T = 25 C
J°
T = 175 C
J°
-60 -40 -20 020 40 60 80 100 120 140 160 180
0.0
0.5
1.0
1.5
2.0
2.5
3.0
T , Junction Temperature ( C)
R , Drain-to-Source On Resistance
(Normalized)
J
DS(on)
°
V =
I =
GS
D
10V
41A
IRFB/IB/S/SL41N15DPbF
4 2017-04-27
Fig 5. Typical Capacitance vs.
Drain-to-Source Voltage
Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge vs.
Gate-to-Source Voltage
110 100 1000
VDS, Drain-to-Source Voltage (V)
10
100
1000
10000
100000
C, Capacitance(pF)
Coss
Crss
Ciss
VGS = 0V, f = 1 MHZ
Ciss = C gs + Cgd, C ds SHORTED
Crss = C gd
Coss = Cds + Cgd
020 40 60 80 100 120
0
4
8
12
16
20
Q , Total Gate Charge (nC)
V , Gate-to-Source Voltage (V)
G
GS
FOR TEST CIRCUIT
SEE FIGURE
I =
D
13
25A
V = 30V
DS
V = 75V
DS
V = 120V
DS
0.1
1
10
100
1000
0.2 0.6 1.0 1.4 1.8
V ,Source-to-Drain Voltage (V)
I , Reverse Drain Current (A)
SD
SD
V = 0 V
GS
T = 25 C
J°
T = 175 C
J°
Fig. 7 Typical Source-to-Drain Diode
Forward Voltage
1
10
100
1000
1 10 100 1000
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
Single Pulse
T
T
= 175 C
= 25 C
°
°
J
C
V , Drain-to-Source Voltage (V)
I , Drain Current (A)I , Drain Current (A)
DS
D
10us
100us
1ms
10ms
IRFB/IB/S/SL41N15DPbF
5 2017-04-27
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 9. Maximum Drain Current vs. Case Temperature
Fig 10a. Switching Time Test Circuit
Fig 10b. Switching Time Waveforms
25 50 75 100 125 150 175
0
10
20
30
40
50
T , Case Temperature ( C)
I , Drain Current (A)
°
C
D
0.01
0.1
1
10
0.00001 0.0001 0.001 0.01 0.1 1
Notes:
1. Duty factor D = t / t
2. Peak T = P x Z + T
1 2
JDM thJC C
P
t
t
DM
1
2
t , Rectangular Pulse Duration (sec)
Thermal Response (Z )
1
thJC
0.01
0.02
0.05
0.10
0.20
D = 0.50
SINGLE PULSE
(THERMAL RESPONSE)
IRFB/IB/S/SL41N15DPbF
6 2017-04-27
Fig 12a. Unclamped Inductive Test Circuit
Fig 12b. Unclamped Inductive Waveforms
R
G
I
AS
0.01
t
p
D.U.T
L
VDS
+
-V
DD
DRIVER
A
15V
20V
tp
V
(BR)DSS
I
AS
Fig 13b. Gate Charge Test Circuit
Fig 13a. Gate Charge Waveform
25 50 75 100 125 150 175
0
200
400
600
800
1000
1200
Starting T , Junction Temperature ( C)
E , Single Pulse Avalanche Energy (mJ)
J
AS
°
ID
TOP
BOTTOM
10A
21A
25A
Fig 12c. Maximum Avalanche Energy
vs. Drain Current
IRFB/IB/S/SL41N15DPbF
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Fig 14. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs
IRFB/IB/S/SL41N15DPbF
8 2017-04-27
TO-220AB Package Outline (Dimensions are shown in millimeters (inches))
TO-220AB Part Marking Information
IN T E R N A T IO N A L PART NUMBER
R E C T IF IE R
LO T C O DE
ASSEM BLY
LO G O
YEAR 0 = 2000
DATE CODE
W EEK 19
LIN E C
LOT CODE 1789
E X A M P L E : T H IS IS A N IR F 1 0 1 0
N o te : "P " in a s s e m b ly lin e p o s itio n
indicates "Lead - Free"
IN TH E ASSEM BLY LINE "C "
ASSEM BLED O N W W 19, 2000
TO-220AB packages are not recommended for Surface Mount Application.
Note: For the most current drawing please refer to website at http://www.irf.com/package/
IRFB/IB/S/SL41N15DPbF
9 2017-04-27
TO-220 Full-Pak Package Outline (Dimensions are shown in millimeters (inches))
TO-220 Full-Pak Part Marking Information
TO-220AB Full-Pak packages are not recommended for Surface Mount Application.
Note: For the most current drawing please refer to website at http://www.irf.com/package/
IRFB/IB/S/SL41N15DPbF
10 2017-04-27
D2-Pak (TO-263AB) Part Marking Information
D2-Pak (TO-263AB) Package Outline (Dimensions are
shown in millimeters (inches))
DATE CODE
YEAR 0 = 2000
WEEK 02
A = ASSEMBLY SITE CODE
RECTIFIER
INTERNATIONAL PART NUMBER
P = DESIGNATES LEAD - FREE
PRODUCT (OPTIONAL)
F530S
IN THE ASSEMBLY LINE "L"
ASSEMBLED ON WW 02, 2000
THIS IS AN IRF530S WITH
LOT CODE 8024 INTERNATIONAL
LOGO
RECTIFIER
LOT CODE
ASSEMBLY YEAR 0 = 2000
PART NUMBER
DATE CODE
LINE L
WEEK 02
OR
F530S
LOGO
ASSEMBLY
LOT CODE
Note: For the most current drawing please refer to website at http://www.irf.com/package/
IRFB/IB/S/SL41N15DPbF
11 2017-04-27
TO-262 Part Marking Information
TO-262 Package Outline (Dimensions are shown in millimeters (inches)
LOGO
RECTI FI ER
INTERNATIONAL
LOT CODE
ASSEMBLY
LOGO
RECTI FI ER
INTERNATIONAL
DATE CODE
WEEK 19
YEAR 7 = 1997
PART NUMBER
A = ASSEMBLY SITE CODE
OR
PRODUCT ( OPTIONAL)
P = DESIGNATES LEAD- FREE
EXAMPLE: THIS IS AN I RL3103L
LOT CODE 1789
ASSEMBLY
PART NUMBER
DATE CODE
WEEK 19
LINE C
LOT CODE
YEAR 7 = 1997
ASSEMBLED ON WW 19, 1997
IN THE ASSEMBLY LINE "C"
Note: For the most current drawing please refer to website at http://www.irf.com/package/
IRFB/IB/S/SL41N15DPbF
12 2017-04-27
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
D2-Pak (TO-263AB) Tape & Reel Information (Dimensions are shown in millimeters (inches))
3
4
4
TRR
FEED DIRECTION
1.85 (.073)
1.65 (.065)
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
TRL
FEED DIRECTION
10.90 (.429)
10.70 (.421)
16.10 (.634)
15.90 (.626)
1.75 (.069)
1.25 (.049)
11.60 (.457)
11.40 (.449) 15.42 (.609)
15.22 (.601)
4.72 (.136)
4.52 (.178)
24.30 (.957)
23.90 (.941)
0.368 (.0145)
0.342 (.0135)
1.60 (.063)
1.50 (.059)
13.50 (.532)
12.80 (.504)
330.00
(14.173)
MAX.
27.40 (1.079)
23.90 (.941)
60.00 (2.362)
MIN.
30.40 (1.197)
MAX.
26.40 (1.039)
24.40 (.961)
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
IRFB/IB/S/SL41N15DPbF
13 2017-04-27
Qualification Information
Qualification Level Industrial
(per JEDEC JESD47F)
TO-220AB
N/A
TO-220 Full-Pak
TO-262
D2-Pak MSL1
(per JEDEC J-STD-020D) ††
RoHS Compliant Yes
Moisture Sensitivity Level
Applicable version of JEDEC standard at the time of product release.
Trademarks of Infineon Technologies AG
µHVIC™, µIPM™, µPFC™, AU-ConvertIR™, AURIX™, C166™, CanPAK™, CIPOS™, CIPURSE™, CoolDP™, CoolGaN™, COOLiR™, CoolMOS™, CoolSET™,
CoolSiC™, DAVE™, DI-POL™, DirectFET™, DrBlade™, EasyPIM™, EconoBRIDGE™, EconoDUAL™, EconoPACK™, EconoPIM™, EiceDRIVER™, eupec™, FCOS™,
GaNpowIR™, HEXFET™, HITFET™, HybridPACK™, iMOTION™, IRAM™, ISOFACE™, IsoPACK™, LEDrivIR™, LITIX™, MIPAQ™, ModSTACK™, my-d™, NovalithIC™,
OPTIGA™, OptiMOS™, ORIGA™, PowIRaudio™, PowIRStage™, PrimePACK™, PrimeSTACK™, PROFET™, PRO-SIL™, RASIC™, REAL3™, SmartLEWIS™, SOLID
FLASH™, SPOC™, StrongIRFET™, SupIRBuck™, TEMPFET™, TRENCHSTOP™, TriCore™, UHVIC™, XHP™, XMC™
Trademarks updated November 2015
Other Trademarks
All referenced product or service names and trademarks are the property of their respective owners.
Edition 2016-04-19
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2016 Infineon Technologies AG.
All Rights Reserved.
Do you have a question about this
document?
Email: erratum@infineon.com
Document reference
ifx1
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event be regarded as a guarantee of conditions or
characteristics (“Beschaenheitsgarantie”) .
With respect to any examples, hints or any typical
values stated herein and/or any information
regarding the application of the product, Infineon
Technologies hereby disclaims any and all
warranties and liabilities of any kind, including
without limitation warranties of non-infringement
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In addition, any information given in this
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Revision History
Date Comments
04/27/2017
 Changed datasheet with Infineon logo - all pages.
 Corrected Package Outline on page 8,9,10,11.
 Added disclaimer on last page.