8AT24C01 0134G–SEEPR–7/03
Write Operations BYTE WRITE: Followi ng a start condi tion, a wri te op eration re quire s a 7-bit da ta wo rd
address and a low write bit. Upon receipt of this address, the EEPROM w ill again
respond with a zero and then clock in the first 8-bit data word. Following receipt of the 8-
bit data word, the EEPROM will output a z ero and the addressing device, such as a
microcontroller, must terminate the write sequence with a stop condition. At this time the
EEPROM en ter s a n internally-timed write cycle to th e nonvolatile memory. All inputs are
disabled durin g this write cycle , tWR, and the EEPROM will not respond until the write is
comple te (refer to Figure 1).
PAGE WRITE: The AT24C01 is capable of a 4-byte page write.
A page write is initiated the same as a byte write but the microcontroller does not send a
stop condition after the first data word is clocked in. Instead, after the EEPROM
acknowl edges rec ei pt of the fi rst data wo rd, the microcontroll er can t rans mit u p to t hree
more data words. The EEPRO M will respond with a zero after each data word received.
The m icrocontrol ler must terminate the p age write sequence wit h a st op condition (refer
to F i g ure 2).
The data word address lower 2 bits are internally incremented following the receipt of
each data word. The higher five data word address bits are not incremented, retaining
th e memor y pag e row lo cati on. W hen the w ord a ddress , intern ally ge ner ated , re aches
the page boundary, the following byte is placed at the beginning of the same page. If
more tha n four data word s ar e tra nsmitted to the EEP ROM , the d ata word addres s will
“roll over” and previous data will be overwritten.
ACKNOWLE DGE POLLING: Once the internally-timed write cycle has started and the
EEPROM inputs are disabled, acknowledge polling can be initiated. This involves send-
ing a start condition followed by the device address word. The read/write bit is
representative of the operation desired. Only if the internal write cycle has completed
will the EEPROM respond with a ze ro allowing the read or write sequence to continue.
Rea d Oper ati on s Re ad operatio ns are initiated t he same way as write op erations with the ex ception t hat
the read/write select bit in the device address word is set to one. There are two read
operations: byte read and sequential read.
BYTE READ: A byte read is initiated with a start condition followed by a 7-bit data word
addres s and a high rea d bit. The AT24C01 wi ll respond with an ac kn owledge an d then
serially output 8 data bits. The m icrocontroller does not respond with a zero but does
generate a following stop condition (refer to Figure 3).
SEQUENTIAL READ: Sequen tial read s are initiated the s ame as a byt e read. Aft er the
microcontroller receives an 8-bi t data word, it r esponds with an acknowledge. As long as
the EEPROM receives an acknowledge, it will continue to increment the data word
addres s and serially clock out sequential data words. When the memory address limit is
reached, the data word address will “roll over” and the sequential read will continue. The
sequ ential re ad operation is terminated when the microcontroller does not respond with
an input zero but does generate a following stop condition (refer to Figure 4).