UTS54ACS139/UTS4ACTS 139 Radiation-Hardened Dual 2-Line to 4-Line Decoders/Demultiplexers FEATURES Incorporates two enable inputs to simplify cascading and/or data reception + 1.2p radiation-hardened CMOS - Latchup immune * High speed + Low power consumption + Single 5 volt supply Available QML Q or V processes + Flexible package - 16-pin DIP - 16-lead flatpack DESCRIPTION PINOUTS 16-Pin DIP Top View ]l]1 167 Vo 1AC}2 18(7) 26 1B(}3 1417] 2a 1OoC}4 13 (7) 28 WiCj]s 127 2% WCje wei 13[]7 10 (7) 22 Vss 8 9 [7 23 16-Lead Flatpack The UTS4ACS 139 and the UTS4ACTS 139 are designed to be Top View used in high-performance memory-decoding or data-routing ap- a ws : . 1G 1 16 Vop plications requiring very short propagation delay times. A 2 48 5G 1 The devices consist of two individual two-line to four-line de- 1B 3 (14 2A coders in a single package. The active-low enable input can be 10 4 13 2B used as a data line in demultiplexing applications. VW 5 12 20 The devices are characterized over full military temperature 12 64 avi range of -55C to +125C. 13 7 10 22 Vsg 8 9 23 FUNCTION TABLE ENABLE SELECT OUTPUT INPUTS INPUTS LOGIC DIAGRAM G B A YO YW Y2 3 H x x H H H H L L L L H H H 7a 10 L L H H L H H ' Wi L H L H H L H 1VZ L H H H H H L SELECT INPUTS 1 way 62 ba SE 20] 3 2G 2vT 22 SELECT INPUTS 25 75 Rad-Hard MSI LogicUTS4ACS 139/UTS4ACTS 139 LOGIC SYMBOL 1A (4) 1va 1%0 16 8) yr WT 1G ) 99 12 (7) 193 13 20 20 2A i) 2vi 2T (10) oy3 22 2B (9) 23 23 3G Note: These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. RADIATION HARDNESS SPECIFICATIONS ! PARAMETER LIMIT UNITS Total Dose 1.0E6 rads(Si) SEU & SEL Threshold * 80 MeV-cm?/mg Neutron Fluence 1.0E14 nfem? Notes: 1, Logic will not latchap during radiation exposure within the limits defined in the table. 2. Device storage elements are immune to SEU affects. ABSOLUTE MAXIMUM RATINGS SYMBOL PARAMETER LIMIT UNITS Vpp Supply voltage -0.3 to 7.0 Vv Vuo Voltage any pin -.3 0 Vpp +.3 v Tstc Storage Temperature range -65 to +150 Cc Ty Maximum junction temperature +175 C Tis Lead temperature (soldering 5 seconds) +300 C Qc Thermal resistance junction to case 20 CIW I; DC input current +10 mA Pp Maximum power dissipation 1 WwW Note: 1. Stresses outside the listed absolute maximum ratings may cause permanent damage to the device. This is a stress rating only, functional operation of the device at these or any other conditions beyond limits indicated in the operational sections is not recommended. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. RECOMMENDED OPERATING CONDITIONS SYMBOL PARAMETER LIMIT UNITS Vpp Supply voltage 4.5 to 5.5 v Vin Input voltage any pin 0 to Vpp Vv Te Temperature range -55 to + 125 C Rad-Hard MSI Logic 76UT5S4ACS139/UTS4ACTS139 DC ELECTRICAL CHARACTERISTICS 7 (Vpp = 5.0V +10%: Vsg = OV , 55C < Te < 125C) SYMBOL PARAMETER CONDITION MIN MAX UNIT Vit Low-level input voltage ! ACTS 0.8 Vv ACS 3pp Vin High-level input voltage ! ACTS 5Vpp Vv ACS Vpp lin Input leakage current ACTS/ACS Vin = Vpp oF Vss -1 1 pA Vo. Low-level output voltage 3 ACTS Ip; = 8.0mA 0.40 v ACS Io, = 100HA 0.25 Vou High-level output voltage 3 ACTS lon = -8.0mA 7Vpp Vv ACS Ioy = -100HA Vpp - 0.25 los Short-circuit output current 7-4 ACTS/ACS Vo = Vpp and Vss -200 200 mA Protal Power dissipation 8. C,,= 50pF 18 mW/ MHz Ippa Quiescent Supply Current Vpp = 5.5V 100 HA Cin Input capacitance 5 f = IMHz @ OV 15 PF Cour | Output capacitance 5 f = 1MHz @ OV 15 pF Notes: 1, Functional tests are conducted in accordance with MIL-STD-883 with the following input test conditions: Vjpq = Viy(min) + 20%, - 0%; Vy = Vy_ (max) + 0%, - 50%, as specified herein, for TTL, CMOS, or Schmitt compatible inputs. Devices may be tested using any input voltage within the above specified range, but are guaranteed to V),(min) and V,; (max). 2. Supplied as a design limit but not guaranteed or tested. 3. Per MIL-M-38510, for current density < 5.0E5 amps/cm2, the maximum product of load capacitance (per output buffer) times frequency should not exceed 3,765 pF MHz. 4. Not more than one output may be shorted at a time for maximum duration of one second. 5. Capacitance measured for initial qualification and when design changes may affect the value. Cap is db the desi d inal and Ves at frequency of 1MHz and a signal amplitude of 50mV ms maximum. 6. Maximum allowable relative shift equals 50mV. 7. All specifications valid for radiation dose < 1E6 rads(Si). 8. Power does not include power contribution of any TTL output sink current. 9. Power dissipation specified per switching output. AC ELECTRICAL CHARACTERISTICS 2 (Vpp = 5.0V +10%; Vg = OV !, 55C < Te < +125C) SYMBOL PARAMETER MINIMUM MAXIMUM UNIT tpHL Select to output Yn 2 14 ns tpl Select to output Yn 2 15 ns pH Enable to output Yn 2 14 ns tpl Enable to output Yn 2 12 ns Notes: 1. Maximum allowable relative shift equals SOmV. 2. All specifications valid for radiation dose < 1E6 rads(Si). 77 Rad-Hard MSI Logic