FN6365
Rev. 6.00
Nov 9, 2017
ISL3179E, ISL3180E
High ESD Protected, +125°C, 40Mbps, 3.3V, Full Fail-Safe RS-485/RS-422
Transceivers
DATASHEET
FN6365 Rev. 6.00 Page 1 of 18
Nov 9, 2017
The ISL3179E and ISL3180E are high ESD protected (see
Table 2 on page 2), 3.3V powered, single transceivers that
meet both the RS-485 and RS-422 standards for balanced
communication. Each device has low bus currents
(+220µA/-150µA), so they present a “1/5 unit load” to the
RS-485 bus. This allows up to 160 transceivers on the network
without violating the RS-485 specification’s 32 unit load
maximum, and without using repeaters.
Receiver (Rx) inputs feature a “full fail-safe” design, which
ensures a logic high Rx output if Rx inputs are floating,
shorted, or terminated but undriven.
The ISL3180E is configured for full duplex applications. The
ISL3179E half duplex version multiplexes the Rx inputs and Tx
outputs to allow a transceiver with an output disable function
in 8 Ld packages.
Hot plug circuitry ensures that the Tx and Rx outputs remain in
a high impedance state while the power supply stabilizes.
Related Literature
• For a full list of related documents, visit our website
-ISL3179E and ISL3180E product pages
Applications
• Motor controller/position encoder systems
• Factory automation
• Field bus networks
•Security networks
• Building environmental control systems
• Industrial/process control networks
Features
• High ESD protection on RS-485 I/O pins
- ISL3179E. . . . . . . . . . . . . . . . . . . . . . . . . ±16.5kV IEC61000
- ISL3180E . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±12kV HBM
- Class 3 HBM level on all other pins (ISL3179E) . . . . . >9kV
• Specified for +125°C operation
• High data rates. . . . . . . . . . . . . . . . . . . . . . . . . . . up to 40Mbps
• 5V tolerant logic inputs
• 1/5 unit load allows up to 160 devices on the bus
• Full fail-safe (open, shorted, terminated/undriven) receiver
• Hot plug - Tx and Rx outputs remain three-state during
power-up
• Low quiescent current . . . . . . . . . . . . . . . . . . . . . . . 4mA (max)
• Low current shutdown mode . . . . . . . . . . . . . . . . . 1µA (max)
• -7V to +12V common-mode input voltage range
• Three-state Rx and Tx outputs
• 16/16.5ns (max) Tx/Rx propagation delays; 1.5ns (max) skew
• Operates from a single +3.3V supply (10% tolerance)
• Current limiting and thermal shutdown for driver overload
protection
• Pb-free (RoHS compliant)
TABLE 1. KEY DIFFERENCES BETWEEN HIGH-SPEED INTERFACE
FAMILY OF PARTS
PART
NUMBER
FULL/HALF
DUPLEX
VCC
(V)
VOD
(V)
DATA RATE
(Mbps)
ISL3179E Half 3.3 1.5 40
ISL3180E Full 3.3 1.5 40
ISL3159E Half 5 2.1 40
ISL3259E Half 5 2.1 100
FIGURE 1. TYPICAL OPERATING CIRCUIT - ISL3179E
0.1µF
+
D
R
7
6
8
1
2
3
4
5
VCC
GND
RO
RE
DE
DI
A/Y
B/Z
+3.3V
0.1µF +
D
R
6
7
8
1
2
3
4
5
VCC
GND
RO
RE
DE
DI
A/Y
B/Z
+3.3V
RTRT
(SOIC AND MSOP PIN NUMBERS SHOWN)
ISL3179E, ISL3180E
FN6365 Rev. 6.00 Page 2 of 18
Nov 9, 2017
Ordering Information
PART
NUMBER
(Note 4, 5)
PART
MARKING
TEMP. RANGE
(°C)
PACKAGE
(RoHS Compliant) PKG. DWG. #
ISL3179EFBZ (Note 1) 3179 EFBZ -40 to +125 8 Ld SOIC M8.15
ISL3179EFUZ (Note 1) 179FZ -40 to +125 8 Ld MSOP M8.118
ISL3179EFRZ (Note 2) 79FZ -40 to +125 10 Ld DFN L10.3x3C
ISL3179EIBZ (Note 1) 3179 EIBZ -40 to +85 8 Ld SOIC M8.15
ISL3179EIUZ (Note 1) 179IZ -40 to +85 8 Ld MSOP M8.118
ISL3179EIRZ (Note 2) 79IZ -40 to +85 10 Ld DFN L10.3x3C
ISL3180EIBZ (Note 3) ISL3180 EIBZ -40 to +85 14 Ld SOIC M14.15
NOTES:
1. Add “-T” suffix for 2.5k unit tape or “-T7A” suffix for 250 unit tape and reel options. Refer to TB347 for details on reel specifications.
2. Add “-T” suffix for 6k unit tape or “-T7A” suffix for 250 unit tape and reel options. Refer to TB347 for details on reel specifications.
3. Add “-T” suffix for 2.5k unit tape and reel options. Refer to TB347 for details on reel specifications.
4. Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate
plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
5. For Moisture Sensitivity Level (MSL), refer to the product information page for the ISL3179E and the ISL3180E. For more information about MSL, refer
to TB363.
TABLE 2. SUMMARY OF FEATURES
PART
NUMBER
HALF/FULL
DUPLEX
DATA RATE
(Mbps)
RS-485 PIN
ESD LEVEL
HOT
PLUG?
RX/TX
ENABLE?
QUIESCENT
ICC
(mA)
LOW POWER
SHUTDOWN?
PIN
COUNT
ISL3179E HALF 40 16.5kV
IEC61000
YES YES 2.6 YES 8, 10
ISL3180E FULL 40 12kV HBM YES YES 2.6 YES 14
ISL3179E, ISL3180E
FN6365 Rev. 6.00 Page 3 of 18
Nov 9, 2017
Pin Configurations
ISL3179E
(8 LD SOIC, MSOP)
TOP VIEW
ISL3179E
(10 LD DFN)
TOP VIEW
ISL3180E
(14 LD SOIC)
TOP VIEW
RO
RE
DE
DI
1
2
3
4
8
7
6
5
VCC
B/Z
A/Y
GND
D
R
2
3
4
1
5
9
8
7
10
6
RO
RE
DE
DI
NC
VCC
NC
B/Z
A/Y
GND
EP
NC
RO
RE
DE
DI
GND
GND
VCC
NC
A
B
Z
Y
NC
1
2
3
4
5
6
7
14
13
12
11
10
9
8
D
R
Truth Table
TRANSMITTING
INPUTS OUTPUTS
RE DE DI B/Z A/Y
X1101
X1010
0 0 X High-Z High-Z
10XHigh-Z*High-Z*
NOTE: *Shutdown Mode
Truth Table
RECEIVING
INPUTS OUTPUT
RE DE Half
Duplex
DE Full
Duplex
A-B RO
00 X V
AB ≥ -0.05V 1
0 0 X -0.05V > VAB > -0.2V Undetermined
00 X V
AB ≤ -0.2V 0
0 0 X Inputs Open/Shorted 1
10 X X High-Z*
11 X X High-Z
NOTE: *Shutdown Mode
Pin Descriptions
PIN FUNCTION
RO Receiver output: If A-B ≥ -50mV, RO is high; If A-B ≤ -200mV, RO is low; If A and B are unconnected (floating) or shorted, or connected to a
terminated bus that is undriven, RO is high.
RE Receiver output enable. RO is enabled when RE is low; RO is high impedance when RE is high. If the Rx enable function isn’t required, connect
RE directly to GND.
DE Driver output enable. The driver outputs, Y and Z, are enabled by bringing DE high, and they are high impedance when DE is low. If the Tx
enable function is not required, connect DE to VCC through a 1kΩ or greater resistor.
DI Driver input. A low on DI forces output Y low and output Z high. Similarly, a high on DI forces output Y high and output Z low.
GND Ground connection. This is also the potential of the DFN’s exposed metal pad.
A/Y ±16.5kV IEC61000 ESD protected RS-485/RS-422 level, noninverting receiver input and noninverting driver output. Pin is an input (A) if
DE = 0; pin is an output (Y) if DE = 1. ISL3179E only.
B/Z ±16.5kV IEC61000 ESD protected RS-485/RS-422 level, inverting receiver input and inverting driver output. Pin is an input (B) if DE = 0;
pin is an output (Z) if DE = 1. ISL3179E only.
A±12kV HBM ESD protected RS-485/RS-422 level, noninverting receiver input. ISL3180E only.
B±12kV HBM ESD protected RS-485/RS-422 level, inverting receiver input. ISL3180E only.
Y±12kV HBM ESD protected RS-485/RS-422 level, noninverting driver output. ISL3180E only.
Z±12kV HBM ESD protected RS-485/RS-422 level, inverting driver output. ISL3180E only.
VCC System power supply input (3.0V to 3.6V).
NC No internal connection.
EP The exposed metal pad on the bottom of the DFN; connect to GND.
ISL3179E, ISL3180E
FN6365 Rev. 6.00 Page 4 of 18
Nov 9, 2017
Typical Operating Circuits
FIGURE 2. ISL3179E
FIGURE 3. ISL3180E
0.1µF
+
D
R
7
6
8
1
2
3
4
5
VCC
GND
RO
RE
DE
DI
A/Y
B/Z
+3.3V
0.1µF +
D
R
6
7
8
1
2
3
4
5
VCC
GND
RO
RE
DE
DI
A/Y
B/Z
+3.3V
RTRT
(SOIC AND MSOP PIN NUMBERS SHOWN)
0.1µF
+
D
R
12
11
10
9
14
2
3
4
5
6, 7
VCC
GND
RO
RE
DE
DI
A
B
Y
Z
+3.3V
0.1µF+
D
R
12
11
10
9
14
2
3
4
5
6, 7
VCC
GND
RO
RE
DE
DI
A
B
Y
Z
+3.3V
RT
RT
(PIN NUMBERS FOR SOIC)
ISL3179E, ISL3180E
FN6365 Rev. 6.00 Page 5 of 18
Nov 9, 2017
Absolute Maximum Ratings Thermal Information
VCC to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V
Input Voltages
DI, DE, RE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V
Input/Output Voltages
A, B, Y, Z, A/Y, B/Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -9V to +13V
RO. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to (VCC +0.3V)
Short-circuit Duration
Y, Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
ESD Rating . . . . . . . . . . . . . . . . . . . . . . Refer to “Electrical Specifications”
Operating Conditions
Temperature Range
ISL3179EF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +125°C
ISL3179EI, ISL3180EI . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
Thermal Resistance (Typical) JA (°C/W) JC (°C/W)
8 Ld SOIC Package (Note 6) . . . . . . . . . . . . 160 N/A
14 Ld SOIC Package (Note 6) . . . . . . . . . . . 91 N/A
8 Ld MSOP Package (Note 6) . . . . . . . . . . . 132.5 N/A
10 Ld DFN Package (Notes 7, 8) . . . . . . . . 46 3.5
Maximum Junction Temperature (Plastic Package) . . . . . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . . . . . .-65°C to +150°C
Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Refer to TB493
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
6. JA is measured with the component mounted on a high-effective thermal conductivity test board in free air. Refer to TB379 for details.
7. For JC, the “case temp” location is the center of the exposed metal pad on the package underside.
8. JA is measured in free air with the component mounted on a high-effective thermal conductivity test board with “direct attach” features. Refer to
TB379 for details.
Electrical Specifications Test Conditions: VCC = 3.0V to 3.6V; Typicals are at VCC = 3.3V, TA = +25°C. Boldface limits apply across the
operating temperature range. (Note 9)
PARAMETER SYMBOL TEST CONDITIONS
TEMP
(°C)
MIN
(Note 19)TYP
MAX
(Note 19)UNIT
DC CHARACTERISTICS
Driver Differential VOUT VOD RL = 100Ω (RS-422) (Figure 4A), (Note 18)Full22.3 - V
RL = 54Ω (RS-485) (Figure 4A)Full1.5 2.1 VCC V
No load Full - - VCC
RL = 60Ω, -7V ≤VCM ≤12V (Figure 4B), (Note 18)Full 1.5 2-V
Change in Magnitude of Driver
Differential VOUT for
Complementary Output States
VOD RL = 54Ω or 100Ω (Figure 4A)Full-0.010.2 V
Driver Common-Mode VOUT VOC RL = 54Ω or 100Ω (Figure 4A)Full-22.5 V
Change in Magnitude of Driver
Common-Mode VOUT for
Complementary Output States
VOC RL = 54Ω or 100Ω (Figure 4A) Full - 0.02 0.2 V
Logic Input High Voltage VIH DI, DE, RE Full 2--V
Logic Input Low Voltage VIL DI, DE, RE Full - - 0.8 V
Logic Input Current IIN1 DI = DE = RE = 0V or VCC Full -2 -2µA
Input Current (A, B, A/Y, B/Z) IIN2 DE = 0V, VCC = 0V or 3.6V VIN = 12V Full - - 220 µA
VIN = -7V Full -160 --µA
Y or Z Output Leakage Current IOZ DE = 0V, -7V ≤ VY or VZ ≤ 12V, ISL3180E only Full -40 -40 µA
Driver Short-Circuit Current,
VO = High or Low
IOSD1 DE = VCC, -7V ≤ VY or VZ ≤ 12V (Note 11)Full--±250 mA
Receiver Differential Threshold
Voltage
VTH -7V ≤ VCM ≤ 12V Full -200 --50 mV
Receiver Input Hysteresis VTH VCM = 0V 25 - 28 - mV
Receiver Output High Voltage VOH IO = -12mA, VID = -50mV Full VCC - 0.5 --V
ISL3179E, ISL3180E
FN6365 Rev. 6.00 Page 6 of 18
Nov 9, 2017
Receiver Output Low Voltage VOL IO = +10mA, VID = -200mV Full - - 0.4 V
Receiver Output Low Current IOL VOL = 1V, VID = -200mV Full 25 --mA
Three-State (high impedance)
Receiver Output Current
IOZR 0.4V ≤ VO ≤ 2.4V Full -1 0.015 1µA
Receiver Input Resistance RIN -7V ≤ VCM ≤ 12V Full 54 80 - kΩ
Receiver Short-Circuit Current IOSR 0V ≤ VO ≤ VCC Full ±20 -±110 mA
SUPPLY CURRENT
No-Load Supply Current (Note 10)I
CC DI = DE = 0V or VCC Full - 2.6 4mA
Shutdown Supply Current ISHDN DE = 0V, RE = VCC, DI = 0V or VCC Full - 0.05 1µA
ESD PERFORMANCE
RS-485 Pins (A/Y, B/Z)
ISL3179E Only
IEC61000-4-2, Air-gap Discharge Method 25 - ±16.5 - kV
IEC61000-4-2, Contact Discharge Method 25 - ±9 - kV
Human Body Model, from bus pins to GND 25 - ±16.5 - kV
All Pins
ISL3179E Only
Human Body Model, per JEDEC 25 - >±9 - kV
Machine Model, per JEDEC 25 - >±400 - V
RS-485 Pins (A, B, Y, Z)
ISL3180E Only
IEC61000-4-2, Air-gap Discharge Method 25 - ±4 - kV
IEC61000-4-2, Contact Discharge Method 25 - ±5 - kV
Human Body Model, from bus pins to GND 25 - ±12 - kV
All Pins
ISL3180E Only
Human Body Model, per JEDEC 25 - ±3 - kV
Machine Model, per JEDEC 25 - ±150 - V
DRIVER SWITCHING CHARACTERISTICS
Maximum Data Rate fMAX VOD ≥ ±1.5V, RD = 54Ω, CL = 100pF (Figure 7)Full 40 60 - Mbps
Driver Differential Output Delay tDD RD = 54Ω, CD = 50pF (Figure 5)Full-1116 ns
Prop Delay Part-to-Part Skew tSKP-P RD = 54Ω, CD = 50pF (Figure 5), (Note 17)Full--4ns
Driver Differential Output Skew tSKEW RD = 54Ω, CD = 50pF (Figure 5)Full-01.5 ns
Driver Differential Rise or Fall Time tR, tFRD = 54Ω, CD = 50pF (Figure 5)Full-47ns
Driver Enable to Output High tZH RL = 110Ω, CL = 50pF, SW = GND (Figure 6),
(Note 12)
Full - 18 25 ns
Driver Enable to Output Low tZL RL = 110Ω, CL = 50pF, SW = VCC (Figure 6),
(Note 12)
Full - 16 25 ns
Driver Disable from Output High tHZ RL = 110Ω, CL = 50pF, SW = GND (Figure 6)Full-1525 ns
Driver Disable from Output Low tLZ RL = 110Ω, CL = 50pF, SW = VCC (Figure 6)Full-1825 ns
Time to Shutdown tSHDN (Note 14)Full60 -600 ns
Driver Enable from Shutdown to
Output High
tZH(SHDN) RL = 110Ω, CL = 50pF, SW = GND (Figure 6),
(Notes 14, 15)
Full - - 1000 ns
Driver Enable from Shutdown to
Output Low
tZL(SHDN) RL = 110Ω, CL = 50pF, SW = VCC (Figure 6),
(Notes 14, 15)
Full - - 1000 ns
RECEIVER SWITCHING CHARACTERISTICS
Maximum Data Rate fMAX VID = ±1.5V Full 40 60 - Mbps
Receiver Input to Output Delay tPLH, tPHL Figure 8 Full - 10 16.5 ns
Prop Delay Part-to-Part Skew tSKP-P Figure 8, Note 17 Full - - 4ns
Electrical Specifications Test Conditions: VCC = 3.0V to 3.6V; Typicals are at VCC = 3.3V, TA = +25°C. Boldface limits apply across the
operating temperature range. (Note 9) (Continued)
PARAMETER SYMBOL TEST CONDITIONS
TEMP
(°C)
MIN
(Note 19)TYP
MAX
(Note 19)UNIT
ISL3179E, ISL3180E
FN6365 Rev. 6.00 Page 7 of 18
Nov 9, 2017
Receiver Skew | tPLH - tPHL |t
SKD Figure 8 Full - 0 1.5 ns
Receiver Enable to Output High tZH RL = 1kΩ, CL = 15pF, SW = GND (Figure 9),
(Note 13)
Full - 10 15 ns
Receiver Enable to Output Low tZL RL = 1kΩ, CL = 15pF, SW = VCC (Figure 9),
(Note 13)
Full - 11 15 ns
Receiver Disable from Output High tHZ RL = 1kΩ, CL = 15pF, SW = GND (Figure 9)Full-1015 ns
Receiver Disable from Output Low tLZ RL = 1kΩ, CL = 15pF, SW = VCC (Figure 9)Full-1015 ns
Time to Shutdown tSHDN (Note 14)Full60 -600 ns
Receiver Enable from Shutdown to
Output High
tZH(SHDN) RL = 1kΩ, CL = 15pF, SW = GND (Figure 9),
(Notes 14, 16)
Full - - 1000 ns
Receiver Enable from Shutdown to
Output Low
tZL(SHDN) RL = 1kΩ, CL = 15pF, SW = VCC (Figure 9),
(Notes 14, 16)
Full - - 1000 ns
NOTES:
9. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless otherwise
specified.
10. Supply current specification is valid for loaded drivers when DE = 0V.
11. Applies to peak current. Refer to “Typical Performance Curves” on page 9 for more information.
12. Because of the shutdown feature, keep RE = 0 to prevent the device from entering SHDN.
13. Because of the shutdown feature, the RE signal high time must be short enough (typically <100ns) to prevent the device from entering SHDN.
14. These ICs are put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 60ns, the parts are guaranteed not to enter
shutdown. If the inputs are in this state for at least 700ns, the parts are guaranteed to have entered shutdown. Refer to “Low Power Shutdown Mode”
on page 13.
15. Keep RE = VCC, and set the DE signal low time >700ns to ensure that the device enters SHDN.
16. Set the RE signal high time >700ns to ensure that the device enters SHDN.
17. This is the part-to-part skew between any two units tested with identical test conditions (Temperature, VCC, etc.).
18. VCC = 3.3V ±5%.
19. Compliance to datasheet limits is assured by one or more methods: production test, characterization, and/or design.
Electrical Specifications Test Conditions: VCC = 3.0V to 3.6V; Typicals are at VCC = 3.3V, TA = +25°C. Boldface limits apply across the
operating temperature range. (Note 9) (Continued)
PARAMETER SYMBOL TEST CONDITIONS
TEMP
(°C)
MIN
(Note 19)TYP
MAX
(Note 19)UNIT
Test Circuits and Waveforms
FIGURE 4A. VOD AND VOC FIGURE 4B. VOD WITH COMMON-MODE LOAD
FIGURE 4. DC DRIVER TEST CIRCUITS
D
DE
DI
VCC
VOD
VOC
RL/2
RL/2
Z
Y
D
DE
DI
VCC
VOD
375Ω
375Ω
Z
Y
RL = 60Ω
VCM
-7V TO +12V
ISL3179E, ISL3180E
FN6365 Rev. 6.00 Page 8 of 18
Nov 9, 2017
FIGURE 5A. TEST CIRCUIT FIGURE 5B. MEASUREMENT POINTS
FIGURE 5. DRIVER PROPAGATION DELAY AND DIFFERENTIAL TRANSITION TIMES
FIGURE 6A. TEST CIRCUIT FIGURE 6B. MEASUREMENT POINTS
FIGURE 6. DRIVER ENABLE AND DISABLE TIMES
FIGURE 7A. TEST CIRCUIT FIGURE 7B. MEASUREMENT POINTS
FIGURE 7. DRIVER DATA RATE
Test Circuits and Waveforms (Continued)
D
DE
DI
VCC
SIGNAL
GENERATOR
CD
RD
Z
Y
OUT (Z)
3V
0V
1.5V1.5V
VOH
VOL
OUT (Y)
tPLH tPHL
DIFF OUT (Y - Z)
tR
+VOD
-VOD
90% 90%
tF
10% 10%
DI
SKEW = |tPLH - tPHL|
D
DE
DI Z
Y
VCC
GND
SW
PARAMETER OUTPUT RE DI SW
tHZ Y/Z X 1/0 GND
tLZ Y/Z X 0/1 VCC
tZH Y/Z 0 (Note 12)1/0 GND
tZL Y/Z 0 (Note 12)0/1 V
CC
tZH(SHDN) Y/Z 1 (Note 15)1/0 GND
tZL(SHDN) Y/Z 1 (Note 15)0/1 V
CC
SIGNAL
GENERATOR
110Ω
50pF
OUT (Y, Z)
3V
0V
1.5V1.5V
VOH
0V
VOH - 0.5V
tHZ
OUT (Y, Z)
VCC
VOL
VOL + 0.5V
tLZ
DE
OUTPUT HIGH
OUTPUT LOW
tZL, tZL(SHDN)
tZH, tZH(SHDN)
50%
50%
(Note 14)
(Note 14)
(Note 14)
D
DE
DI
VCC
SIGNAL
GENERATOR
Z
Y
VOD
+
-
54Ω
CL
CL
3V
0V
DIFF OUT (Y - Z) +VOD
-VOD
DI
0V
ISL3179E, ISL3180E
FN6365 Rev. 6.00 Page 9 of 18
Nov 9, 2017
FIGURE 8A. TEST CIRCUIT FIGURE 8B. MEASUREMENT POINTS
FIGURE 8. RECEIVER PROPAGATION DELAY
FIGURE 9A. TEST CIRCUIT FIGURE 9B. MEASUREMENT POINTS
FIGURE 9. RECEIVER ENABLE AND DISABLE TIMES
Test Circuits and Waveforms (Continued)
SIGNAL
GENERATOR
RRO
RE
A
B
+1.5V
15pF
RO
+3V
0V
tPLH
1.5V1.5V
VCC
0V
1.7V 1.7V
tPHL
A
1kΩ VCC
GND
SW
PARAMETER DE A SW
tHZ 0 +1.5V GND
tLZ 0 -1.5V VCC
tZH (Note 13)0+1.5VGND
tZL (Note 13) 0 -1.5V VCC
tZH(SHDN) (Note 16)0 +1.5V GND
tZL(SHDN) (Note 16) 0 -1.5V VCC
SIGNAL
GENERATOR
RRO
RE
A
B
GND
15pF
RO
3V
0V
1.5V1.5V
VOH
0V
1.5V
VOH - 0.5V
tHZ
RO
VCC
VOL
1.5V
VOL + 0.5V
tLZ
RE
OUTPUT HIGH
OUTPUT LOW
tZL, tZL(SHDN)
tZH, tZH(SHDN)
(Note 14)
(Note 14)
(Note 14)
Typical Performance Curves VCC = 3.3V, TA = +25°C; unless otherwise specified
FIGURE 10. DRIVER OUTPUT CURRENT vs DIFFERENTIAL OUTPUT
VOLTAGE
FIGURE 11. DRIVER DIFFERENTIAL OUTPUT VOLTAGE vs
TEMPERATURE
0
10
20
30
40
50
60
70
80
90
0 0.5 1.0 1.5 2.0 2.5 3.0
DIFFERENTIAL OUTPUT VOLTAGE (V)
DRIVER OUTPUT CURRENT (mA)
+25°C
+85°C
RD = 54Ω
RD = 100Ω
+125°C
3.3
RD = 33Ω
1.90
1.95
2.00
2.05
2.10
2.15
2.20
2.25
2.30
2.35
2.40
-40 -15 10 35 60 85 110
TEMPERATURE (°C)
DIFFERENTIAL OUTPUT VOLTAGE (V)
RD = 54Ω
RD = 100Ω
125
ISL3179E, ISL3180E
FN6365 Rev. 6.00 Page 10 of 18
Nov 9, 2017
FIGURE 12. DRIVER OUTPUT CURRENT vs SHORT-CIRCUIT
VOLTAGE
FIGURE 13. SUPPLY CURRENT vs TEMPERATURE
FIGURE 14. DRIVER DIFFERENTIAL PROPAGATION DELAY vs
TEMPERATURE
FIGURE 15. DRIVER DIFFERENTIAL SKEW vs TEMPERATURE
FIGURE 16. DRIVER AND RECEIVER WAVEFORMS FIGURE 17. DRIVER AND RECEIVER WAVEFORMS
Typical Performance Curves VCC = 3.3V, TA = +25°C; unless otherwise specified (Continued)
OUTPUT VOLTAGE (V)
-7 -6 -4 -2 0 2 4 6 8 10 12
OUTPUT CURRENT (mA)
Y OR Z = HIGH
Y OR Z = LOW
-100
-50
0
50
100
150
2.10
2.15
2.20
2.25
2.30
2.35
2.40
-40 -15 10 35 60 85 110 125
TEMPERATURE (°C)
ICC (mA)
DE = VCC, RE = X OR DE = GND, RE = GND
8.0
8.5
9.0
9.5
10.0
10.5
11.0
11.5
12.0
12.5
13.0
-40 -15 10 35 60 85 110 125
TEMPERATURE (°C)
PROPAGATION DELAY (ns)
tPLH
tPHL
0
0.05
0.10
0.15
0.20
0.25
-40 -15 10 35 60 85 110 125
TEMPERATURE (°C)
SKEW (ns)
|tPLH - tPHL|
TIME (5ns/DIV)
RECEIVER OUTPUT (V)
RDIFF = 54Ω, CD = 50pF
0
5
DRIVER OUTPUT (V)
0
5
DRIVER INPUT (V)
DI
RO
Y-Z
-3
2
3
-1
0
1
-2
TIME (5ns/DIV)
RECEIVER OUTPUT (V)
RDIFF = 54Ω, CD = 50pF
0
5
DRIVER OUTPUT (V)
0
5
DRIVER INPUT (V)
DI
RO
-3
-2
-1
0
1
2
3
Y-Z
ISL3179E, ISL3180E
FN6365 Rev. 6.00 Page 11 of 18
Nov 9, 2017
Die Characteristics
SUBSTRATE AND DFN THERMAL PAD POTENTIAL
(POWERED UP):
GND
PROCESS:
Si Gate BiCMOS
FIGURE 18. DRIVER AND RECEIVER WAVEFORMS DRIVING 100’
(31m) OF CAT5 CABLE (DOUBLE TERMINATED WITH
120Ω)
FIGURE 19. DRIVER AND RECEIVER WAVEFORMS DRIVING 500’
(152m) OF CAT5 CABLE (DOUBLE TERMINATED WITH
120Ω)
FIGURE 20. RECEIVER OUTPUT CURRENT vs RECEIVER OUTPUT VOLTAGE
Typical Performance Curves VCC = 3.3V, TA = +25°C; unless otherwise specified (Continued)
TIME (10ns/DIV)
-3.0
RECEIVER OUTPUT (V)
1.5
3.0
-1.5
0
0
5.0
RECEIVER INPUT (V)
0
5
DRIVER INPUT (V)
DI = 40Mbps
RO
DRIVER+CABLE DELAY (~160ns)
A - B
TIME (200ns/DIV)
-3.0
RECEIVER OUTPUT (V)
1.5
3.0
-1.5
0
A - B
0
5.0
RECEIVER INPUT (V)
0
5
DRIVER INPUT (V)
RO
DRIVER+CABLE DELAY (~720ns)
DI = 2Mbps
0
10
20
30
40
50
0 0.5 1.0 1.5 2.0 2.5 3.0
RECEIVER OUTPUT VOLTAGE (V)
RECEIVER OUTPUT CURRENT (mA)
VOH +25°C
VOH +85°C
VOL +25°C
VOL +85°C
VOH +125°C
VOL +125°C
3.3
60
ISL3179E, ISL3180E
FN6365 Rev. 6.00 Page 12 of 18
Nov 9, 2017
Application Information
RS-485 and RS-422 are differential (balanced) data
transmission standards for use in long haul or noisy
environments. RS-422 is a subset of RS-485, so RS-485
transceivers are also RS-422 compliant. RS-422 is a
point-to-multipoint (multidrop) standard, which allows only one
driver and up to 10 receivers on each bus, assuming one unit
load devices. RS-485 is a true multipoint standard, which allows
up to 32 one unit load devices (any mix of drivers and receivers)
on each bus. To allow for multipoint operation, the RS-485
specification requires that drivers must handle bus contention
without sustaining any damage.
Another important advantage of RS-485 is the extended
common-mode range (CMR), which specifies that the driver
outputs and receiver inputs withstand signals that range from
+12V to -7V. RS-422 and RS-485 are intended for cable lengths
as long as 4000ft (~1200m), so the wide CMR is necessary to
handle ground potential differences, as well as voltages induced
in the cable by external fields.
Receiver (Rx) Features
This transceiver utilizes a differential input receiver for maximum
noise immunity and common-mode rejection. Input sensitivity is
±200mV, as required by the RS-422 and RS-485 specifications.
Receiver inputs function with common-mode voltages as great
as +9/-7V outside the power supplies (+12V and -7V), making
them ideal for long networks, or industrial environments, where
induced voltages are a realistic concern.
The receiver input resistance of 50kΩ surpasses the RS-422
specification of 4kΩ, and is five times the RS-485 “Unit Load”
(UL) requirement of 12kΩ minimum. Thus, the ISL3179E is
known as a “one-fifth UL” transceiver, and there can be up to 160
devices on the RS-485 bus while still complying with the RS-485
loading specification.
The receiver is a “full fail-safe” version that guarantees a high
level receiver output if the receiver inputs are unconnected
(floating), shorted together, or connected to a terminated bus
with all the transmitters disabled (terminated/undriven).
Rx outputs deliver large low state currents (typically 28mA at
VOL = 1V) to ease the design of optically coupled isolated
networks.
Receivers easily meet the 40Mbps data rate supported by the
driver, and the receiver output is tri-statable through the active
low RE input.
Driver (Tx) Features
The RS-485/RS-422 driver is a differential output device that
delivers at least 1.5V across a 54Ω load (RS-485), and at least 2V
across a 100Ω load (RS-422). The drivers feature low
propagation delay skew to maximize bit width and to minimize
EMI.
Driver outputs are not slew rate limited, so faster output
transition times allow data rates of at least 40Mbps. Driver
outputs are tri-statable through the active high DE input.
For parallel applications, bit-to-bit skews between any two
transmitter and receiver pairs are guaranteed to be no worse
than 8ns (4ns max for any two Tx, 4ns max for any two Rx).
ESD Protection
All pins on the ISL3179E include Class 3 (>9kV) Human Body
Model (HBM) ESD protection structures, but the RS-485 pins
(driver outputs and receiver inputs) incorporate advanced
structures allowing them to survive ESD events in excess of
±16.5kV HBM (ISL3179E) or ±12kV HBM (ISL3180E), and
±16.5kV (ISL3179E) or ±4kV (ISL3180E) IEC61000-4-2. The
RS-485 pins are particularly vulnerable to ESD strikes because
they typically connect to an exposed port on the exterior of the
finished product. Simply touching the port pins, or connecting a
cable, can cause an ESD event that can destroy unprotected
ICs. These new ESD structures protect the device whether or not
it is powered up, and without degrading the RS-485
common-mode range of -7V to +12V. This built-in ESD
protection eliminates the need for board level protection
structures (for example, transient suppression diodes) and the
associated, undesirable capacitive load they present.
IEC61000-4-2 Testing
The IEC61000 test method applies to finished equipment, rather
than to an individual IC. Therefore, the pins most likely to suffer
an ESD event are those that are exposed to the outside world (the
RS-485 pins in this case), and the IC is tested in its typical
application configuration (power applied) rather than testing
each pin-to-pin combination. The IEC61000 standard’s lower
current limiting resistor coupled with the larger charge storage
capacitor yields a test that is much more severe than the HBM
test. The extra ESD protection built into the ISL3179E’s RS-485
pins allows the design of equipment meeting Level 4 criteria
without the need for additional board level protection on the
RS-485 port.
AIR-GAP DISCHARGE TEST METHOD
For this test method, a charged probe tip moves toward the IC pin
until the voltage arcs to it. The current waveform delivered to the
IC pin depends on approach speed, humidity, temperature, etc.,
so it is more difficult to obtain repeatable results. The ISL3179E
RS-485 pins withstand ±16.5kV air-gap discharges, while the
ISL3180E RS-485 pins withstand ±4kV.
CONTACT DISCHARGE TEST METHOD
During the contact discharge test, the probe contacts the tested
pin before the probe tip is energized, thereby eliminating the
variables associated with the air-gap discharge. The result is a
more repeatable and predictable test, but equipment limits
prevent testing devices at voltages higher than ±9kV. The RS-485
pins of the ISL3179E survive ±9kV contact discharges, while the
ISL3180E’s RS-485 pins withstand ±5kV.
Hot Plug Function
When a piece of equipment powers up, a period of time occurs in
which the processor or ASIC driving the RS-485 control lines (DE,
RE) is unable to ensure that the RS-485 Tx and Rx outputs are
kept disabled. If the equipment is connected to the bus, a driver
activating prematurely during power-up may crash the bus. To
avoid this scenario, the ISL3179E and ISL3180E incorporate a
ISL3179E, ISL3180E
FN6365 Rev. 6.00 Page 13 of 18
Nov 9, 2017
“hot plug” function. Circuitry monitoring VCC ensures that, during
power-up and power-down, the Tx and Rx outputs remain disabled,
regardless of the state of DE and RE, if VCC is less than ~2.4V. This
gives the processor/ASIC a chance to stabilize and drive the RS-485
control lines to the proper states.
Data Rate, Cables, and Terminations
RS-485/RS-422 are intended for network lengths up to 4000ft,
but the maximum system data rate decreases as the
transmission length increases. Devices operating at 40Mbps are
limited to lengths less than 100ft.
Twisted pair is the cable of choice for RS-485/RS-422 networks.
Twisted pair cables tend to pick up noise and other
electromagnetically induced voltages as common-mode signals,
which are effectively rejected by the differential receiver in this IC.
Proper termination is imperative to minimize reflections. In point-
to-point, or point-to-multipoint (single driver on bus) networks,
the main cable should be terminated in its characteristic
impedance (typically 120Ω) at the end farthest from the driver. In
multireceiver applications, stubs connecting receivers to the
main cable should be kept as short as possible. Multipoint
(multidriver) systems require that the main cable be terminated
in its characteristic impedance at both ends. Stubs connecting a
transceiver to the main cable should be kept as short as possible.
The ISL3179E and ISL3180E may also be used at slower data
rates over longer cables, but some limitations apply. The Rx is
optimized for high speed operation, so its output may glitch if the
Rx input differential transition times are too slow. Keeping the
transition times below 500ns, which equates to the Tx driving a
1000ft (305m) CAT 5 cable, yields excellent performance over
the full operating temperature range.
Built-in Driver Overload Protection
As stated previously, the RS-485 specification requires that
drivers survive worst case bus contentions undamaged. These
transmitters meet this requirement using driver output short
circuit current limits and on-chip thermal shutdown circuitry.
The driver output stages incorporate short-circuit current limiting
circuitry, which ensures that the output current never exceeds the
RS-485 specification, even at the common-mode voltage range
extremes. In the event of a major short-circuit condition, the device
also includes a thermal shutdown feature that disables the drivers
whenever the die temperature becomes excessive. This eliminates
the power dissipation, allowing the die to cool. The drivers
automatically reenable after the die temperature drops about
+15°C. If the contention persists, the thermal shutdown/reenable
cycle repeats until the fault is cleared. Receivers stay operational
during thermal shutdown.
Low Power Shutdown Mode
The BiCMOS transceivers use a fraction of the power required by
their bipolar counterparts, but they also include a shutdown
feature that reduces the already low quiescent ICC to a 50nA
trickle. The devices enter shutdown whenever the receiver and
driver are simultaneously disabled (RE =V
CC and DE = GND) for a
period of at least 600ns. Disabling both the driver and the
receiver for less than 60ns guarantees that the transceiver will
not enter shutdown.
Note that receiver and driver enable times increase when the
transceiver enables from shutdown. Refer to Notes 12, 13, 14,
15 and 16 at the end of “Electrical Specifications” on page 5 for
more information.
FIGURE 21. HOT PLUG PERFORMANCE (ISL3179E) vs ISL83485
WITHOUT HOT PLUG CIRCUITRY
TIME (40µs/DIV)
VCC
RECEIVER OUTPUT (V)
DRIVER Y OUTPUT (V)
2
4
2
4
VCC (V)
RL = 1kΩ
RO
0
2
4
0
0
A/Y
RL = 1kΩ
2.3V
2.5V
DE, DI = VCC
ISL3179E
RE = GND
ISL3179E
FN6365 Rev. 6.00 Page 14 of 18
Nov 9, 2017
ISL3179E, ISL3180E
Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted
in the quality certifications found at www.intersil.com/en/support/qualandreliability.html
Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such
modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are
current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its
subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
For additional products, see www.intersil.com/en/products.html
© Copyright Intersil Americas LLC 2007-2017. All Rights Reserved.
All trademarks and registered trademarks are the property of their respective owners.
About Intersil
Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products
address some of the largest markets within the industrial and infrastructure, mobile computing, and high-end consumer markets.
For the most updated datasheet, application notes, related documentation, and related parts, see the respective product information
page found at www.intersil.com.
For a listing of definitions and abbreviations of common terms used in our documents, visit www.intersil.com/glossary.
You can report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask.
Reliability reports are also available from our website at www.intersil.com/support.
Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted.
Please visit our website to make sure you have the latest revision.
DATE REVISION CHANGE
Nov 9, 2017 FN6365.6 Added the Related Literature section.
Updated the Receiving Truth Table on page 3.
Updated the header/footer.
Aug 25, 2015 FN6365.5 Added Key Differences table to page 1.
Jul 8, 2015 FN6365.4 Reformatted datasheet to newest template and standards.
Features, page 1 - Changed: “- Class 3 HBM Level on all Other Pins.....>9kV” to: “- Class 3 HBM level on all other
pins (ISL3179E).....>9kV”
Pin Description on page 3 - Added row for EP pin and added to description of GND.
Elec Spec table, page 6 ESD Performance section:
Added “ISL3179E Only” to All Pins and changed Test Conditions for HBM and Machine Model to “per JEDEC”.
- Added 2 rows for “All Pins, ISL3180E Only”
Updated note references on Figures 6B and 9B.
Die Characteristics section on page 11: removed Transistor Count
ESD Protection on page 12 - removed “and ISL3180E” from 1st sentence.
Added Revision History table and About Intersil section.
Updated POD L10.3x3C on page 16 from rev 2 to rev 4. Changes since rev 2:
- Removed package outline and included center to center distance between lands on recommended land
pattern.
- Removed Note 4 "Dimension b applies to the metallized terminal and is measured between 0.18mm and
0.30mm from the terminal tip." since it is not applicable to this package. Renumbered notes accordingly.
- Tiebar Note 4 updated
From: Tiebar shown (if present) is a non-functional feature.
To: Tiebar shown (if present) is a non-functional feature and may be located on any of the 4 sides (or ends).
Updated POD M8.15 on page 17 from rev 3 to rev 4. Changes since rev 3:
- Changed Note 1 "1982" to "1994"
ISL3179E, ISL3180E
FN6365 Rev. 6.00 Page 15 of 18
Nov 9, 2017
Package Outline Drawing
M8.118
8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE
Rev 4, 7/11
DETAIL "X"
SIDE VIEW 2
TYPICAL RECOMMENDED LAND PATTERN
TOP VIEW
PIN# 1 ID
0.25 - 0.36
DETAIL "X"
0.10 ± 0.05
(4.40)
(3.00)
(5.80)
H
C
1.10 MAX
0.09 - 0.20
3°±3°
GAUGE
PLANE 0.25
0.95 REF
0.55 ± 0.15
B
0.08 C A-B D
3.0±0.05
12
8
0.85±010
SEATING PLANE
A
0.65 BSC
3.0±0.05 4.9±0.15
(0.40)
(1.40)
(0.65)
D
5
5
SIDE VIEW 1
Dimensioning and tolerancing conform to JEDEC MO-187-AA
Plastic interlead protrusions of 0.15mm max per side are not
Dimensions in ( ) are for reference only.
Dimensions are measured at Datum Plane "H".
Plastic or metal protrusions of 0.15mm max per side are not
Dimensions are in millimeters.
3.
4.
5.
6.
NOTES:
1.
2.
and AMSEY14.5m-1994.
included.
included.
0.10 C
M
For the most recent package outline drawing, see M8.118.
ISL3179E, ISL3180E
FN6365 Rev. 6.00 Page 16 of 18
Nov 9, 2017
Package Outline Drawing
L10.3x3C
10 LEAD DUAL FLAT PACKAGE (DFN)
Rev 4, 3/15
located within the zone indicated. The pin #1 identifier may be
Unless otherwise specified, tolerance : Decimal ± 0.05
The configuration of the pin #1 identifier is optional, but must be
Dimensions in ( ) for Reference Only.
Dimensioning and tolerancing conform to AMSE Y14.5m-1994.
5.
either a mold or mark feature.
3.
4.
2.
Dimensions are in millimeters.1.
NOTES:
BOTTOM VIEW
DETAIL "X"
SIDE VIEW
TYPICAL RECOMMENDED LAND PATTERN
TOP VIEW
(4X) 0.10
INDEX AREA
PIN 1
PIN #1 INDEX AREA
C
SEATING PLANE
BASE PLANE
0.08
SEE DETAIL "X"
C
C4
5
5
A
B
0.10 C
2
6
10 1
0.90
0.20
0.50
2.38
3.00
(10x 0.25)
(8x 0.50)
2.38
1.64
(10 x 0.60)
3.00
0.05
0.20 REF
10 x 0.25
10x 0.40
1.64
CB
MAX
(4X) 0.10 CB
M
6. Compliant to JEDEC MO-229-WEED-3 except for E-PAD
dimensions.
2.80 TYP
Tiebar shown (if present) is a non-functional feature and may be
located on any of the 4 sides (or ends).
For the most recent package outline drawing, see L10.3x3C.
ISL3179E, ISL3180E
FN6365 Rev. 6.00 Page 17 of 18
Nov 9, 2017
Package Outline Drawing
M8.15
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
Rev 4, 1/12
DETAIL "A"
TOP VIEW
INDEX
AREA
123
-C-
SEATING PLANE
x 45°
NOTES:
20. Dimensioning and tolerancing per ANSI Y14.5M-1994.
21. Package length does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
22. Package width does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
23. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
24. Terminal numbers are shown for reference only.
25. The lead width as measured 0.36mm (0.014 inch) or greater above the
seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch).
26. Controlling dimension: MILLIMETER. Converted inch dimensions are not
necessarily exact.
27. This outline conforms to JEDEC publication MS-012-AA ISSUE C.
SIDE VIEW “A
SIDE VIEW “B”
1.27 (0.050)
6.20 (0.244)
5.80 (0.228)
4.00 (0.157)
3.80 (0.150)
0.50 (0.20)
0.25 (0.01)
5.00 (0.197)
4.80 (0.189)
1.75 (0.069)
1.35 (0.053)
0.25(0.010)
0.10(0.004)
0.51(0.020)
0.33(0.013)
8°
0°
0.25 (0.010)
0.19 (0.008)
1.27 (0.050)
0.40 (0.016)
1.27 (0.050)
5.20(0.205)
1
2
3
45
6
7
8
TYPICAL RECOMMENDED LAND PATTERN
2.20 (0.087)
0.60 (0.023)
For the most recent package outline drawing, see M8.15.
ISL3179E, ISL3180E
FN6365 Rev. 6.00 Page 18 of 18
Nov 9, 2017
Package Outline Drawing
M14.15
14 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
Rev 1, 10/09
A
D
4
0.25 A-BMC
C
0.10 C
5B
D
3
0.10 A-BC
4
0.20 C 2X
2X
0.10 DC 2X
H
0.10 C
6
36
ID MARK
PIN NO.1 (0.35) x 45°
SEATING PLANE
GAUGE PLANE
0.25
(5.40)
(1.50)
1.27
0.31-0.51
4° ± 4°
DETAIL"A" 0.22±0.03
0.10-0.25
1.25 MIN
1.75 MAX
(1.27) (0.6)
6.0
8.65
3.9
7
14 8
Dimensioning and tolerancing conform to AMSEY14.5m-1994.
Dimension does not include interlead flash or protrusions.
Dimensions in ( ) for Reference Only.
Interlead flash or protrusions shall not exceed 0.25mm per side.
Datums A and B to be determined at Datum H.
4.
5.
3.
2.
Dimensions are in millimeters.
NOTES:
1.
The pin #1 indentifier may be either a mold or mark feature.
6. Does not include dambar protrusion. Allowable dambar protrusion
7. Reference to JEDEC MS-012-AB.
shall be 0.10mm total in excess of lead width at maximum condition.
DETAIL "A"
SIDE VIEW
TYPICAL RECOMMENDED LAND PATTERN
TOP VIEW
For the most recent package outline drawing, see M14.15.
Mouser Electronics
Authorized Distributor
Click to View Pricing, Inventory, Delivery & Lifecycle Information:
Intersil:
ISL3179EFBZ ISL3179EFBZ-T ISL3179EFBZ-T7A ISL3179EFRZ ISL3179EFRZ-T ISL3179EFUZ ISL3179EFUZ-T
ISL3179EIBZ ISL3179EIBZ-T ISL3179EIBZ-T7A ISL3179EIRZ ISL3179EIRZ-T ISL3179EIUZ ISL3179EIUZ-T
ISL3180EIBZ ISL3180EIBZ-T ISL3179EFUZ-T7A ISL3179EIRZ-T7A ISL3179EFRZ-T7A ISL3179EIUZ-T7A
