STL20N6F7 N-channel 60 V, 0.0046 typ., 20 A STripFETTM F7 Power MOSFET in a PowerFLATTM 3.3x3.3 package Datasheet - production data Features 1 2 3 * * * * 4 PowerFLATTM 3.3x3.3 HV Order code VDS RDS(on) max ID STL20N6F7 60 V 0.0054 20 A Among the lowest RDS(on) on the market Excellent figure of merit (FoM) Low Crss/Ciss ratio for EMI immunity High avalanche ruggedness Applications * Switching applications Figure 1: Internal schematic diagram Description D(5, 6, 7, 8) 8 7 6 5 1 2 3 4 G(4) S(1, 2, 3) This N-channel Power MOSFET utilizes STripFETTM F7 technology with an enhanced trench gate structure that results in very low onstate resistance, while also reducing internal capacitance and gate charge for faster and more efficient switching. AM15810v1 Table 1: Device summary Order code Marking Package Packing STL20N6F7 20N6F PowerFLATTM 3.3x3.3 Tape and reel June 2015 DocID027433 Rev 3 This is information on a product in full production. 1/13 www.st.com Contents STL20N6F7 Contents 1 Electrical ratings ............................................................................. 3 2 Electrical characteristics ................................................................ 4 2.1 Electrical characteristics .................................................................... 5 3 Test circuits ..................................................................................... 7 4 Package mechanical data ............................................................... 8 4.1 5 2/13 PowerFLAT 3.3x3.3 package information ......................................... 9 Revision history ............................................................................ 12 DocID027433 Rev 3 STL20N6F7 1 Electrical ratings Electrical ratings Table 2: Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage 60 V VGS Gate-source voltage 20 V ID Drain current (continuous) at TC = 25 C 100 A (1) ID Drain current (continuous) at TC = 100 C 61 A (1) (1)(2) IDM Drain current (pulsed) 400 A (3) ID Drain current (continuous) at Tpcb = 25 C 20 A (3) ID Drain current (continuous) at Tpcb = 100 C 12 A (2)(3) IDM Drain current (pulsed) 80 A PTOT (1) Total dissipation at TC = 25 C 78 W PTOT (3) Total dissipation at Tpcb = 25 C 3 W -55 to 150 C Value Unit Tstg Storage temperature Tj Operating junction temperature Notes: (1) (2) (3) This value is rated according to Rthj-c. Pulse width limited by safe operating area. This value is rated according to Rthj-pcb. Table 3: Thermal data Symbol Rthj-pcb (1) Rthj-case Parameter Thermal resistance junction-pcb max. 42.8 C/W Thermal resistance junction-case max. 1.6 C/W Notes: (1) When mounted on FR-4 board of 1 inch, 2oz Cu, t < 10 sec. DocID027433 Rev 3 3/13 Electrical characteristics 2 STL20N6F7 Electrical characteristics (TC = 25 C unless otherwise specified) Table 4: On /off states Symbol Parameter Test conditions Drain-source breakdown voltage ID = 1 mA, VGS = 0 V IDSS Zero gate voltage drain current VGS = 0 V VDS = 60 V IGSS Gate-body leakage current VGS = 20 V, VDS = 0 VGS(th) Gate threshold voltage VDS = VGS, ID = 250 A RDS(on) Static drain-source on-resistance VGS = 10 V, ID = 10 A V(BR)DSS Min. Typ. Max. 60 Unit V 1 A 100 nA 4 V 0.0046 0.0054 Min. Typ. Max. Unit - 1600 - pF - 880 - pF - 66 - pF - 25 - nC - 7.2 - nC - 8.1 - nC Min. Typ. Max. Unit - 15 - ns - 17.6 - ns - 24.4 - ns - 7.8 - ns Min. Typ. Max. Unit 1.2 V 2 Table 5: Dynamic Symbol Parameter Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Qg Total gate charge Qgs Gate-source charge Qgd Gate-drain charge Test conditions VDS = 25 V, f = 1 MHz, VGS = 0 V VDD = 30 V, ID = 20 A, VGS = 10 V Table 6: Switching times Symbol td(on) tr td(off) tf Parameter Test conditions Turn-on delay time Rise time Turn-off delay time VDD = 30 V, ID = 10 A, RG = 4.7 , VGS = 10 V Fall time Table 7: Source-drain diode Symbol (1) VSD trr Parameter Forward on voltage Test conditions ISD = 20 A, VGS = 0 Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current ID = 20 A, di/dt = 100 A/s VDD = 48 V Notes: (1) 4/13 Pulsed: pulse duration = 300 s, duty cycle 1.5% DocID027433 Rev 3 - 39.6 ns - 36 nC - 1.8 A STL20N6F7 2.1 Electrical characteristics Electrical characteristics Figure 2: Safe operating area Figure 3: Thermal impedance Figure 4: Output characteristics Figure 5: Transfer characteristics Figure 6: Gate charge vs gate-source voltage Figure 7: Static drain-source on-resistance DocID027433 Rev 3 5/13 Electrical characteristics STL20N6F7 Figure 8: Capacitance variations Figure 9: Normalized gate threshold voltage vs temperature Figure 10: Normalized on-resistance vs temperature Figure 11: Normalized V(BR)DSS vs temperature Figure 12: Source-drain diode forward characteristics 6/13 DocID027433 Rev 3 STL20N6F7 3 Test circuits Test circuits Figure 13: Switching times test circuit for resistive load Figure 14: Gate charge test circuit Figure 15: Test circuit for inductive load switching and diode recovery times Figure 16: Unclamped inductive load test circuit Figure 17: Unclamped inductive waveform Figure 18: Switching time waveform DocID027433 Rev 3 7/13 Package mechanical data 4 STL20N6F7 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of (R) (R) ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. (R) ECOPACK is an ST trademark. 8/13 DocID027433 Rev 3 STL20N6F7 4.1 Package mechanical data PowerFLAT 3.3x3.3 package information Figure 19: PowerFLATTM 3.3x3.3 HV package outline BOTTOM VIEW SIDE VIEW TOP VIEW 8465286_A DocID027433 Rev 3 9/13 Package mechanical data STL20N6F7 Table 8: PowerFLATTM 3.3x3.3 HV package mechanical data mm Dim. Min. Typ. Max. A 0.70 0.80 0.90 b 0.25 0.30 0.39 c 0.14 0.15 0.20 D 3.10 3.30 3.50 D1 3.05 3.15 3.25 D2 2.15 2.25 2.35 e 0.55 0.65 0.75 E 3.10 3.30 3.50 E1 2.90 3.00 3.10 E2 1.60 1.70 1.80 H 0.25 0.40 0.55 K 0.65 0.75 0.85 L 030 0.45 0.60 L1 0.05 0.15 0.25 L2 10/13 0.5 8 DocID027433 Rev 3 10 12 STL20N6F7 Package mechanical data Figure 20: PowerFLATTM 3.3x3.3 HV recommended footprint 8465286_footprint DocID027433 Rev 3 11/13 Revision history 5 STL20N6F7 Revision history Table 9: Document revision history Date Changes 28-Jan-2015 1 First release. 03-Feb-2015 2 Updated Table 2: "Absolute maximum ratings" 3 In Section 2 Electrical characteristics: - updated Table 5: Dynamic - updated Table 6: Switching times - updated Table 7: Source-drain diode Added Section 2.1 Electrical characteristics (curves) 10-Jun-2015 12/13 Revision DocID027433 Rev 3 STL20N6F7 IMPORTANT NOTICE - PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST's terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers' products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. (c) 2015 STMicroelectronics - All rights reserved DocID027433 Rev 3 13/13