LT1336
1
1336fa
Typical applicaTion
FeaTures DescripTion
Half-Bridge N-Channel
Power MOSFET Driver
with Boost Regulator
The LT
®
1336 is a cost effective half-bridge N-channel
power MOSFET driver. The floating driver can drive the
topside N-channel power MOSFETs operating off a high
voltage (HV) rail of up to 60V (absolute maximum). In
PWM operation an on-chip switching regulator maintains
charge in the bootstrap capacitor even when approaching
and operating at 100% duty cycle.
The internal logic prevents the inputs from turning on
the power MOSFETs in a half-bridge at the same time. Its
unique adaptive protection against shoot-through cur-
rents eliminates all matching requirements for the two
MOSFETs. This greatly eases the design of high efficiency
motor control and switching regulator systems.
During low supply or start-up conditions, the undervoltage
lockout actively pulls the driver outputs low to prevent
the power MOSFETs from being partially turned on. The
0.5V hysteresis allows reliable operation even with slowly
varying supplies.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
applicaTions
n Floating Top Driver Switches Up to 60V
n Internal Boost Regulator for DC Operation
n 180ns Transition Times Driving 10,000pF
n Adaptive Nonoverlapping Gate Drives Prevent
Shoot-Through
n Drives Gate of Top N-Channel MOSFET
Above Supply
n Top Drive Maintained at High Duty Cycles
n TTL/CMOS Input Levels
n Undervoltage Lockout with Hysteresis
n Operates at Supply Voltages from 10V to 15V
n Separate Top and Bottom Drive Pins
n PWM of High Current Inductive Loads
n Half-Bridge and Full-Bridge Motor Control
n Synchronous Step-Down Switching Regulators
n 3-Phase Brushless Motor Drive
n High Current Transducer Drivers
n Class D Power Amplifiers
+
+
+
SV+
PV+
UVOUT
INTOP
INBOTTOM
16
14
13
12
11
9
8
1
2
10
5
3
4
SWITCH
BOOST
TGATEDR
TGATEFB
TSOURCE
BGATEDR
BGATEFB
LT1336
ISENSE
1N4148
200µH*
HV = 40V MAX**
CBOOST
1µF
10µF
25V
12V
PWM
0Hz TO 100kHz
1336 TA01
IRFZ44
IRFZ44
6 15 7
1000µF
100V
SGND PGNDSWGND
1N4148
RSENSE
2Ω
1/4W
* SUMIDA RCR-664D-221KC
** FOR HV > 40V SEE “DERIVING THE FLOATING
SUPPLY WITH THE FLYBACK TOPOLOGY” IN
APPLICATIONS INFORMATION SECTION
INTOP INBOTTOM TGATEDR BGATEDR
L L L L
L H L H
H L H L
H H L L
LT1336
2
1336fa
absoluTe MaxiMuM raTings
Supply Voltage (Pins 2, 10) ....................................... 20V
Boost Voltage ............................................................75V
Peak Output Currents (<10µs) ..................................1.5A
Input Pin Voltages .............................. –0.3V to V+ + 0.3V
Top Source Voltage ....................................... –5V to 60V
Boost-to-Source Voltage
(VBOOST – VTSOURCE) ............................. –0.3V to 20V
(Note 1)
orDer inForMaTion
LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE
LT1336CN#PBF LT1336CN#TRPBF LT1336CN 16-Lead Plastic DIP 0°C to 70°C
LT1336IN#PBF LT1336IN#TRPBF LT1336IN 16-Lead Plastic DIP –40°C to 85°C
LT1336CS#PBF LT1336CS#TRPBF LT1336CS 16-Lead Plastic SO 0°C to 70°C
LT1336IS#PBF LT1336IS#TRPBF LT1336IS 16-Lead Plastic SO –40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
Switch Voltage (Pin 16) .............................. –0.3V to 60V
Operating Temperature Range
Commercial ............................................. 0°C to 70°C
Industrial .............................................–40°C to 85°C
Junction Temperature (Note 2) ............................. 125°C
Storage Temperature Range .................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec) ................... 300°C
1
2
3
4
5
6
7
8
TOP VIEW
N PACKAGE
16-LEAD PLASTIC DIP
16
15
14
13
12
11
10
9
ISENSE
SV+
INTOP
INBOTTOM
UVOUT
SGND
PGND
BGATEFB
SWITCH
SWGND
BOOST
TGATEDR
TGATEFB
TSOURCE
PV+
BGATEDR
TJMAX = 125°C, θJA = 70°C/W
TOP VIEW
S PACKAGE
16-LEAD PLASTIC SO
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
ISENSE
SV+
INTOP
INBOTTOM
UVOUT
SGND
PGND
BGATEFB
SWITCH
SWGND
BOOST
TGATEDR
TGATEFB
TSOURCE
PV+
BGATEDR
TJMAX = 125°C, θJA = 110°C/W
pin conFiguraTion
LT1336
3
1336fa
elecTrical characTerisTics
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. Test Circuit, V+ = VBOOST = 12V, VTSOURCE = 0V and Pins 1, 16 open. Gate
Feedback pins connected to Gate Drive pins unless otherwise specified.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
ISDC Supply Current (Note 3) V+ = 15V, VINTOP = 0.8V, VINBOTTOM = 2V
V+ = 15V, VINTOP = 2V, VINBOTTOM = 0.8V
V+ = 15V, VINTOP = 0.8V, VINBOTTOM = 0.8V
V+ = 15V, VTSOURCE = 40V, VINTOP = VINBOTTOM =
0.8V (Note 4)
12
12
12
15
14
15
30
20
20
20
40
mA
mA
mA
mA
IBOOST Boost Current (Note 3) V+ = 15V, VTSOURCE = 60V, VBOOST = 75V,
VINTOP = VINBOTTOM = 0.8V
3 5 7 mA
VIL Input Logic Low l1.4 0.8 V
VIH Input Logic High l2 1.7 V
IIN Input Current VINTOP = VINBOTTOM = 4V l7 25 µA
V+UVH V+ Undervoltage Start-Up Threshold 8.4 9.2 9.75 V
V+UVL V+ Undervoltage Shutdown Threshold 7.8 8.3 8.9 V
VBUVH VBOOST Undervoltage Start-Up Threshold VTSOURCE = 60V, VBOOST – VTSOURCE 8.8 9.3 9.8 V
VBUVL VBOOST Undervoltage Shutdown Threshold VTSOURCE = 60V, VBOOST – VTSOURCE 8.2 8.7 9.2 V
IUVOUT Undervoltage Output Leakage V+ = 15V l0.1 5 µA
VUVOUT Undervoltage Output Saturation V+ = 7.5V, IUVOUT = 2.5mA l0.2 0.4 V
VOH Top Gate ON Voltage VINTOP = 2V, VINBOTTOM = 0.8V,
VTGATE DR – VTSOURCE
l11 11.3 12 V
Bottom Gate ON Voltage VINTOP = 0.8V, VINBOTTOM = 2V, VBGATE DR l11 11.3 12 V
VOL Top Gate OFF Voltage VINTOP = 0.8V, VINBOTTOM = 2V,
VTGATE DR – VTSOURCE
l0.4 0.7 V
Bottom Gate OFF Voltage VINTOP = 2V, VINBOTTOM = 0.8V, VBGATE DR l0.4 0.7 V
VIS ISENSE Peak Current Threshold VTSOURCE = 60V, VBOOST = 68V, V + – VISENSE 310 480 650 mV
VISHYS ISENSE Hysteresis VTSOURCE = 60V, VBOOST = 68V 25 55 85 mV
VSAT Switch Saturation Voltage VISENSE = V+, VBOOST – VTSOURCE = 9V,
ISW = 100mA
l0.85 1.2 V
VBOUT VBOOST Regulated Output VTSOURCE = 40V, VINTOP = VINBOTTOM = 0.8V,
IBOOST = 10mA, VBOOST – VTSOURCE
10 10.6 11.2 V
trTop Gate Rise Time VINTOP (+) Transition, VINBOTTOM = 0.8V,
Measured at VTGATE DR – VTSOURCE (Note 5)
l130 200 ns
Bottom Gate Rise Time VINBOTTOM (+) Transition, VINTOP = 0.8V,
Measured at VBGATE DR (Note 5)
l90 200 ns
tfTop Gate Fall Time VINTOP (–) Transition, VINBOTTOM = 0.8V,
Measured at VTGATE DR – VTSOURCE (Note 5)
l60 140 ns
Bottom Gate Fall Time VINBOTTOM (–) Transition, VINTOP = 0.8V,
Measured at VBGATE DR (Note 5)
l60 140 ns
tD1 Top Gate Turn-On Delay VINTOP (+) Transition, VINBOTTOM = 0.8V,
Measured at VTGATE DR – VTSOURCE (Note 5)
l250 500 ns
Bottom Gate Turn-On Delay VINBOTTOM (+) Transition, VINTOP = 0.8V,
Measured at VBGATE DR (Note 5)
l200 400 ns
tD2 Top Gate Turn-Off Delay VINTOP (–) Transition, VINBOTTOM = 0.8V,
Measured at VTGATE DR – VTSOURCE (Note 5)
l300 600 ns
Bottom Gate Turn-Off Delay VINBOTTOM (–) Transition, VINTOP = 0.8V,
Measured at VBGATE DR (Note 5)
l200 400 ns
LT1336
4
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Typical perForMance characTerisTics
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: TJ is calculated from the ambient temperature TA and power
dissipation PD according to the following formulas:
LT1336CN/LT1336IN: TJ = TA + (PD)(70°C/W)
LT1336CS/LT1336IS: TJ = TA + (PD)(110°C/W)
Note 3: Dynamic supply current is higher due to the gate charge
being delivered at the switching frequency. See Typical Performance
Characteristics and Applications Information sections.
Note 4: Pins 1 and 16 connected to each end of the inductor. Booster is
free running.
Note 5: See Timing Diagram. Gate rise times are measured from 2V to 10V
and fall times are measured from 10V to 2V. Delay times are measured
from the input transition to when the gate voltage has risen to 2V or
decreased to 10V.
elecTrical characTerisTics
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. Test Circuit, V+ = VBOOST = 12V, VTSOURCE = 0V and Pins 1, 16 open. Gate
Feedback pins connected to Gate Drive pins unless otherwise specified.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
tD3 Top Gate Lockout Delay VINBOTTOM (+) Transition, VINTOP = 2V,
Measured at VTGATE DR – VTSOURCE (Note 5)
l300 600 ns
Bottom Gate Lockout Delay VINTOP (+) Transition, VINBOTTOM = 2V,
Measured at VBGATE DR (Note 5)
l250 500 ns
tD4 Top Gate Release Delay VINBOTTOM (–) Transition, VINTOP = 2V,
Measured at VTGATE DR – VTSOURCE (Note 5)
l250 500 ns
Bottom Gate Release Delay VINTOP (–) Transition, VINBOTTOM = 2V,
Measured at VBGATE DR (Note 5)
l200 400 ns
DC Supply Current
vs Supply Voltage
DC Supply Current
vs Top Source Voltage
DC Supply Current
vs Temperature
SUPPLY VOLTAGE (V)
4
SUPPLY CURRENT (mA)
16
22
20
18
16
14
12
10
8
6
1336 G01
86 10 12 14 2018
BOTH INPUTS
HIGH OR LOW
VTSOURCE = 0V
VINTOP = HIGH
VINBOTTOM = LOW
VINTOP = LOW
VINBOTTOM = HIGH
TEMPERATURE (C)
–50
SUPPLY CURRENT (mA)
100
18
17
16
15
14
13
12
11
10
9
1336 G02
0–25 25 50 75 125
BOTH INPUTS
HIGH OR LOW
VINTOP = HIGH
VINBOTTOM = LOW
V+ = 12V
VTSOURCE = 0V
VINTOP = LOW
VINBOTTOM = HIGH
TOP SOURCE VOLTAGE (V)
0
SUPPLY CURRENT (mA)
30
34
31
28
25
22
19
16
13
10
1336 G18
105 15 20 25 4035
BOTH INPUTS
HIGH OR LOW
V+= 12V
VINTOP = HIGH
VINBOTTOM = LOW
VINTOP = LOW
VINBOTTOM = HIGH
LT1336
5
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Typical perForMance characTerisTics
DC + Dynamic Supply Current
vs Input Frequency
DC + Dynamic Supply Current
vs Input Frequency Undervoltage Lockout (V+)
Bottom Gate Fall Time
vs Temperature
Top or Bottom Input Pin Current
vs Input Voltage
Bottom Gate Rise Time
vs Temperature
Top or Bottom Input Pin Current
vs Temperature
Input Threshold Voltage
vs TemperatureUndervoltage Lockout (VBOOST)
INPUT FREQUENCY (kHz)
1
SUPPLY CURRENT (mA)
60
50
40
30
20
10
010 100 1000
1336 G04
CGATE = 10000pF
CGATE = 1000pF
50% DUTY CYCLE
V+ = 12V
CGATE = 3000pF
TEMPERATURE (C)
–50
SUPPLY VOLTAGE (V)
100
13
12
11
10
9
8
7
6
5
4
1336 G05
0–25 25 50 75 125
SHUTDOWN THRESHOLD
START-UP THRESHOLD
INPUT FREQUENCY (kHz)
1
SUPPLY CURRENT (mA)
60
50
40
30
20
10
010 100 1000
1336 G03
V+ = 20V
50% DUTY CYCLE
CGATE = 3000pF
V+ = 15V V+ = 10V
TEMPERATURE (C)
–50
INPUT THRESHOLD VOLTAGE (V)
100
2.0
1.8
1.6
1.4
1.2
1.0
0.8
1336 G07
0–25 25 50 75 125
VLOW
VHIGH
V+ = 12V
TEMPERATURE (C)
–50
INPUT CURRENT (µA)
14
13
12
11
10
9
8
7
6
5
4050 75
1336 G08
–25 25 100 125
V+ = 12V
VIN = 4V
TEMPERATURE (C)
–50
V
BOOST
– V
TSOURCE
VOLTAGE (V)
100
13
12
11
10
9
8
7
6
5
4
1336 G06
0–25 25 50 75 125
SHUTDOWN THRESHOLD
START-UP THRESHOLD
VTSOURCE = 60V
TEMPERATURE (C)
–50
BOTTOM GATE RISE TIME (ns)
100
230
210
190
170
150
130
110
90
70
50
1336 G10
0–25 25 50 75 125
CLOAD = 10000pF
CLOAD = 3000pF
CLOAD = 1000pF
V+ = 12V
TEMPERATURE (C)
–50
BOTTOM GATE FALL TIME (ns)
100
210
190
170
150
130
110
90
70
50
30
1336 G11
0–25 25 50 75 125
CLOAD = 10000pF
CLOAD = 3000pF
V+ = 12V
CLOAD = 1000pF
INPUT VOLTAGE (V)
4
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
89
1336 G09
5 6 7 10 11 12
V+ = 12V
LT1336
6
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Typical perForMance characTerisTics
Turn-Off Delay Time
vs Temperature
Lockout Delay Time
vs Temperature
Release Delay Time
vs Temperature
VBOOST Regulated Output
vs Temperature
ISENSE Voltage Threshold
vs Temperature
Turn-On Delay Time
vs Temperature
Top Gate Rise Time
vs Temperature
Top Gate Fall Time
vs Temperature
TEMPERATURE (C)
–50
TOP GATE RISE TIME (ns)
100
300
280
260
240
220
200
180
160
140
120
100
80
1336 G12
0–25 25 50 75 125
CLOAD = 10000pF
CLOAD = 3000pF
V+ = 12V
CLOAD = 1000pF
TEMPERATURE (C)
–50
TOP GATE FALL TIME (ns)
100
1336 G13
0 50
180
160
140
120
100
80
60
40
20
–25 25 75 125
CLOAD = 10000pF
CLOAD = 3000pF
V+ = 12V
CLOAD = 1000pF
TEMPERATURE (C)
–50
TURN-ON DELAY TIME (ns)
100
400
350
300
250
200
150
100
1336 G14
0–25 25 50 75 125
BOTTOM DRIVER
TOP DRIVER
V+ = 12V
CLOAD = 3000pF
TEMPERATURE (C)
–50
TURN-OFF DELAY TIME (ns)
100
400
350
300
250
200
150
100
1336 G15
0–25 25 50 75 125
BOTTOM DRIVER
TOP DRIVER
V+ = 12V
CLOAD = 3000pF
TEMPERATURE (C)
–50
LOCKOUT DELAY TIME (ns)
100
400
350
300
250
200
150
100
1336 G16
0–25 25 50 75 125
BOTTOM DRIVER
TOP DRIVER
V+ = 12V
CLOAD = 3000pF
TEMPERATURE (C)
–50
RELEASE DELAY TIME (ns)
100
400
350
300
250
200
150
100
1336 G17
0–25 25 50 75 125
BOTTOM DRIVER
TOP DRIVER
V+ = 12V
CLOAD = 3000pF
TEMPERATURE (C)
–50
VBOOST REGULATED OUTPUT (V)
100
1336 G19
0 50
12.0
11.5
11.0
10.5
10.0
9.5
9.0
8.5
8.0
–25 25 75 125
VBOOST – VTSOURCE
V+ = 12V
VTSOURCE = 40V
ILOAD = 10mA
TEMPERATURE (C)
–50
I
SENSE
VOLTAGE THRESHOLD (mV)
100
1336 G20
0 50
0.52
0.50
0.48
0.46
0.44
0.42
0.40
0.38
0.36
–25 25 75 125
HIGH VOLTAGE THRESHOLD
LOW VOLTAGE THRESHOLD
V+ = 12V
VBOOST = 68V
VTSOURCE = 60V
LT1336
7
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pin FuncTions
ISENSE (Pin 1): Boost Regulator ISENSE Comparator Input.
An RSENSE placed between Pin 1 and V + sets the maximum
peak current. Pin 1 can be left open if the boost regulator
is not used.
SV+
(Pin 2): Main Signal Supply. Must be closely decoupled
to the signal ground Pin 6.
INTOP (Pin 3): Top Driver Input. Pin 3 is disabled when
Pin 4 is high. A 3k input resistor followed by a 5V internal
clamp prevents saturation of the input transistors.
INBOTTOM (Pin 4): Bottom Driver Input. Pin 4 is disabled
when Pin 3 is high. A 3k input resistor followed by a 5V
internal clamp prevents saturation of the input transistors.
UVOUT (Pin 5): Undervoltage Output. Open collector
NPN output which turns on when V+ drops below the
undervoltage threshold.
SGND (Pin 6): Small-Signal Ground. Must be routed
separately from other grounds to the system ground.
PGND (Pin 7): Bottom Driver Power Ground. Connects to
source of bottom N-channel MOSFET.
BGATEFB (Pin 8): Bottom Gate Feedback. Must connect
directly to the bottom power MOSFET gate. The top
MOSFET turn-on is inhibited until Pin 8 has discharged
to below 2.5V.
BGATEDR (Pin 9): Bottom Gate Drive. The high current
drive point for the bottom MOSFET. When a gate resistor
is used it is inserted between Pin 9 and the gate of the
MOSFET.
PV+ (Pin 10): Bottom Driver Supply. Must be connected
to the same supply as Pin 2.
T
SOURCE (Pin 11): Top Driver Return. Connects to the top
MOSFET source and the low side of the bootstrap capacitor.
TGATEFB (Pin 12): Top Gate Feedback. Must connect
directly to the top power MOSFET gate. The bottom
MOSFET turn-on is inhibited until VTGATE FB – VTSOURCE
has discharged to below 2.9V.
TGATEDR (Pin 13): Top Gate Drive. The high current drive
point for the top MOSFET. When a gate resistor is used it
is inserted between Pin 13 and the gate of the MOSFET.
BOOST (Pin 14): Top Driver Supply. Connects to the high
side of the bootstrap capacitor.
SWGND (Pin 15): Boost Regulator Ground. Must be routed
separately from the other grounds to the system ground.
Pin 15 can be left open if the boost regulator is not used.
SWITCH (Pin 16): Boost Regulator Switch. Connect this
pin to the inductor/diode of the boost regulator network.
Pin 16 can be left open if the boost regulator is not used.
LT1336
8
1336fa
FuncTional DiagraM
–
+
–
+
SV+
SV+
ISENSE
INTOP
INBOTTOM
BOOST
TRIP = 10.6V
TRIP = 8.7V
16 SWITCH
SWGND
TGATEDR
TGATEFB
TSOURCE
PV+
BGATEDR
1336 FD
SGND
PGND
BIAS
3k
2
4
5
6
1
3k
TOP UV
DETECT
BOTTOM
UV LOCK
2.9V
2.5V
480mV
5V
5V
6V
UVOUT
–
+
15
14
13
12
11
10
9
BGATEFB 8
3
7
LT1336
9
1336fa
TesT circuiT
TiMing DiagraM
SWITCH
SWGND
BOOST
TGATEDR
TGATEFB
TSOURCE
PV+
BGATEDR
ISENSE
SV+
INTOP
INBOTTOM
UVOUT
SGND
PGND
BGATEFB
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
3k
50Ω
50Ω
1µF
1µF
3000pF
1336 TC01
LT1336
200µH*
1N4148
* SUMIDA RCR-664D-221KC
2Ω
3000pF
+
V/I
+
V/I
+
V
+
V
+
V
+
V/I
+
V
10V
2V
INTOP
INBOTTOM
TOP GATE
DRIVER
BOTTOM
GATE
DRIVER
2V
0.8V
2V
0.8V
12V
0V
12V
0V
tr
tD1
tD3
10V
2V
tr
tD2
tD4
tf
tD3 tD2
tftD4
1336 TD
tD1
LT1336
10
1336fa
applicaTions inForMaTion
operaTion
ing supply. This allows the output to smoothly transition
to 100% duty cycle.
An undervoltage detection circuit disables both channels
when V+ is below the undervoltage trip point. A separate
undervoltage detect block disables the high side channel
when VBOOST – VTSOURCE is below 9V.
The top and bottom gate drivers in the LT1336 each utilize
two gate connections: 1) a Gate Drive pin, which provides
the turn-on and turn-off currents through an optional series
gate resistor, and 2) a Gate Feedback pin which connects
directly to the gate to monitor the gate-to-source voltage.
Whenever there is an input transition to command the
outputs to change states, the LT1336 follows a logical
sequence to turn off one MOSFET and turn on the other.
First, turn-off is initiated, then VGS is monitored until it
has decreased below the turn-off threshold, and finally
the other gate is turned on.
The LT1336 incorporates two independent driver chan-
nels with separate inputs and outputs. The inputs are
TTL/CMOS compatible; they can withstand input voltages
as high as V+. The 1.4V input threshold is regulated and
has 300mV of hysteresis. Both channels are noninverting
drivers. The internal logic prevents both outputs from
simultaneously turning on under any input conditions.
When both inputs are high both outputs are actively
held low.
An internal switching regulator permits smooth transi-
tion from PWM to DC operation. In PWM operation the
bootstrap capacitor is recharged each time Top Source pin
goes low. As the duty cycle approaches 100% the output
pulse width becomes narrower and the time available to
produce an elevated upper MOSFET gate supply becomes
shorter than required. As the voltage across the bootstrap
capacitor drops below 10.6V, an inductor-based switching
regulator kicks in and takes over the charging of the float-
connected between V+ and the Boost pin is still needed to
allow conventional bootstrapping of the bootstrap capaci-
tor when duty cycles are below 90%.
The LT1336’s internal switching regulator can provide
enough charge to the bootstrap capacitor to allow the
top driver to drive several power MOSFETs in parallel at
its maximum operating frequency. The regulated voltage
across VBOOST – VTSOURCE is 10.6V; when this voltage is
exceeded due to normal bootstrap action, the regulator
automatically shuts down.
The switching regulator uses a hysteretic current mode
control. This method of control is simple, inherently stable
and provides peak inductor current limit in every cycle. It is
designed to run at a nominal frequency of around 700kHz
which is 7× the maximum PWM operating frequency of the
LT1336. Since the hysteretic current mode control has no
internal oscillator, the frequency is determined by external
conditions such as supply voltage and load currents and
external components such as inductor value and current
sense resistor value.
Deriving the Floating Supply
In a typical half-bridge driver like the LT1158 or the LT1160,
the floating supply for the topside driver is provided by
a bootstrap capacitor. This capacitor is recharged each
time its negative plate goes low in PWM operation. As
the duty cycle approaches 100% the output pulse width
becomes narrower and the time available to recharge the
bootstrap capacitor becomes shorter than required (1µs
to 2µs). For instance, at 100kHz and at 95% duty cycle the
output pulse width is only 0.5µs; clearly this is insufficient
time to recharge the capacitor by bootstrapping. To get
around this problem, the LT1336 incorporates a switching
regulator to help recharge the bootstrap capacitor under
such extreme conditions.
The LT1336 provides all the necessary circuitry to construct
a boost or flyback switching regulator. This regulator can
charge the bootstrap capacitor when it cannot recharge
by bootstrapping. This happens when nearing 100% duty
cycle in PWM applications. This is a worst-case condition
because the bootstrap capacitor must still provide for the
gate charging current of the high side MOSFETs. A diode
(Refer to Functional Diagram)
LT1336
11
1336fa
applicaTions inForMaTion
Figure 1. Using the Boost Regulator
In applications where switching is always above 10kHz
and the duty cycle never exceeds 90%, Pins 1, 15 and 16
can be left open. The bootstrap capacitor is then charged
by conventional bootstrapping. Only a diode needs to be
connected between V+ and the Boost pin. A 0.1µF bootstrap
capacitor is usually adequate using this technique for driv-
ing a single MOSFET under 10,000pF. When driving multiple
MOSFETs in parallel, if the total gate capacitance exceeds
10,000pF, the bootstrap capacitor should be increased
proportionally above 0.1µF (see Paralleling MOSFETs).
Deriving the Floating Supply with the Boost Topology
The advantage of using the boost topology is its simplicity.
Only a resistor, a small inductor, a diode and a capacitor
are needed. However, the high voltage rail may not exceed
40V to avoid reaching the collector-base breakdown volt-
age of the internal NPN switch.
The recommended values for the current sense resistor,
inductor and bootstrap capacitor are 2Ω, 200µH and
1µF respectively. Using the recommended component
values the boost regulator will run at around 700kHz. To
lower the frequency the inductor value can be increased
and to increase the frequency the inductor value can be
decreased. The sense resistor should be at least 1.5Ω to
maintain adequate inductor current limit. The bootstrap
capacitor value should be 1µF or larger to minimize ripple
voltage. An example of a boost regulator is shown in
Figure 1.
The boost regulator works as follows: when switch S is
on, the inductor current ramps up as the magnetic field
builds up. During this interval energy is being stored in the
inductor and no power is transferred to VBOOST. When the
inductor peak current is reached, sensed by the 2Ω resistor,
the switch is turned off. Energy is no longer transferred to
the inductor causing the magnetic field to collapse. The
collapsing magnetic field induces a change in voltage across
the inductor. The Switch pin voltage rises until diode D2
starts conducting. As the inductor current ramps down,
the lower inductor current threshold is reached and switch
S is turned off, thus completing the cycle.
Current drawn from V+ is delivered to VBOOST. Some of
this current (~ 1.5mA) flows through the topside driver
to the Top Source pin. This current is typically returned
to ground via the bottom MOSFET or the output load. If
the bottom MOSFET were off and the output load were
returned to HV, then the Top Source pin will return the
current to HV through the top MOSFET or the output load.
If the HV supply cannot sink current and no load draw-
ing greater than 1.5mA is connected to the supply, then
a resistor from HV to ground may be needed to prevent
voltage buildup on the HV supply.
Note that the current drawn from V+ and delivered to
VBOOST is significantly higher than the current drawn from
VBOOST as given by:
IIN V +
( )
=IOUT
VBOOST
V+
Deriving the Floating Supply with the Flyback
Topology
For applications where the high voltage rail is greater than
40V, the flyback topology must be used. To configure a
flyback regulator, a resistor, a diode, a small 1:1 turns ratio
transformer and a capacitor are needed. The maximum
voltage across the switch, assuming an ideal transformer,
will be about V+ + 11.3V. Leakage inductance in nonideal
transformers will induce an overvoltage spike at the switch
at the instant when it opens. These spikes can be clamped
using a snubbing network or a Zener. Unlike the boost
topology, the current drawn from V+ (assuming no loss)
is equal to the current drawn from VBOOST.
SWITCH
SV+
PV+
RSENSE
2Ω
1/4W
CBOOST
1µF
D2
1N4148
S
HV = 40V MAX
–
+
VBOOST
1336 F01
LT1336
200µH*
D1
1N4148
* SUMIDA RCR-664D-221KC
+
+
SWGND
ISENSE
TGATEDR
TGATEFB
BOOST
TSOURCE
LT1336
12
1336fa
applicaTions inForMaTion
Using the components as shown in Figure 2 the flyback
regulator will run at around 800kHz. To lower the frequency
CFILTER can be increased and to increase the frequency
CFILTER can be decreased.
Power MOSFET Selection
Since the LT1336 inherently protects the top and bottom
MOSFETs from simultaneous conduction, there are no size
or matching constraints. Therefore, selection can be made
based on the operating voltage and RDS(ON) requirements.
The MOSFET BVDSS should be at least equal to the LT1336
absolute maximum operating voltage. For a maximum
operating HV supply of 60V, the MOSFET BVDSS should
be from 60V to 100V.
The MOSFET RDS(ON) is specified at TJ = 25°C and is gen-
erally chosen based on the operating efficiency required
as long as the maximum MOSFET junction temperature is
not exceeded. The dissipation in each MOSFET is given by:
P=D IDS
( )
21+ ∂
( )
RDS ON
( )
where D is the duty cycle and ∂ is the increase in RDS(ON)
at the anticipated MOSFET junction temperature. From this
equation the required RDS(ON) can be derived:
RDS ON
( )
=P
D IDS
( )
21+ ∂
( )
For example, if the MOSFET loss is to be limited to 2W
when operating at 5A and a 90% duty cycle, the required
RDS(ON) would be 0.089Ω/(1 + ∂). (1 + ∂) is given for
each MOSFET in the form of a normalized RDS(ON) vs
temperature curve, but ∂ = 0.007/°C can be used as an
approximation for low voltage MOSFETs. Thus, if TA
= 85°C
and the available heat sinking has a thermal resistance of
20°C/W, the MOSFET junction temperature will be 125°C
and ∂ = 0.007(125 – 25) = 0.7. This means that the required
RDS(ON) of the MOSFET will be 0.089Ω/1.7 = 0.0523Ω,
which can be satisfied by an IRFZ34 manufactured by
International Rectifier.
Transition losses result from the power dissipated in each
MOSFET during the time it is transitioning from off to on,
or from on to off. These losses are proportional to (f)(HV)2
and vary from insignificant to being a limiting factor on
operating frequency in some high voltage applications.
Figure 2. Using the Flyback Regulator
The flyback regulator works as follows: when switch S is
on, the primary current ramps up as the magnetic field
builds up. The magnetic field in the core induces a voltage
on the secondary winding equal to V+. However, no power
is transferred to VBOOST because the rectifier diode D2 is
reverse biased. The energy is stored in the transformer’s
magnetic field. When the primary inductor peak current
is reached, the switch is turned off. Energy is no longer
transferred to the transformer causing the magnetic field
to collapse. The collapsing magnetic field induces a change
in voltage across the transformer’s windings. During this
transition the Switch pin’s voltage flies to 10.6V plus a diode
above V+, the secondary forward biases the rectifier diode
D2 and the transformer’s energy is transferred to VBOOST.
Meanwhile the primary inductor current goes to zero and
the voltage at ISENSE decays to the lower inductor current
threshold with a time constant of (RSENSE)(CFILTER), thus
completing the cycle.
SWITCH
SV+
PV+
RSENSE
2Ω
1/4W
D2
1N4148
40V
1N4148
24V 1000pF 6.2k
S
HV =
60V MAX
1336 F02
LT1336
T1*
1:1
D1
1N4148
* COILTRONICS CTX100-1P
+
SWGND
ISENSE
CBOOST
1µF
CFILTER
0.1µF
–
+
VBOOST
+
TGATEDR
TGATEFB
BOOST
TSOURCE
LT1336
13
1336fa
applicaTions inForMaTion
Paralleling MOSFETs
When the above calculations result in a lower RDS(ON)
than is economically feasible with a single MOSFET, two
or more MOSFETs can be paralleled. The MOSFETs will
inherently share the currents according to their RDS(ON)
ratio as long as they are thermally connected (e.g., on a
common heat sink). The LT1336 top and bottom drivers
can each drive five power MOSFETs in parallel with only a
small loss in switching speeds (see Typical Performance
Characteristics). A low value resistor (10Ω to 47Ω) in
series with each individual MOSFET gate may be required
to “decouple” each MOSFET from its neighbors to pre-
vent high frequency oscillations (consult manufacturer’s
recommendations). If gate decoupling resistors are used,
the corresponding Gate Feedback pin can be connected
to any one of the gates as shown in Figure 3.
Driving multiple MOSFETs in parallel may restrict the
operating frequency to prevent overdissipation in the
LT1336 (see the following Gate Charge and Driver
Dissipation).
The actual increase in supply current is slightly higher
due to LT1336 switching losses and the fact that the gates
are being charged to more than 10V. Supply Current vs
Switching Frequency is given in the Typical Performance
Characteristics.
The LT1336 junction temperature can be estimated by
using the equations given in Note 1 of the Electrical Char-
acteristics. For example, the LT1336IS is limited to less
than 31mA from a 12V supply:
TJ = 85°C + (31mA)(12V)(110°C/W)
= 126°C exceeds absolute maximum
In order to prevent the maximum junction temperature
from being exceeded, the LT1336 supply current must be
verified while driving the full complement of the chosen
MOSFET type at the maximum switching frequency.
Ugly Transient Issues
In PWM applications the drain current of the top MOSFET
is a square wave at the input frequency and duty cycle. To
prevent large voltage transients at the top drain, a low ESR
electrolytic capacitor must be used and returned to the
power ground. The capacitor is generally in the range of
25µF to 5000µF and must be physically sized for the RMS
current flowing in the drain to prevent heating and prema-
ture failure. In addition, the LT1336 requires a separate
10µF capacitor connected closely between Pins 2 and 6.
The LT1336 top source is internally protected against
transients below ground and above supply. However, the
Gate Drive pins cannot be forced below ground. In most
applications, negative transients coupled from the source
to the gate of the top MOSFET do not cause any problems.
Switching Regulator Applications
The LT1336 is ideal as a synchronous switch driver to
improve the efficiency of step-down (buck) switching
regulators. Most step-down regulators use a high current
Schottky diode to conduct the inductor current when the
switch is off. The fractions of the oscillator period that the
switch is on (switch conducting) and off (diode conduct-
ing) are given by:
Figure 3. Paralleling MOSFETs
Gate Charge and Driver Dissipation
A useful indicator of the load presented to the driver by
a power MOSFET is the total gate charge QG, which in-
cludes the additional charge required by the gate-to-drain
swing. QG is usually specified for VGS = 10V and VDS =
0.8VDS(MAX). When the supply current is measured in a
switching application, it will be larger than given by the DC
electrical characteristics because of the additional supply
current associated with sourcing the MOSFET gate charge:
ISUPPLY =IDC +dQG
dt
TOP
+dQG
dt
BOTTOM
GATEDR
GATEFB
LT1336 RG*RG*
HV
*OPTIONAL 10Ω 1336 F03
+
LT1336
14
1336fa
Figure 4. Adding Synchronous Switching to a Step-Down Switching Regulator
switch turns back on. However, I2R losses will occur under
these conditions due to the recirculating currents.
The LT1336 performs the synchronous MOSFET drive in a
step-down switching regulator. A reference and PWM are
required to complete the regulator. Any voltage mode or
current mode PWM controller may be used but the LT3526
is particularly well-suited to high power, high efficiency
applications such as the 10A circuit shown in Figure 6. In
higher current regulators a small Schottky diode across
the bottom MOSFET helps to reduce reverse- recovery
switching losses.
Motor Drive Applications
In applications where rotation is always in the same di-
rection, a single LT1336 controlling a half-bridge can be
used to drive a DC motor. One end of the motor may be
connected either to supply or to ground. A motor in this
configuration is controlled by its inputs which give three
alternatives: run, free running stop (coasting) and fast
stop (“plugging” braking with the motor shorted by one
of the MOSFETs).
Whenever possible, returning one end of the motor to
ground is preferable. When the motor is returned to supply
and the boost topology is used to charge the bootstrap
capacitor, the return current from the top driver will find
its way to the high voltage rail through the top MOSFET.
Since most power supplies cannot sink current, this
Switch On= VOUT
HV
Total Period
( )
Switch Off= HV–VOUT
HV
Total Period
( )
Note that for HV > 2VOUT, the switch is off longer than it
is on, making the diode losses more significant than the
switch. The worst case for the diode is during a short cir-
cuit, when VOUT approaches zero and the diode conducts
the short-circuit current almost continuously.
Figure 4 shows the LT1336 used to synchronously drive
a pair of power MOSFETs in a step-down regulator ap-
plication, where the top MOSFET is the switch and the
bottom MOSFET replaces the Schottky diode. Since both
conduction paths have low losses, this approach can result
in very high efficiency (90% to 95%) in most applications.
For regulators under 10A, using low RDS(ON) N-channel
MOSFETs eliminates the need for heat sinks. RGS holds the
top MOSFET off when HV is applied before the 12V supply.
One fundamental difference in the operation of a step-
down regulator with synchronous switching is that it
never becomes discontinuous at light loads. The induc-
tor current doesn’t stop ramping down when it reaches
zero, but actually reverses polarity, resulting in a constant
ripple current independent of load. This does not cause
a significant efficiency loss (as might be expected) since
the negative inductor current is returned to HV when the
applicaTions inForMaTion
+
+
INTOP
INBOTTOM
TGATEDR
TGATEFB
TSOURCE
BGATEDR
BGATEFB
LT1336
HV
VOUT
RGS
RSENSE
1336 F04
REF PWM
OUT A
OUT A
LT1336
15
1336fa
Typical applicaTions
applicaTions inForMaTion
V+
V+
SWITCH
BOOST
TGATEDR
TGATEFB
TSOURCE
BGATEDR
BGATEFB
PGND
LT1336
ISENSE
D1
1N4148
D2
1N4148
CBOOST
1µF
1336 F05
HV = 40V MAX
+
+
RSENSE
2Ω
1/4W
RDISCHRG
24k
*SUMIDA
RCR-664D-221KC
200µH*
10µF
+
–
+
VBOOST
current can raise the voltage of the high voltage rail. This
can be avoided by placing a discharge resistor between HV
supply and ground to divert the return current to ground
as shown in Figure 5. For a high voltage rail of 40V, a 26k
resistor or smaller should be used, since the top driver
will return about 1.5mA.
For applications where using a discharge resistor is un-
desirable, use the flyback regulator topology instead of
the boost regulator topology (see Deriving the Floating
Supply with the Flyback Topology).
To drive a DC motor in both directions, two LT1336s
can be used to drive an H-bridge output stage. In this
configuration the motor can be made to run clockwise,
counterclockwise, stop rapidly (“plugging” braking) or free
run (coast) to a stop. A very rapid stop may be achieved
by reversing the current, though this requires more careful
design to stop the motor dead. In practice a closed-loop
control system with tachometric feedback is usually
necessary.
The motor speed in these examples can be controlled by
switching the drivers with pulse width modulated square
waves. This approach is particularly suitable for micro-
computers/DSP control loops.
Figure 6. 90% Efficiency, 40V to 5V, 10A, Low Dropout Voltage Mode Switching Regulator
Figure 5. Driving a Supply Referenced Motor
+
+
++
+
+
2.2nF
27k
0.1µF
1k
1k
5k
2k
5V
5400µF
LOW
ESR
1336 F06
1µF
10µF
1µF
1µF
0.022µF
C1
0.1µF
360Ω
510Ω
4.7k
0.33µF
330k
12V
1N4148
1N4148
IRFZ44
IRFZ44 MBR340
* SUMIDA RCR-664D-221KC
** MAGNETICS CORE #55585-A2 30 TURNS 14GA MAGNET WIRE
† DALE TYPE LVR-3 ULTRONIX RCS01
IRFZ44
40V
2200µF EA
LOW ESR
RS†
0.007Ω
L2**
70µH
f = 25kHz
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
L1*
200µH
RSENSE
2Ω, 1/4W
SWITCH
SWGND
BOOST
TGATEDR
TGATEFB
TSOURCE
PV+
BGATEDR
LT1336
ISENSE
SV+
INTOP
INBOTTOM
UVOUT
SGND
PGND
BGATEFB
SHUTDOWN
+
2N2222
1N4148
0.1µF 4.7k
1
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
LT3526
1N4148
LT1336
16
1336fa
Typical applicaTions
+
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
8
7
6
5
16
15
14
13
12
11
10
9
1
2
3
4
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
+
1
2
3
4
5
6
7
14
13
12
11
10
9
8
LT1058
TC4428
L*
158µH
330k
IRFZ44
IRFZ44
IRFZ44
IRFZ44
10µF
150k10k
100k
95k
1336 F07
150k
–12V
10k
10k
200k
95k
10k
10k
200k
IN
5V
1k
1k
1k
1k
12V
0.0033µF
0.1µF
0.1µF
1µF
0.0033µF
1k
47µF
47µF
47µF
0.1µF
100µF
0.1µF
10µF
10µF
0.1µF
1000µF
+
1000µF
1N4148
0.1µF
1N4148
330k
LOAD
+
+
LT1015
LT1016
+
+
10k
10k
10k
+
+
* Kool Mµ CORE #77548-A7
35 TURNS 14GA MAGNET WIRE
fCARRIER = 100kHz
60V MAX
SWITCH
SWGND
BOOST
TGATEDR
TGATEFB
TSOURCE
PV+
BGATEDR
LT1336
ISENSE
SV+
INTOP
INBOTTOM
UVOUT
SGND
PGND
BGATEFB
SWITCH
SWGND
BOOST
TGATEDR
TGATEFB
TSOURCE
PV+
BGATEDR
LT1336
ISENSE
SV+
INTOP
INBOTTOM
UVOUT
SGND
PGND
BGATEFB
L*
158µH
10µF
+
+47µF
+
Figure 7. 200W Class D, 10Hz to 1kHz Amplifier
LT1336
17
1336fa
package DescripTion
N16 1002
.255 ± .015*
(6.477 ± 0.381)
.770*
(19.558)
MAX
16
12345678
910
11
12
13
14
15
.020
(0.508)
MIN
.120
(3.048)
MIN
.130 ± .005
(3.302 ± 0.127)
.065
(1.651)
TYP
.045 – .065
(1.143 – 1.651)
.018 ± .003
(0.457 ± 0.076)
.008 – .015
(0.203 – 0.381)
.300 – .325
(7.620 – 8.255)
.325 +.035
–.015
+0.889
–0.381
8.255
()
NOTE:
1. DIMENSIONS ARE INCHES
MILLIMETERS
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm)
.100
(2.54)
BSC
N Package
16-Lead PDIP (Narrow .300 Inch)
(Reference LTC DWG # 05-08-1510)
LT1336
18
1336fa
package DescripTion
S Package
16-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610)
.016 – .050
(0.406 – 1.270)
.010 – .020
(0.254 – 0.508)× 45°
0° – 8° TYP
.008 – .010
(0.203 – 0.254)
1
N
2345678
N/2
.150 – .157
(3.810 – 3.988)
NOTE 3
16 15 14 13
.386 – .394
(9.804 – 10.008)
NOTE 3
.228 – .244
(5.791 – 6.197)
12 11 10 9
S16 0502
.053 – .069
(1.346 – 1.752)
.014 – .019
(0.355 – 0.483)
TYP
.004 – .010
(0.101 – 0.254)
.050
(1.270)
BSC
.245
MIN
N
123 N/2
.160 ±.005
RECOMMENDED SOLDER PAD LAYOUT
.045 ±.005
.050 BSC
.030 ±.005
TYP
INCHES
(MILLIMETERS)
NOTE:
1. DIMENSIONS IN
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
LT1336
19
1336fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
revision hisTory
REV DATE DESCRIPTION PAGE NUMBER
A 10/10 Change to Undervoltage Start-Up Threshold and Undervoltage Shutdown Threshold max limits in Electrical
Characteristics section.
Updated Notes in Electrical Characteristics section.
Updated Related Parts.
3
4
20
LT1336
20
1336fa
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com
LINEAR TECHNOLOGY CORPORATION 1996
LT 1010 REV A • PRINTED IN USA
relaTeD parTs
Typical applicaTion
+
+
+
+
6800pF
100pF 10k
18k
18k
10k
2k
1k
1k
5k
25k
500k
5V
5400µF
LOW ESR
1136 F08
0.1µF
10µF
2.2µF
+
1µF 0.1µF
330k
12V
1N4148
1N4148
1N4148
4700pF
IRFZ34
IRFZ44
MBR340
* HURRICANE LAB
HL-KM147U
** DALE TYPE LVR-3
ULTRONIX RCS01
IRFZ44
40V
2200µF EA
LOW ESR
RS**
0.007Ω
L*
47µH
f = 40kHz
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
+
Q1
LT1846
SWITCH
SWGND
BOOST
TGATEDR
TGATEFB
TSOURCE
PV+
BGATEDR
LT1336
ISENSE
SV+
INTOP
INBOTTOM
UVOUT
SGND
PGND
BGATEFB
Figure 8. 90% Efficiency, 40V to 5V, 10A, Low Dropout Current Mode Switching Regulator
PART NUMBER DESCRIPTION COMMENTS
LT1158 Half-Bridge N-Channel Power MOSFET Driver Single Input, Continuous Current Protection and Internal Charge Pump for DC Operation
LT1160 Half-Bridge N-Channel Power MOSFET Driver One Input per Channel, 60V High Voltage Supply Rail and Undervoltage Protection
LTC4446 High Voltage Highside/Lowside Driver Separate Input Channels, 100V Maximum Input Voltage, MSOP-8