4-245
File Number
1581.4
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
http://www.intersil.com or 407-727-9207 |Copyright © Intersil Corporation 1999
IRF820
2.5A, 500V, 3.000 Ohm, N-Channel Power
MOSFET
This N-Channel enhancement mode silicon gate power field
effect transistor is an advanced power MOSFET designed,
tested, and guaranteed to withstand a specified level of
energy in the breakdown avalanche mode of operation. All of
these power MOSFETs are designed for applications such
as switching regulators, switching convertors, motor drivers,
relay drivers, and drivers for high power bipolar switching
transistors requiring high speed and low gate drive power.
These types can be operated directly from integrated
circuits.
Formerly developmental type TA17405.
Features
2.5A, 500V
•r
DS(ON) = 3.000
Single Pulse Avalanche Energy Rated
SOA is Power Dissipation Limited
Nanosecond Switching Speeds
Linear Transfer Characteristics
High Input Impedance
Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
Packaging
JEDEC TO-220AB
Ordering Information
PART NUMBER PACKAGE BRAND
IRF820 TO-220AB IRF820
NOTE: When ordering, use the entire part number. G
D
S
GATE
DRAIN (FLANGE)
SOURCE
DRAIN
Data Sheet July 1999
4-246
Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified
IRF820 UNITS
Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS 500 V
Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR 500 V
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
TC= 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID2.5
1.6 A
A
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .IDM 8.0 A
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V
GS ±20 V
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD50 W
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.4 W/oC
Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS 210 mJ
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TJ, TSTG -55 to 150 oC
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TL
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg 300
260
oC
oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. TJ= 25oC to 125oC.
Electrical Specifications TC = 25oC, Unless Otherwise Specified
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Drain to Source Breakdown Voltage BVDSS ID = 250µA, VGS = 0V (Figure 10) 500 - - V
Gate Threshold Voltage VGS(TH) VDS = VGS, ID = 250µA 2.0 - 4.0 V
Zero Gate Voltage Drain Current IDSS VDS = Rated BVDSS, VGS = 0V - - 25 µA
VDS = 0.8 x Rated BVDSS, VGS = 0V, TJ = 125oC - - 250 µA
On-State Drain Current (Note 2) ID(ON) VDS > ID(ON) x rDS(ON)MAX, VGS = 10V (Figure 7) 2.5 - - A
Gate to Source Leakage Current IGSS VGS = ±20V - - ±100 nA
Drain to Source On Resistance (Note 2) rDS(ON) ID = 1.4A, VGS = 10V (Figures 8, 9) - 2.5 3.0
Forward Transconductance (Note 2) gfs VDS 10V, ID = 2.0A (Figure 12) 1.5 2.3 - S
Turn-On Delay Time td(ON) VDD = 250V, ID 2.5A, RGS = 18, RL = 96
MOSFET Switching Times are Essentially
Independent of Operating Temperature
-1115ns
Rise Time tr-1118ns
Turn-Off Delay Time td(OFF) -2942ns
Fall Time tf-1218ns
Total Gate Charge
(Gate to Source + Gate to Drain) Qg(TOT) VGS = 10V, ID = 2.5A, VDS = 0.8 x Rated BVDSS
Ig(REF) = 1.5mA
(Figure 14) Gate Charge is Essentially Independent
of Operating Temperature
-1219nC
Gate to Source Charge Qgs - 2.5 - nC
Gate to Drain “Miller” Charge Qgd - 6.0 - nC
Input Capacitance CISS VDS = 25V, VGS = 0V, f = 1MHz (Figure 11) - 360 - pF
Output Capacitance COSS -60-pF
Reverse Transfer Capacitance CRSS -10-pF
Internal Drain Inductance LDMeasured From the
Contact Screw on Tab to
Center of Die
Modified MOSFET
Symbol Showing the
Internal Device
Inductances
- 3.5 - nH
Measured From the Drain
Lead, 6mm (0.25in) From
Package to Center of Die
- 4.5 - nH
Internal Source Inductance LSMeasuredFrom theSource
Lead, 6mm (0.25in) from
Header to Source Bonding
Pad
- 7.5 - nH
Thermal Resistance Junction to Case RθJC - - 2.5 oC/W
Thermal Resistance Junction to Ambient RθJA Free Air Operation - - 80 oC/W
LS
LD
G
D
S
IRF820
4-247
Source to Drain Diode Specifications
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Continuous Source to Drain Current ISD Modified MOSFET Symbol
Showing the Integral
Reverse P-N Junction
Rectifier
- - 2.5 A
Pulse Source to Drain Current
(Note 3) ISDM - - 8.0 A
Source to Drain Diode Voltage (Note 2) VSD TJ = 25oC, ISD = 2.5A, VGS = 0V (Figure 13) - - 1.6 V
Reverse Recovery Time trr TJ = 25oC, ISD = 2.5A, dISD/dt = 100A/µs 130 300 540 ns
Reverse Recovery Charge QRR TJ = 25oC, ISD = 2.5A, dISD/dt = 100A/µs 0.57 1.4 2.3 µC
NOTES:
2. Pulse test: pulse width 300µs, duty cycle 2%.
3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3).
4. VDD = 50V, starting TJ= 25oC, L = 60mH, RG= 25Ω, peak IAS = 2.5A.
Typical Performance Curves
Unless Otherwise Specified
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE
G
D
S
0 50 100 150
0
TC, CASE TEMPERATURE (oC)
POWER DISSIPATION MULTIPLIER
0.2
0.4
0.6
0.8
1.0
1.2
050 100
ID, DRAIN CURRENT (A)
TC, CASE TEMPERATURE (oC) 150
25 75 125
2.5
2.0
1.5
1.0
0.5
10
1
0.1
10-2
10-5 10-4 10-3 10-2 0.1 1 10
ZθJC, TRANSIENT
THERMAL IMPEDANCE (oC/W)
t1, RECTANGULAR PULSE DURATION (s)
0.1
0.02
0.2
0.5
0.01
0.05 PDM
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJC + TC
t1
t2
SINGLE PULSE
IRF820
4-248
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS
FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS
FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE
VOLTAGE AND DRAIN CURRENT FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
Typical Performance Curves
Unless Otherwise Specified (Continued)
VDS, DRAIN TO SOURCE VOLTAGE (V)
10
ID, DRAIN CURRENT (A)
100
102
1
101
0.1 103
10µs
100µs
1ms
10ms
DC
SINGLE PULSE
TJ = MAX RATED
TC = 25oC
OPERATION IN THIS AREA
IS LIMITED BY rDS(ON)
ID, DRAIN CURRENT (A)
0 50 100 150 200
1
2
3
4
5
250
VDS, DRAIN TO SOURCE VOLTAGE (V)
0
VGS = 5.5V
VGS = 5.0V
VGS = 4.5V VGS = 4.0V
VGS = 6.0V
VGS = 10V PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
0
1
04812 20
2
3
ID, DRAIN CURRENT (A)
VDS, DRAIN TO SOURCE VOLTAGE (V)
4
16
5
VGS = 5.0V
VGS = 4.0V VGS = 4.5V
VGS = 5.5V
VGS = 6.0V
VGS = 10V
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
02468
VGS, GATE TO SOURCE VOLTAGE (V)
10
1
0.1
10-2
ID, DRAIN CURRENT (A)
TJ = 150oC
10
TJ = 25oC
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
VDS 50V
ID, DRAIN CURRENT (A)
rDS(ON), DRAIN TO SOURCE
10
8
6
4
2
00246810
VGS = 20V
VGS = 10V
ON RESISTANCE ()
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
NORMALIZED DRAIN TO SOURCE
3.0
1.8
1.2
0.6
0-40 0 40
TJ, JUNCTION TEMPERATURE (oC)
120
2.4
80 160
ON RESISTANCE
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
VGS = 10V, ID = 2.5A
IRF820
4-249
FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE
FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE
Typical Performance Curves
Unless Otherwise Specified (Continued)
NORMALIZED DRAIN TO SOURCE
1.25
1.05
0.95
0.85
0.75 -40 0 40
TJ, JUNCTION TEMPERATURE (oC)
120
1.15
80
ID = 250µA
160
BREAKDOWNVOLTAGE
VDS, DRAIN TO SOURCE VOLTAGE (V)
C, CAPACITANCE (nF)
1000
800
600
400
200
0110
100
CISS = CGS + CGD
CRSS = CGD
COSS CDS + CGD
VGS = 0V, f = 1MHz
CISS
COSS
CRSS
4.0
3.2
2.4
1.6
0.8
00 0.8 1.6 2.4 3.2 4.0
ID, DRAIN CURRENT (A)
gfs, TRANSCONDUCTANCE (S)
TJ = 25oC
TJ = 150oC
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
0 0.4 0.8 1.2 1.6
VSD, SOURCE TO DRAIN VOLTAGE (V)
100
10
1
0.1
ISD, SOURCE TO DRAIN CURRENT (A)
TJ = 150oC
2.0
TJ = 25oC
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
048121620
ID = 2.5A
Qg, GATE CHARGE (nC)
VGS, GATE TO SOURCEVOLTAGE (V)
20
16
12
8
4
0
IRF820, IRF822
VDS = 250V
VDS = 400V
VDS = 100V
IRF820
4-250
Test Circuits and Waveforms
FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS
FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS
FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS
tP
VGS
0.01
L
IAS
+
-
VDS
VDD
RG
DUT
VARY tP TO OBTAIN
REQUIRED PEAK IAS
0V
VDD
VDS
BVDSS
tP
IAS
tAV
0
VGS
RL
RG
DUT
+
-VDD
tON
td(ON)
tr
90%
10%
VDS 90%
10%
tf
td(OFF)
tOFF
90%
50%
50%
10% PULSE WIDTH
VGS
0
0
0.3µF
12V
BATTERY 50k
VDS
S
DUT
D
G
Ig(REF)
0
(ISOLATED
VDS
0.2µF
CURRENT
REGULATOR
ID CURRENT
SAMPLING
IG CURRENT
SAMPLING
SUPPLY)
RESISTOR RESISTOR
SAME TYPE
AS DUT Qg(TOT)
Qgd
Qgs
VDS
0
VGS
VDD
IG(REF)
0
IRF820
4-251
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Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is gr anted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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IRF820