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Is Now Part of
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Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON
Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s
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January 2014
Thermal Characteristics
Symbol Parameter FQD13N10LTM /
FQU13N10LTU
Unit
RJC Thermal Resistance, Junction to Case, Max. 3.13
oC/W
RJA
Thermal Resistance, Junction to Ambient (Minimum Pad of 2-oz Copper), Max. 110
Thermal Resistance, Junction to Ambient (*1 in2 Pad of 2-oz Copper), Max. 50
FQD13N10L / FQU13N10L
N-Channel QFET® MOSFET
100 V, 10 A, 180 mΩ
Description
©2000 Fairchild Semiconductor Corporation
FQD13N10L / FQU13N10L Rev. C4
www.fairchildsemi.com
1
FQD13N10L / FQU13N10L — N-Channel QFET® MOSFET
This N-Channel enhancement mode power MOSFET
is produced using Fairchild Semiconductor’s proprietary
planar stripe and DMOS technology. This advanced
MOSFET technology has been especially tailored to reduce
on-state resistance, and to provide superior switching
performance and high avalanche energy strength. These
devices are suitable for switched mode power supplies,
audio amplifier, DC motor control, and variable switching
power applications.
Features
•10 A, 100 V, RDS(on) = 180 mΩ (Max.) @ VGS = 10 V,
ID = 5.0 A
•Low Gate Charge (Typ. 8.7 nC)
•Low Crss (Typ. 20 pF)
• 100% Avalanche Tested
•Low Level Gate Drive Requirement Allowing
Direct Operation Form Logic Drivers
Absolute Maximum Ratings TC = 25°C unless otherwise noted.
Symbol Parameter FQD13N10LTM / FQU13N10LTU Unit
VDSS Drain-Source Voltage 100 V
IDDrain Current 10 A
- Continuous (TC = 25°C)
- Continuous (TC = 100°C) 6.3 A
IDM Drain Current - Pulsed (Note 1) 40 A
VGSS Gate-Source Voltage ± 20 V
EAS Single Pulsed Avalanche Energy (Note 2) 95 mJ
IAR Avalanche Current (Note 1) 10 A
EAR Repetitive Avalanche Energy (Note 1) 4.0 mJ
dv/dt Peak Diode Recovery dv/dt (Note 3) 6.0 V/ns
PDPower Dissipation (TA = 25°C) * 2.5 W
Power Dissipation (TC = 25°C) 40 W
- Derate above 25°C 0.32 W/°C
TJ, TSTG Operating and Storage Temperature Range -55 to +150 °C
TLMaximum Lead Temperature for Soldering,
1/8” from Case for 5 Seconds 300 °C
GDS
I-PAK
D-PAK
G
S
D
G
S
D
Package Marking and Ordering Information
©2000 Fairchild Semiconductor Corporation
FQD13N10L / FQU13N10L Rev. C4
www.fairchildsemi.com
2
FQD13N10L / FQU13N10L — N-Channel QFET® MOSFET
Part Number Top Mark Package Reel Size Tape Width Quantity
FQD13N10LFQD13N10LT DPAK 330 mm 16 mm 2500 units
Packing Method
ape and Reel
(
N ote 4)
(
Note 4)
Electrical Characteristics TC = 25°C unless otherwise noted.
Notes:
1. Repetitive rating : pulse-width limited by maximum junction temperature.
2. L = 1.43 mH, IAS = 10 A, VDD = 25 V, RG = 25 Ω, Starting TJ = 25°C.
3. ISD ≤ 12.8 A, di/dt ≤ 300 A/µs, VDD ≤ BVDSS, Starting TJ = 25°C.
4. Essentially independent of operating temperature.
Symbol Parame ter Test Conditions Min.Typ.Max.Unit
Off Characteristics
BVDSS Drain-S ource Breakdown Voltage VGS = 0 V, I D = 250 µA100 -- -- V
∆BVDSS
/ ∆TJ
Breakdown Voltage Temperature
Coefficient ID = 250 µA, Referenced to 25°C -- 0.09 -- V/°C
IDSS Zero Gate Voltage Drain Current VDS = 100 V, VGS = 0 V -- -- 1 µA
VDS = 80 V, TC = 125°C -- -- 10 µA
IGSSF Gate-Body Leakage Current, Forward VGS = 20 V, VDS = 0 V -- -- 100 nA
IGSSR Gate-Body Leakage Current, Reverse VGS = -20 V, VDS = 0 V -- -- -100 nA
On Characteri st ics
VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA1.0 -- 2.0 V
RDS(on) Static Drain-Source
On-Resistance VGS = 10 V, ID = 5.0 A
VGS = 5 V, I D = 5.0 A -- 0.142
0.158 0.18
0.2 Ω
gFS Forward Transconductance VDS = 30 V, ID = 5.0 A -- 8.7 -- S
Dynamic Characteristics
Ciss Input Capacitance VDS = 25 V, VGS = 0 V,
f = 1.0 MHz
-- 400 520 pF
Coss Output Capacitance -- 95 125 pF
Crss Reverse Transfer Capacit ance -- 20 25 pF
Switching Characteristics
td(on) Turn-On Delay Time VDD = 50 V, ID = 12.8 A,
RG = 25 Ω
-- 7.5 25 ns
trTurn-On Rise Time -- 220 450 ns
td(off) Turn-Off De l a y Time -- 22 55 ns
tfTurn-Off Fall Time -- 7 2 150 n s
QgTotal Gate Charge VDS = 80 V, ID = 12.8 A,
VGS = 5 V
-- 8.7 12 nC
Qgs Gate-Source Charge -- 2.0 -- nC
Qgd Gate-Drain Charge -- 5.3 -- nC
Drain-Source Diode Characteristics and Maximum Ratings
ISMaximum Continuous Drain-Source Diode Forward Current -- -- 10 A
ISM Maximum Pulsed Drain-Source Diode Forward Current -- -- 40 A
VSD Drain-Source Diode Forward Voltage VGS = 0 V, I S = 10 A -- -- 1.5 V
trr Reverse Recovery Time VGS = 0 V, IS = 12.8 A,
dIF / dt = 100 A/µs-- 75 -- ns
Qrr Reverse Recovery Charge -- 0.17 - - µC
FQU13N10LFQU13N10LTU IPAK N/A N/A 70 units
Tube
©2000 Fairchild Semiconductor Corporation
FQD13N10L / FQU13N10L Rev. C4
www.fairchildsemi.com
3
FQD13N10L / FQU13N10L — N-Channel QFET® MOSFET
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
10-1
100
101
150℃
※ Notes :
1. VGS = 0V
2. 250μ
s Pulse Test
25℃
IDR, Reverse Drain Current [A]
VSD, S o u r c e-D r a i n voltage [V]
024 86 10
10-1
100
101
※ Notes :
1. VDS = 30V
2. 250μ
s Pulse Tes t
-55℃
150℃
25℃
ID , Drain Cur re n t [A]
VGS , Gate-Sou r ce Voltage [V]
10-1 0101
100
101
VGS
Top : 10.0 V
8.0 V
6.0 V
5.0 V
4.5 V
4.0 V
3.5 V
Bo ttom : 3 .0 V
※ Notes :
1. 250μ
s Pulse Test
2. TC = 25℃
ID, Drain Current [A]
10
VDS, D rain-Sou r c e Vo lt a g e [V ]
0 01 203040
0.0
0.2
0.4
0.6
0.8
VGS = 10V
VGS = 5V
※ N ote : T J = 25℃
RDS(ON) [Ω],
Drain-Source On-Resistance
ID, Drain Current [A]
40 1216
0
2
4
6
8
10
12
VDS = 50V
VDS = 80V
※ Note : ID = 12.8A
VGS, Gate-Source Voltage [V]
8
QG, To tal Ga t e Charge [nC]
10-1 0101
200
400
600
800
1000 Ciss = Cgs + Cgd (Cds = sh orte d)
Coss = Cds + C gd
Crss = Cgd
※ Notes :
1 . VGS = 0 V
2 . f = 1 MHz
Crss
Coss
Ciss
Capacitance [pF]
10
VDS, Drain-Source Voltage [V]
Typical Characteristics
Figure 5. Capacitance C haracteristi cs Figure 6. Gate Charge Characteristics
Figure 3. On-Resist anc e Variation vs.
Drain Current and Gate Voltage Figure 4. Body Diode Fo rward Voltage
Variation vs. Source Current
and Temperature
Figure 2. Transfer CharacteristicsFigure 1. On- R egi on Character ist ic s
ZJC(t), Thermal Response [oC/W]
©2000 Fairchild Semiconductor Corporation
FQD13N10L / FQU13N10L Rev. C4
www.fairchildsemi.com
4
FQD13N10L / FQU13N10L — N-Channel QFET® MOSFET
Typical Characteristics (Continued)
10-5 10-4 100101
10-1
100
※ No te s :
1 . ZθJC(t) = 3 .1 3 ℃/W Max .
2 . D u ty F a c to r , D= t1/t2
3 . TJM - T C = PDM * Z θJC(t)
single pulse
D=0.5
0.02
0.2
0.05
0.1
0.01
10-3 10-2 10-1
t1, Sq u a re W a v e Pu lse Du ra tion [s e c]
25 50 75 100 125 150
0
2
4
6
8
10
ID, Drain Current [A ]
TC, Case Temperature [℃
]
100 1 102
10-1
100
101
102
DC 10 m s
1 ms 10 0 µs
Op eration in T h is Ar e a
is Limited by R DS(on)
※ Notes :
1. TC = 25 oC
2. TJ = 150 oC
3. Single Pulse
ID, Drain C urrent [A]
10
VDS, Drain-Source Voltage [V]
-100 -50 0 50 100 150 200
0.0
0.5
1.0
1.5
2.0
2.5
※ Notes :
1. VGS = 10 V
2. ID = 5.0 A
RDS(ON) , (Norm alized)
Drain-Source On-Resistance
TJ, Junction Temperature [oC]
-100 -50 0 50 100 150 200
0.8
0.9
1.0
1.1
1.2
※ Notes :
1 . VGS = 0 V
2 . ID = 250 μ
A
BV DSS , (N ormaliz e d )
Drain-Sou rce Breakdow n V oltage
TJ, Junction Temperature [oC]
Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current
vs. Case Temperature
Figu re 7. Br ea kdown Voltage Variation
vs. Temperature Figure 8. On-Resistanc e Va riation
vs. Temperature
Figure 11. Tr ans i ent Ther m al Res pons e Cur ve
t1
PDM
t2
Figure 12. Gate Charge Test Circuit & Waveform
Figure 13. Resistive Switching Test Circuit & Waveforms
Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms
VGS
VDS
10%
90%
td(on) tr
ton toff
td(off) tf
VDD
10V
VDS
RL
DUT
RG
VGS
VGS
VDS
10%
90%
td(on) tr
ton toff
td(off) tf
VDD
10V
VDS
RL
DUT
RG
VGS
VGS
Charge
VGS
10V
Qg
Qgs Qgd
3mA
VGS
DUT
VDS
300nF
50KΩ
200nF
12V
Same Type
as DUT
Charge
VGS
10V
Qg
Qgs Qgd
3mA
VGS
DUT
VDS
300nF
50KΩ
200nF
12V
Same Type
as DUT
EAS =LI
AS2
----
2
1--------------------
BVDSS -V
DD
BVDSS
VDD
VDS
BVDSS
t p
VDD
IAS
VDS (t)
ID (t)
Time
10V DUT
RG
L
ID
t p
EAS =LI
AS2
----
2
1
EAS =LI
AS2
----
2
1
----
2
1--------------------
BVDSS -V
DD
BVDSS
VDD
VDS
BVDSS
t p
VDD
IAS
VDS (t)
ID (t)
Time
10V DUT
RG
LL
ID
ID
t p
VGS
VGS
IG = const.
©2000 Fairchild Semiconductor Corporation
FQD13N10L / FQU13N10L Rev. C4
www.fairchildsemi.com
5
FQD13N10L / FQU13N10L — N-Channel QFET® MOSFET
Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
VDS
+
_
Driver
RGSame Type
as DUT
VGS • dv/dt controlled by RG
•I
SD controlled by pulse period
VDD
L
ISD
10V
VGS
( Driver )
ISD
( DUT )
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
VSD
IFM , Body Diode Forward Current
Body Diode Reverse Current
IRM
Body Diode Recovery dv/dt
di/dt
D = Gate Pulse Width
Gate Pulse Period
--------------------------
DUT
VDS
+
_
Driver
RGSame Type
as DUT
VGS • dv/dt controlled by RG
•I
SD controlled by pulse period
VDD
LL
ISD
10V
VGS
( Driver )
ISD
( DUT )
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
VSD
IFM , Body Diode Forward Current
Body Diode Reverse Current
IRM
Body Diode Recovery dv/dt
di/dt
D = Gate Pulse Width
Gate Pulse Period
--------------------------
D = Gate Pulse Width
Gate Pulse Period
--------------------------
©2000 Fairchild Semiconductor Corporation
FQD13N10L / FQU13N10L Rev. C4
www.fairchildsemi.com
6
FQD13N10L / FQU13N10L — N-Channel QFET® MOSFET
Mechanical Dimensions
©2000 Fairchild Semiconductor Corporation
FQD13N10L / FQU13N10L Rev. C4
www.fairchildsemi.com
7
FQD13N10L / FQU13N10L — N-Channel QFET® MOSFET
Figure 16. TO252 (D-PAK), Molded, 3-Lead, Option AA&AB
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specif-
ically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/package/packageDetails.html?id=PN_TT252-003
Mechanical Dimensions
©2000 Fairchild Semiconductor Corporation
FQD13N10L / FQU13N10L Rev. C4
www.fairchildsemi.com
8
FQD13N10L / FQU13N10L — N-Channel QFET® MOSFET
Figure 17. TO251 (I-PAK), Molded, 3-Lead
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specif-
ically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/package/packageDetails.html?id=PN_TO251-003
©2000 Fairchild Semiconductor Corporation
FQD13N10L / FQU13N10L Rev. C4
www.fairchildsemi.com
9
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The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not
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PRODUCT STATUS DEFINITIONS
Definition of Terms
AccuPower™
AX-CAP®*
BitSiC™
Build it Now™
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CorePOWER™
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CTL™
Current Transfer Logic™
DEUXPEED®
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®*
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®
™
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Rev. I66
tm
®
FQD13N10L / FQU13N10L — N-Channel QFET® MOSFET
www.onsemi.com
1
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