September 2013 Doc ID 16273 Rev 8 1/34
1
VND5E025BK-E
Double channel high-side driver with analog current sense
for automotive applications
Features
■
General
– Inrush current active management by
power limitation
– Very low standby current
– 3.0V CMOS compatible inputs
■
Diagnostic functions
– High current sense precision for wide
currents range
– Current sense ratio drift for single point
calibration
– Current sense disable
– Overload and short to ground (power
limitation) indication
– Therm al sh utdown indi ca tion
■
Protections
– Undervoltage shutdown
– Overvoltage clamp
– Load current limitation
– Self limiting of fast thermal transients
– Protection against loss of ground and loss
of V
CC
– Overtemperature shutdown with auto
restart (thermal shutdown)
– Reverse battery protected
– Electros tatic disc har ge protecti on
Applications
■
Especially intended for blinkers
■
All types of resistive, inductive and capacitive
loads and suitable as LED driver
Description
The VND5E025BK-E is a double channel high-
side driver manufactured in the ST proprietary
VIPower™ M0-5 technology and housed in the
tiny PowerSSO-24 package. The VND5E025BK-E
is designed to drive 12V automotive grounded
loads delivering protection, diagnostics and easy
3V and 5V CMOS compatible interface with any
microcontroller.
The device integrates advanced protective
functions such as load current limitation, inrush
and overload active management by power
limitation, overtemperature shut-off with auto
restart and overvoltage active clamp.
A dedicated analog current sense pin is
associated with every output channel in order to
provide Enhanced diagnostic functions including
fast detection of overload and short circuit to
ground through power limitation indication and
overtemperature indication.
An improved current sense circuitry and the
introduction of a new current sense ratio drift,
dK/K(tot), allow the "single-point" calibration and
ensure a very high accuracy in case of "double-
point" calibration.
The current sensing and diagnostic feedback of
the whole device can be disabled by pulling the
CS_DIS pin high to allow sharing of the external
sense resistor with other similar devices.
Max transient supply voltage V
CC
41 V
Operati ng vol tage range V
CC
4.5 to 28 V
Max on-state resistance (per ch.) R
ON
25 mΩ
Current lim itati on (typ ) I
LIMH
60 A
Off-st a te sup ply current I
S
2µA
(1)
1. Typical value with all loads connected.
PowerSSO-24
www.st.com
Contents VND5E025BK-E
2/34 Doc ID 16273 Rev 8
Contents
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3 Elect rical char acteristi c s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2.5 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 22
3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 22
3.1.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 23
3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
3.4 Curre nt sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3.5 Maximum demagneti zation energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 25
4 Package and thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
4.1 PowerSSO-24 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5.1 ECOPACK
®
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5.2 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
6 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
VND5E025BK-E List of tables
Doc ID 16273 Rev 8 3/34
List of tables
Table 1. Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 5. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 6. Switching (VCC = 13V; Tj = 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 7. Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 8. Protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 9. Current sense (8V < VCC < 18V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 10. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 11. Electrical transient requirements (part 1/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 12. Electrical transient requirements (part 2/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 13. Electrical transient requirements (part 3/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 14. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Table 15. PowerSSO-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Table 16. Device summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Table 17. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
List of figures VND5E025BK-E
4/34 Doc ID 16273 Rev 8
List of figures
Figure 1. Block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 5. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 6. Output voltage drop limitation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 7. Delay response time between rising edge of output current and rising edge of current sense
(CS enabled). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 8. I
OUT
/I
SENSE
vs I
OUT
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 9. Maximum current sense ratio drift vs load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 10. Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 11. Overload or short to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 12. Intermittent overload. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 13. T
J
evolution in overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 14. Off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 15. High level input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 16. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 17. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 18. Input low level. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 19. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 20. On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 21. On-state resistance vs VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 22. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 23. ILIMH vs Tcase. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 24. Turn-on voltage slope. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 25. Turn-off voltage slope. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 26. CS_DIS high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 27. CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 28. CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 29. Application schematic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 30. Current sense and diagnostic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 31. Maximum turn-off current versus inductance (for each channel) . . . . . . . . . . . . . . . . . . . . 25
Figure 32. PowerSSO-24 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 33. Rthj-amb vs PCB copper area in open box free air condition (one channel on). . . . . . . . . 26
Figure 34. PowerSSO-24 thermal impedance junction to ambient single pulse (one channel on) . . . 27
Figure 35. Thermal fitting model of a double channel HSD in PowerSSO-24 . . . . . . . . . . . . . . . . . . . 27
Figure 36. PowerSSO-24 package dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 37. PowerSSO-24 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 38. PowerSSO-24 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
VND5E025BK-E Block diagram and pin description
Doc ID 16273 Rev 8 5/34
1 Block diagram and pin description
Figure 1. Block diagram
Table 1. Pin functions
Name Function
V
CC
Battery connection.
OUTPUT
1,2
Power output.
GND Ground connection. Must be reverse battery protected by an external
diode / resistor network.
INPUT
1,2
Voltage controlled input pin with hysteresis, CMOS compatible. Controls
output switch state.
CURRENT SENSE
1,2
Analog current sense pin; delivers a current proportional to the load
current.
CS_DIS Active high CMOS compatible pin to disable the current sense pin.
V
CC
CH 1
Control & Diagnostic 1
LOGIC
DRIVER
V
ON
Limitation
Current
Limitation
Power
Clamp
Over
temp.
Undervoltage
V
SENSEH
Current
Sense
CH 2
OVERLOAD PROTECTION
(ACTIVE POWER LIMITATION)
IN1
IN2
CS1
CS2
CS_
DIS
GND
OUT2
OUT1
Signal Clamp
CONTROL & DIAGNOSTIC
Channels 2
Block diagram and pin description VND5E025BK-E
6/34 Doc ID 16273 Rev 8
Figure 2. Configuration diagram (top view)
Table 2. Suggested connections for unused and not connected pins
Connection / pin Current sense N.C. Output Input CS_DIS
Floating Not allowed X X X X
To ground Through 1 kΩ
resistor XThrough 22 kΩ
resistor Through 10 kΩ
resistor Through 10 kΩ
resistor
1
2
3
4
5
6
N.C.
INPUT1
GND
V
CC
N.C.
INPUT2
7
8
9
10
11
12
CS_DIS.
V
CC
CURRENT SENSE1
N.C.
N.C.
CURRENT SENSE2
24
23
22
21
20
19 OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT2
18
17
16
15
14
13 OUTPUT1
OUTPUT1
OUTPUT1
OUTPUT1
OUTPUT1
OUTPUT1
TAB = V
CC
VND5E025BK-E Electrical specification
Doc ID 16273 Rev 8 7/34
2 Electrical specification
Figure 3. Current and voltage conventions
2.1 Absolute maximum ratings
Stressing the device above the rating listed in the “Absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to the conditions in table below for extended
periods may affect device reliability. Refer also to the STMicroelectronics SURE Program
and other relevant quality document.
V
Fn
I
S
I
GND
V
CC
V
CC
V
SENSE2
OUTPUT1
I
OUT1
CURRENT
I
SENSE1
INPUT1
I
IN1
V
IN2
V
OUT2
GND
CS_DIS
I
CSD
V
CSD
INPUT2
I
IN2
V
IN1
SENSE1
OUTPUT2
I
OUT2
CURRENT
I
SENSE2
SENSE2
V
SENSE1
V
OUT1
Note:
V
Fn
= V
OUTn
- V
CC
during reverse battery condition.
Table 3. Absolute maximum ratings
Symbol Parameter Value Unit
V
CC
DC supply voltage 41 V
-V
CC
Reverse DC supply voltage 0.3
-I
GND
DC reverse ground pin current 200 mA
I
OUT
DC output current Internally limited A
- I
OUT
Reverse DC output current 24
I
IN
DC input current -1 to 10 mAI
CSD
DC current sense disable input current
-I
CSENSE
DC reverse CS pin current 200
V
CSENSE
Current sense maximum voltage V
CC
- 41 to +V
CC
V
Electrical specification VND5E025BK-E
8/34 Doc ID 16273 Rev 8
2.2 Thermal data
E
MAX
Maximum switching energy (single pulse)
(L = 0.8 mH; R
L
=0Ω; V
bat
=13.5V; T
jstart
= 150 °C;
I
OUT
= I
limL
(Typ.)) 140 mJ
V
ESD
Electrostatic discharge
(Human Body Model: R = 1.5 kΩ; C = 100 pF )
– Input
– Current sense
– CS_DIS
– Output
–V
CC
4000
2000
4000
5000
5000
V
V
V
V
V
V
ESD
Charge devi ce model (CDM-AEC-Q100-011) 750 V
T
j
Junction operating temperature - 40 to 150 °C
T
stg
Storage temperature - 55 to 150
Table 3. Absolute maximum ratings (continued)
Symbol Parameter Value Unit
Table 4. Thermal data
Symbol Parameter Max. value Unit
R
thj-case
Thermal resistance junction-case (with one channel on) 1.35 °C/W
R
thj-amb
Thermal resistance junction-ambient See Figure 33
VND5E025BK-E Electrical specification
Doc ID 16273 Rev 8 9/34
2.3 Electrical characteristics
Values specified in this section are for 8V<V
CC
<28V; -40°C<T
j
<150°C, unless otherwise
stated.
Table 5. Power section
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
CC
Operating supply
voltage 4.5 13 28
VV
USD
Undervo lt a ge shutdown 3.5 4.5
V
USDhyst
Undervo lt age shutdown
hysteresis 0.5
R
ON
On-state resistance
(1)
1. For each channel.
I
OUT
= 3A; T
j
=25°C 25
mΩI
OUT
= 3A; T
j
=150°C 50
I
OUT
= 3A; V
CC
=5V; T
j
=25°C 35
V
clamp
Clamp voltage I
S
= 20 mA 41 46 52 V
I
S
Supply current
Off-state; V
CC
=13V; T
j
=25°C;
V
IN
=V
OUT
=V
SENSE
=V
CSD
=0V
Off-state; V
CC
=13V; T
j
= 125°C;
V
IN
=V
OUT
=V
SENSE
=V
CSD
=0V
2
(2)
2. PowerMOS leakage included.
5
(2)
9
µA
µA
On-state; V
CC
=13V; V
IN
=5V;
I
OUT
=0A 36mA
I
L(off1)
Off-state output
current
(1)
V
IN
=V
OUT
=0V; V
CC
=13V;
T
j
= 25°C 00.013 µA
V
IN
=V
OUT
=0V; V
CC
=13V;
T
j
= 125°C 05
V
F
Output - V
CC
diode
voltage
(1)
-I
OUT
= 4 A; T
j
= 150°C 0.7 V
Table 6. Switching (V
CC
= 13V; T
j
= 25°C)
Symbol Parameter Test conditions Min. Typ. Max. Unit
t
d(on)
Turn-on delay time R
L
=4.3 Ω
(see Figure 5)-20-
µs
t
d(off)
Turn-off delay time - 30 -
(dV
OUT
/dt)
on
Turn-on voltag e slope R
L
=4.3 Ω
-See
Figure 24 -V/µs
(dV
OUT
/dt)
off
Turn-off voltage slope - See
Figure 25 -
W
ON
Switching energy losses
during t
WON
R
L
=4.3 Ω
(see Figure 5)
-0.6-
mJ
W
OFF
Switching energy losses
during t
WOFF
-0.35-
Electrical specification VND5E025BK-E
10/34 Doc ID 16273 Rev 8
Table 7. Logic inputs
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
IL
Input low lev el volt a ge 0.9 V
I
IL
Low level input current V
IN
=0.9V 1 µA
V
IH
Input high level voltage 2.1 V
I
IH
High level input current V
IN
=2.1V 10 µA
V
I(hyst)
Input hyste r es is volt a ge 0.25
VV
ICL
Input clam p voltage I
IN
=1mA 5.5 7
I
IN
=-1mA -0.7
V
CSDL
CS_DIS low level voltage 0.9
I
CSDL
Low level CS_DIS current V
CSD
=0.9V 1 µA
V
CSDH
CS_DIS high level voltage 2.1 V
I
CSDH
High level CS_DIS current V
CSD
=2.1V 10 µA
V
CSD(hyst)
CS_DIS hysteresis voltage 0.25
V
V
CSCL
CS_DIS clamp voltage I
CSD
=1mA 5.5 7
I
CSD
= -1mA -0.7
Table 8. Protections and diagnostics
(1)
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
LIMH
DC short circuit current V
CC
= 13V 43 60 85 A
5V < V
CC
< 28V
I
LIML
Short circuit current
during ther ma l cycling V
CC
= 13V;
T
R
<T
j
<T
TSD
15
T
TSD
Shutdown temperature 150 175 200
°C
T
R
Reset temperature T
RS
+1 T
RS
+5
T
RS
Thermal reset of STATUS 135
T
HYST
Thermal hysteresis
(T
TSD
-T
R
)7
V
DEMAG
Turn-Off output voltage
clamp I
OUT
= 2A; V
IN
=0;
L=6 mH V
CC
-41 V
CC
-46 V
CC
-52 V
V
ON
Output voltage drop
limitation
I
OUT
=0.1A;
T
j
= -40°C to +150°C
(see Figure 6)25 mV
VND5E025BK-E Electrical specification
Doc ID 16273 Rev 8 11/34
Table 9. Current sense (8V < V
CC
< 18V)
Symbol Parameter Test conditions Min. Typ. Max. Unit
K
LED
I
OUT
/I
SENSE
I
OUT
= 0.05A; V
SENSE
=0.5V; V
CSD
=0V;
T
j
= -40°C to 150°C 1922 5046 9218
K
1
I
OUT
/I
SENSE
I
OUT
= 1.5 A; V
SENSE
=4 V;
V
CSD
=0V;
T
j
= -40°C to 150°C 2460 3363 4050
dK
1
/K
1(1)(2)
Current sense
ratio drift
I
OUT
= 1.5 A; V
SENSE
=4 V;
V
CSD
=0V;
T
j
= -40°C to 150°C -9 9 %
K
2
I
OUT
/I
SENSE
I
OUT
= 2 A; V
SENSE
=4V;
V
CSD
=0V;
T
j
= -40°C to 150°C 2550 3405 4108
dK
2
/K
2(1)(2)
Current sense
ratio drift I
OUT
= 2 A; V
SENSE
=4V; V
CSD
=0V;
T
j
= -40°C to 150°C -7 7 %
K
3
I
OUT
/I
SENSE
I
OUT
= 2.4 A; V
SENSE
=4V;
V
CSD
=0V;
T
j
= -40°C to 150°C 2635 3384 4117
dK
3
/K
3(1)(2)
Current sense
ratio drift I
OUT
= 2.4 A; V
SENSE
=4V; V
CSD
=0V;
T
j
= -40°C to 150°C -6 +6 %
K4 I
OUT
/I
SENSE
I
OUT
= 3 A; V
SENSE
=4V;
V
CSD
=0V;
T
j
= -40°C to 150°C 2752 3368 3975
dK
4
/K
4(1)(2)
Current sense
ratio drift I
OUT
= 3 A; V
SENSE
=4V; V
CSD
=0V;
T
j
= -40°C to 150°C -5 5 %
K
5
I
OUT
/I
SENSE
I
OUT
= 4 A; V
SENSE
=4V;
V
CSD
=0V;
T
j
= -40°C to 150°C 2860 3341 3805
dK
5
/K
5(1)(2)
Current sense
ratio drift I
OUT
= 4 A; V
SENSE
=4V; V
CSD
=0V;
T
j
= -40°C to 150°C -4 4 %
K
6
I
OUT
/I
SENSE
I
OUT
= 10 A; V
SENSE
=4V;
V
CSD
=0V;
T
j
= -40°C to 150°C 2965 3307 3570
dK
6
/K
6(1)(2)
Current sense
ratio drift I
OUT
= 10 A; V
SENSE
=4V; V
CSD
=0V;
T
j
= -40°C to 150°C -3 3 %
dK/K
(tot)(1)(3)
Current sense
ratio drift for
single point
calibration
Measurement point: I
OUT
= 2.4 A;
T
j
= 25°C; V
CC
= 13.5V
-9.5
-7
-6
-7
-8
9.5
7
6
7
8
%
%
%
%
%
I
OUT
=1.5A
I
OUT
=2.0A
I
OUT
=2.4A
I
OUT
=3.0A
I
OUT
=4.0A
Electrical specification VND5E025BK-E
12/34 Doc ID 16273 Rev 8
I
SENSE
0
Analog sense
leakage current
I
OUT
= 0A; V
SENSE
=0V;
V
CSD
=5V; V
IN
=0V; T
j
= -40°C to 150°C
V
CSD
=0V; V
IN
=5V; T
j
= -40°C to 150°C
I
OUT
= 2A; V
SENSE
=0V;
V
CSD
=5V; V
IN
=5V; T
j
= -40°C to 150°C
0
0
0
1
2
1
µA
µA
µA
I
OL
Openload on-
state current
detection
threshold
V
IN
= 5V, 8V<V
CC
<18V
I
SENSE
= 5 µA 570mA
V
SENSE
Max analog
sense out put
voltage I
OUT
= 3 A; V
CSD
= 0V 5
V
V
SENSEH
Analog sense
output v ol t ag e in
fault condition
(4)
V
CC
=13V; R
SENSE
=3.9kΩ8
I
SENSEH
Analog sense
output current in
fault condition
(2)
V
CC
=13V; V
SENSE
=5V 6 9 12 mA
t
DSENSE1H
Delay r esponse
time from falling
edge of CS_DIS
pin
V
SENSE
<4V, 0.5<I
OUT
<10A
I
SENSE
= 90% of I
SENSEMAX
(see Figure 4)30 100
µs
t
DSENSE1L
Delay r esponse
time from rising
edge of CS_DIS
pin
V
SENSE
<4V, 0.5<I
OUT
<10A
I
SENSE
= 10% of I
SENSEMAX
(see Figure 4)520
t
DSENSE2H
Delay r esponse
time from rising
edge of INPUT
pin
V
SENSE
<4V, 0.5<I
OUT
<10A
I
SENSE
= 90% of I
SENSEMAX
(see Figure 4)80 300
Δt
DSENSE2H
Delay r esponse
time between
rising edg e of
output current
and rising edge
of current sense
V
SENSE
<4V,
I
SENSE
= 90% of I
SENSEMAX,
I
OUT
= 90% of I
OUTMAX
, I
OUTMAX
=3A
(see Figure 7)
110
t
DSENSE2L
Delay r esponse
time from falling
edge of INPUT
pin
V
SENSE
<4V, 0.5<I
OUT
<10A
I
SENSE
= 10% of I
SENSEMAX
(see Figure 4)520
1. Parameter guaranteed by design; it is not tested.
2. Analog sense current drift (dK/K) is deviation of factor K for a given device over (-40 °C to 150 °C,
Vbatt: 8 V...16 V) with respect to its value measured at Tj = 25 °C, V
CC
=13V
.
3. Total current drift over -40 °C to 150 °C, Vbatt: 8 V...16 V and output current variation, respect to a
calibration point measured at Tj = 25 °C and V
CC
= 13.5 V
.
4. Fault condition includes: power limitation and overtemperature.
Table 9. Current sense (8V < V
CC
< 18V) (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
VND5E025BK-E Electrical specification
Doc ID 16273 Rev 8 13/34
Figure 4. Current sense delay characteristics
Figure 5. Switching characteristics
Figure 6. Output voltage drop limitation
SENSE CURRENT
INPUT
LOAD CURRENT
CS_DIS
t
DSENSE2H
t
DSENSE2L
t
DSENSE1L
t
DSENSE1H
V
OUT
dV
OUT
/dt
(on)
t
r
80%
10% t
f
dV
OUT
/dt
(off)
t
d(off)
t
d(on)
INPUT
t
t
90%
t
Won
t
Woff
V
on
I
OUT
V
CC
-V
OUT
T
j
= 150
o
CT
j
=25
o
C
T
j
=-40
o
C
V
on
/R
on(T)
Electrical specification VND5E025BK-E
14/34 Doc ID 16273 Rev 8
Figure 7. Delay response time between rising edge of output current and rising
edge of current sense (CS enabled)
Figure 8. I
OUT
/I
SENSE
vs I
OUT
V
IN
I
OUT
I
SENSE
I
OUTMAX
I
SENSEMAX
90% I
SENSEMAX
90% I
OUTMAX
Δ
t
DSENSE2H
t
t
t
K
2200
2400
2600
2800
3000
3200
3400
3600
3800
4000
4200
1.52.53.54.55.56.57.58.59.5
Iout (A)
K(min)
K(max)
VND5E025BK-E Electrical specification
Doc ID 16273 Rev 8 15/34
Figure 9. Maximum current sense ratio drift vs load current
Table 10. Truth table
Conditions Input Output Sense (V
CSD
=0V)
(1)
1. If the V
CSD
is high, the SENSE output is at a high impedance, its potential depends on leakage currents
and external circuit.
Normal operati on L
HL
H0
Nominal
Overtemperature L
HL
L0
V
SENSEH
Undervoltage L
HL
L0
0
Overload
H
H
X
(no power limitation)
Cycling
(power lim it a tio n)
Nominal
V
SENSEH
Short circuit to GND
(Power limitation) L
HL
L0
V
SENSEH
Negative output voltage
clamp LL0
dK/K
-10%
-8%
-6%
-4%
-2%
0%
2%
4%
6%
8%
10%
1.52.53.54.55.56.57.58.59.5
Iout (A)
dK/K(min)
dK/K(max)
Note:
Parameter guaranteed by design; it is not tested.
Electrical specification VND5E025BK-E
16/34 Doc ID 16273 Rev 8
Table 11. Electrical transient requirements (part 1/3)
ISO 7637 -2:
2004(E) Test
pulse
Test levels
(1)
1. The above test levels must be considered referred to V
CC
= 13.5V except for pulse 5b.
Number of
pulses or
test times
Burst cycle / pulse
repetition time Delays and
Impedance
III IV Min. Max.
1 -75V -100V 5000 pulses 0.5s 5s 2 ms, 10Ω
2a +37V +50V 5000 pulses 0.2s 5s 50µs, 2Ω
3a -100V -150V 1h 90ms 100ms 0.1µs, 50Ω
3b +75V + 100 V 1h 90ms 100ms 0.1µs, 50Ω
4 -6V -7V 1 pulse 100ms, 0.01Ω
5b
(2)
2. Valid in case of external load dump clamp: 40V maximum referred to ground.
+65V +87V 1 pulse 400ms, 2Ω
Table 12. Electrical transient requirements (part 2/3)
ISO 763 7-2:
2004E
Test pulse
Test level results
III VI
1C C
2a C C
3a C C
3b C C
4C C
5b
(1)
1. Valid in case of external load dump clamp: 40V maximum referred to ground.
CC
Table 13. Electrical transient requirements (part 3/3)
Class Contents
C All functions of the devi ce performed as designed after exposure to disturbance.
EOne or more functions of the device did not perform as designed after exposure to
disturbance and cannot be returned to proper operation without replacing the device.
VND5E025BK-E Electrical specification
Doc ID 16273 Rev 8 17/34
2.4 Waveforms
Figure 10. Normal operation
Figure 11. Overload or short to GND
I
OUT
V
SENSE
V
CS_DIS
INPUT
Nominal load Nominal load
Normal operation
Power Limitation
I
LimH
>
I
LimL
>
I
OUT
V
SENSE
V
CS_DIS
INPUT
Thermal cycling
Overload or Short to GND
Electrical specification VND5E025BK-E
18/34 Doc ID 16273 Rev 8
Figure 12. Intermittent overload
Figure 13. T
J
evolution in overload or short to GND
T
TSD
T
R
T
J
evolution in
Overload or Short to GND
I
LimH
>
< I
LimL
T
J_START
T
HYST
Power Limitation
Self-limitation of fast thermal transients
INPUT
I
OUT
T
J
VND5E025BK-E Electrical specification
Doc ID 16273 Rev 8 19/34
2.5 Electrical characteristics curves
Figure 14. Off-state output current Figure 15. High level input current
Figure 16. Input clamp voltage Figure 17. Input high level
Figure 18. Input low level Figure 19. Input hysteresis voltage
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
100
200
300
400
500
600
700
800
900
1000
Iloff (nA)
Off State
Vcc=13V
Vin=Vout=0V
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
0,5
1
1,5
2
2,5
3
3,5
4
4,5
5
Iih (µA)
Vin = 2.1V
V
CC
= 8 V
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
5
5,2
5,4
5,6
5,8
6
6,2
6,4
6,6
6,8
7
Vicl (V)
lin=1mA
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
0,5
1
1,5
2
2,5
3
3,5
4
Vih ( V)
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
0,2
0,4
0,6
0,8
1
1,2
1,4
1,6
1,8
2
Vil (V)
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
0,1
0,2
0,3
0,4
0,5
0,6
0,7
0,8
0,9
1
Vihyst (V)
Electrical specification VND5E025BK-E
20/34 Doc ID 16273 Rev 8
Figure 20. On-state resistance vs T
case
Figure 21. On-state resistance vs V
CC
Figure 22. Undervoltage shutdown Figure 23. I
LIMH
vs T
case
Figure 24. Turn-on voltage slope Figure 25. Turn-off voltage slope
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
10
20
30
40
50
60
70
Ron (mOhm)
Iout= 3A
Vcc=13V
0 5 10 15 20 25 30 35 40
Vcc (V)
0
10
20
30
40
50
60
Ron (mOhm)
Tc=-40°C
Tc=25°C
Tc=125°C
Tc=150°C
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
2
4
6
8
10
12
14
16
Vusd (V)
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
40
45
50
55
60
65
70
Ilimh ( A)
Vcc=13V
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
100
200
300
400
500
600
700
(dVout/dt )On (V/ms)
Vcc=13V
RI=4.3 Ohm
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
100
200
300
400
500
600
(dVout/dt )Off (V/ms)
Vcc=13V
RI= 4.3 Ohm
VND5E025BK-E Electrical specification
Doc ID 16273 Rev 8 21/34
Figure 26. CS_DIS high level voltage Figure 27. CS_DIS low level voltage
Figure 28. CS_DIS clamp voltage
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
0,5
1
1,5
2
2,5
3
3,5
4
Vcs dh (V )
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
0,5
1
1,5
2
2,5
3
Vcsdl (V)
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
1
2
3
4
5
6
7
8
9
10
Vcsdcl(V)
Icsd = 1 mA
Application information VND5E025BK-E
22/34 Doc ID 16273 Rev 8
3 Application information
Figure 29. Application schematic
3.1 GND protection network against reverse battery
This section provides two solutions for implementing a ground protection network against
reverse battery.
3.1.1 Solution 1: resistor in the ground line (R
GND
only)
This can be used with any type of load.
The following is an indication on how to dimension the R
GND
resistor.
1. R
GND
≤ 600 mV / (I
S(on)max
)
2. R
GND
≥ (−V
CC
) / (-I
GND
)
where -I
GND
is the DC reverse ground pin current and can be found in the absolute
maximum rating section of the device datasheet.
Power dissipation in R
GND
(when V
CC
<0: duri ng reverse battery situations) is:
P
D
= (-V
CC
)
2
/R
GND
This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where I
S(on)max
becomes the sum of the
maximum On-state currents of the different devices.
Please note that if the microprocessor ground is not shared by the device ground then the
R
GND
will produce a shift (I
S(on)max
* R
GND
) in the input thresholds and the status output
V
CC
GND
OUTPUT
D
GND
R
GND
D
ld
Μ
CU
+5V
V
GND
CS_DIS
INPUT
R
prot
R
prot
CURRENT SENSE
R
SENSE
R
prot
C
EXT
Note:
Channel 2 has the same internal circuit as channel 1.
VND5E025BK-E Application information
Doc ID 16273 Rev 8 23/34
values. This shift will vary depending on how many devices are On in the case of several
high-side drivers sharing the same R
GND
.
If the calculated power dissipation leads to a large resistor or several devices have to share
the same resistor then ST suggests to utilize Solution 2 (see below).
3.1.2 So lution 2: diode (D
GND
) in the ground line
A resistor (R
GND
=1 kΩ) should be inserted in parallel to D
GND
if the device drives an
inductive load.
This small signal diode can be safely shared amongst several different HSDs. Also in this
case, the presence of the ground network will produce a shift (≈600mV) in the input
threshold and in the status output values if the microprocessor ground is not common to the
device ground. This shift will not vary if more than one HSD shares the same diode/resistor
network.
3.2 Load dump protection
D
ld
is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the
V
CC
max DC rating. The same applies if the device is subject to transients on the V
CC
line
that are greater than the ones shown in the ISO 7637-2: 2004(E) table.
3.3 MCU I/Os protec tion
If a ground protection network is used and negative transient are present on the V
CC
line,
the control pins will be pulled negative. ST suggests to insert a resistor (R
prot
) in line to
prevent the MCU I/Os pins to latch-up.
The value of these resistors is a compromise between the leakage current of MCU and the
current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of MCU
I/Os:
-V
CCpeak
/I
latchup
≤ R
prot
≤ (V
OHμC
-V
IH
-V
GND
) / I
IHmax
Calculation example:
For V
CCpeak
= - 100 V and I
latchup
≥ 20 mA; V
OHµC
≥ 4.5 V
5kΩ ≤ R
prot
≤ 180 kΩ
Recommended values: R
prot
=10 kΩ, C
EXT
=10 nF.
Application information VND5E025BK-E
24/34 Doc ID 16273 Rev 8
3.4 Current sense and diagnostic
The current sense pin performs a double function (see Figure 30: Current sense and
diagnostic):
●
Current mirror of the load current in normal operation, delivering a cur rent
proportional to the load one according to a known ratio K
X
.
The current I
SENSE
can be easily converted to a voltage V
SENSE
by means of an
external resistor R
SENSE
. Linearity between I
OUT
and V
SENSE
is ensured up to 5V
minimum (see parameter V
SENSE
in Table 9: Current sense (8V < VCC < 18V)). The
current sense accuracy depends on the output current (refer to current sense electrical
characteristics Table 9: Current sense (8V < VCC < 18V)).
●
Diagnostic flag in fault conditions, delivering a fixed voltage V
SENSEH
up to a
maximum current I
SENSEH
in case of the following fault conditions (refer to Truth table):
– Power limitation activation
– Overtemperature
A logic level high on CS_DIS pin sets at the same time all the current sense pins of the
device in a high impedance state, thus disabling the current monitoring and diagnostic
detection. This feature allows multiplexing of the microcontroller analog inputs by sharing of
sense resistance and ADC line among different devices.
Figure 30. Current sense and diagnostic
V
CC
CH 1
C ontrol & Diagnostic 1
LOGIC
DRIVER
V
ON
Limitation
Current
Limitation
Power
Clamp
Over
temp.
Undervoltage
V
SENSEH
Current
Sense
CH 2
O VERLOAD PRO TECTION
(A CT IV E POWER LIMITATION)
IN1
IN2
CS1
CS2
CS_
DIS
GND
OUT2
OUT1
Signal Clam p
CONTROL & DIAGNOSTIC
Channels 2
VND5E025BK-E Application information
Doc ID 16273 Rev 8 25/34
3.5 Maximum demagnetization energy (V
CC
=13.5V)
Figure 31. Maximum turn-off current versus inductance (for each channel)
1
10
100
0,1 1 10 100L (mH)
I (A)
Demagnetization Demagnetization Demagnetization
t
V
IN
, I
L
C:
T
jstart
= 125°C re petitive pu ls e
A:
T
jstart
= 150°C s ing le p uls e
B: T
jstart
= 100°C repetitive pulse
A
B
C
Note:
Values are generated with R
L
=0 Ω.
In case of repetitive pulses, T
jstart
(at beginning of each demagnetization) of every pulse must not exceed the temperature
specified above for curves A and B.
Package and thermal data VND5E025BK-E
26/34 Doc ID 16273 Rev 8
4 Package and thermal data
4.1
PowerSSO-24 th ermal data
Figure 32. PowerSSO-24 PC board
Figure 33. R
thj-amb
vs PCB copper area in open box free air condition (one channel
on)
Note:
Layout condition of R
th
and Z
th
measurements (PCB: Double layer, Thermal Vias, FR4 area = 77mm x 86mm, PCB
thickness = 1.6mm, Cu thickness = 70µm (front and back side), Copper areas: from minimum pad layout to 8cm
2
).
30
35
40
45
50
55
0246810
RTHj_amb(°C/W)
PCB Cu heatsink area (cm^ 2)
VND5E025BK-E Package and thermal data
Doc ID 16273 Rev 8 27/34
Figure 34. PowerSSO-24 thermal impedance junction to ambient single pulse (one
channel on)
Equation 1: pulse calculation formula
where δ = t
P
/T
Figure 35. Thermal fitting model of a double channel HSD in Power SSO-24
0.1
1
10
100
1000
0.0001 0.001 0.01 0.1 1 10 100 1000
Time (s)
ZTH (°C/W)
Footprint
8 cm
2
2 cm
2
ZTHδRTH δZTHtp 1δ–()+⋅=
Note:
The fitting model is a simplified thermal tool and is valid for transient evolutions where the embedded protections (power
limitation or thermal cycling during thermal shutdown) are not triggered.
Package and thermal data VND5E025BK-E
28/34 Doc ID 16273 Rev 8
Table 14. Thermal parameters
Area/Island (cm
2
)Footprint 2 8
R1 (°C/W) 0.28
R2 (°C/W) 0.9
R3 (°C/W) 6
R4 (°C/W) 7.7
R5 (°C/W) 9 9 8
R6 (°C/W) 28 17 10
R7 (°C/W) 0.28
R8 (°C/W) 0.9
C1 (W.s/°C) 0.001
C2 (W.s/°C) 0.003
C3 (W.s/°C) 0.025
C4 (W.s/°C) 0.75
C5 (W.s/°C) 1 4 9
C6 (W.s/°C) 2.2 5 17
C7 (W.s/°C) 0.001
C8 (W.s/°C) 0.003
VND5E025BK-E Package and packing information
Doc ID 16273 Rev 8 29/34
5 Package and packing information
5.1 ECOPACK
®
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK
®
is an ST trademark.
5.2 Package mechanical data
Figure 36. PowerSSO-24 package dimensions
Package and packing information VND5E025BK-E
30/34 Doc ID 16273 Rev 8
5.3 Packing information
Figure 37. PowerSSO-24 tube shipment (no suffix)
Table 15. PowerSSO-24
mechanical data
Symbol Millimeters
Min. Typ. Max.
A2.15 2.47
A2 2.15 2.40
a1 0 0.075
b0.33 0.51
c0.23 0.32
D 10.10 10.50
E7.4 7.6
e0.8
e3 8.8
G0.1
G1 0.06
H10.1 10.5
h0.4
k5°
L0.55 0.85
N10°
X4.1 4.7
Y6.5 7.1
A
CB
All dimensions are in mm.
Base Qty 49
Bulk Qty 1225
Tube length (±0.5) 532
A3.5
B13.8
C (±0.1) 0.6
VND5E025BK-E Package and packing information
Doc ID 16273 Rev 8 31/34
Figure 38. PowerSSO-24 tape and reel shipment (suffix “TR”)
Base Qty 1000
Bulk Qty 1000
A (max) 330
B (min) 1.5
C (±0. 2) 13
F20.2
G (+2 / -0) 24.4
N (min) 100
T (max) 30.4
REEL DIMENSIONS
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
All dimensions are in mm.
Tape width W 24
Tape Hole Sp acing P0 (±0.1) 4
Component Spacing P 12
Hole Diam et er D (±0.05) 1.55
Hole Diam et er D1 (min) 1.5
Hole Posi tio n F (±0.1) 11.5
Compartment Depth K (max) 2.85
Hole Spacing P1 (±0.1) 2
Top
cover
tape
End
Start
No co m ponentsNo components Components
500mm min 500mm min
Empty components pockets
seale d w i t h cover tape.
User direction of feed
Order codes VND5E025BK-E
32/34 Doc ID 16273 Rev 8
6 Order codes
Table 16. Device summary
Package Order codes
Tube Tape and reel
PowerSSO-24 VND5E025BK-E VND5E025BKTR-E
VND5E025BK-E Revision history
Doc ID 16273 Rev 8 33/34
7 Revision history
Table 17. Document revision history
Date Revision Changes
17-Sep-2009 1 Initial release.
02-Nov-2009 2 Updated Table 5: Power section.
30-Nov-2009 3 Updated Table 9: Current sense (8V < VCC < 18V).
Updated Figure 9: Maximum current sense ratio drift vs load current
21-Jan-2010 4 Updated Table 9: Current sense (8V < VCC < 18V)
03-Feb-2010 5
Updated fol lowi ng tables:
–Table 6: Switchin g (VCC = 13V; Tj = 25°C )
–Table 9: Current sense (8V < VCC < 18V)
Updated fol lowi ng figures:
–Figure 8: I
OUT
/I
SENSE
vs I
OUT
–Figure 9: Maximum cu rrent sense ratio drift vs load current
19-Feb-2010 6 Updated Table 6: Switching (VCC = 13V; Tj = 25°C).
11-Oct-2010 7 Changed document status from target specification to datasheet.
19-Sep-20 13 8 Updated Disc la im er.
VND5E025BK-E
34/34 Doc ID 16273 Rev 8
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