〇Product structure : Silicon monolithic integrated circuit 〇This product has no designed protection against radioactive rays
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TSZ02201-0E2E0H500140-1-2
© 2016 ROHM Co., Ltd. All rights reserved.
2016.08.05 Rev.002
www.rohm.com
TSZ22111・14・001
CXPI Transceiver for Automotive
BD41000FJ-C
General Description
BD41000FJ-C is a transceiver for the CXPI (Clock
Extension Peripheral Interface) communication.
Switching between Master/Slave Mode can be done
using external pin (MS pin).
Low power consumption during standby
(non-communication) using Power Saving function.
Arbitration function stops the data output upon detection
of BUS data collision. Also Fail-safe function stops
outputs upon detection of under voltage or temperature
abnormality.
Features
AEC-Q100 Qualified (Note1)
CXPI standards Qualified
Transmission speed range from 5kbps to 20kbps
Master/Slave switching function
Microcontroller interface corresponds to 3.3V/5.0V
Built-in terminator (30kΩ)
Power saving function
Data arbitration function
Built-in Under Voltage Lockout (UVLO) function
Built-in Thermal Shutdown (TSD) function
Low EME(Electromagnetic Emission)
High EMI(Electromagnetic Immunity)
High ESD(Electrostatic Discharge) robustness
(Note1: Grade 1)
Applications
Automotive networks
Key Specifications
Power Supply Voltage： +7V to +18V
Absolute Maximum Rating of BAT： -0.3V to +40V
Absolute Maximum Rating of BUS： -27V to +40V
Power OFF Mode Current： 3 μA (Typ)
Operating Temperature Range： -40°C to +125°C
Package W(Typ) x D(Typ) x H(Max)
SOP-J8 4.90mm x 6.00mm x 1.65mm
SOP-J8
Typical Application Circuit
Figure 1. Typical Application Circuit
BD41000FJ-C
Regulator
Micro
Controller
(Note 1)
INT
CLK(3)
VDD MS(8)
TXD(4)
RXD(1)
NSLP(2) GND(5)
BUS(6)
BAT(7)
10kΩ2.7kΩ(Note 2)
2.7kΩ
GND 220pF
100nF
BD41000FJ-C
Regulator
Micro
Controller
(Note 1) CLK(3)
VDD MS(8)
TXD(4)
RXD(1)
NSLP(2) GND(5)
BUS(6)
BAT(7)
10kΩ
2.7kΩ
GND
1kΩ
1nF
100nF
Master node CXPI BUS VECU
Note 2 While using slave, It is no problem that CLK is opened in the case of non-using CLK output.
Slave node
RXD
TXD
CLK
I/O
Note 1 INT: Interrupt, RXD: UART RXD, TXD: UART TXD, CLK: Clock, I/O: General Purpose I/O
INT
RXD
TXD
CLK
I/O
Datashee
t
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BD41000FJ-C
TSZ02201-0E2E0H500140-1-2
© 2016 ROHM Co., Ltd. All rights reserved.
2016.08.05 Rev.002
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TSZ22111 • 15 • 001
Pin Configuration
Figure 2. Pin Configuration
Pin Description Table 1. Pin Description
Pin No.
Function
1
Received data output pin
2
Power saving control input pin
(“H”：Change to “Codec mode”,
“L”：Change to “Power OFF mode”)
3
Clock signal input/output pin
(Master setting: Input, Slave setting: Output)
4
Transmission data input pin
5
Ground
6
CXPI BUS pin
7
Power supply pin
8
Master/Slave switching pin
(“H”: Master, “L”: Slave)
Block Diagram
Figure 3. Block Diagram
1
2
3
4 5
6
7
8
RXD MS
NSLP
CLK
TXD
BAT
BUS
GND
(TOP VIEW)
BAT
Thermal
Shutdown
(TSD)
Power on
Reset
(POR)
Oscillator
LOGIC
BUS
Low Pass
Filter
30kΩ
Decoder
EncoderArbiter
Timing
Generator
Slope Control
GND
RXD
TXD
NSLP
To each block
CLK
Slope
Timer
Dominant
Timeout Counter
(DTC)
Wakeup
Timer
Controller
8
MS
Under Voltage
Lockout
(UVLO) Regulator
BAT
1
4
2
3
5
6
7
3/19
BD41000FJ-C
TSZ02201-0E2E0H500140-1-2
© 2016 ROHM Co., Ltd. All rights reserved.
2016.08.05 Rev.002
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TSZ22111 • 15 • 001
Description of Blocks
State Transition Diagram
BD41000FJ-C is built-in “Power OFF Mode”, “Through Mode”, “RX Through Mode” other than “CODEC Mode” for power
saving control. Each mode is controlled by NSLP, BUS, and TXD pins.
Figure 4. State Transition Diagram
Please refer to the following parameter of the electrical characteristic about (Note 1) and (Note 2).
(Note 1): Wakeup pulse detection LO time, (Note 2): Wakeup input detection time (TXD)
While using master, CLK becomes input pin, and uses to input BUS clock in CODEC mode
Power OFF Mode
“Power OFF Mode” reduces power consumption by not supplying powers to any circuits other than necessary ones for
“Wakeup pulse detection (BUS)” and “Wakeup input detection (TXD)”.
When TXD is “H”, Wakeup input is detected, and then changes to “Through mode”. In the case of shifts to “Power OFF
Mode”, TXD is “L”, and then NSLP is “L”.
“Through Mode” and “RX Through mode” cannot change to “Power OFF Mode” directly. Please change via “CODEC Mode”
with NSLP as “H”.
Through Mode
“Through mode” does not process Coding/Decoding. It only drives signals from TXD to BUS and from BUS to RXD
directly.
Please change to “Through mode” with TXD as “H” to send Wakeup pulse.
RX Through Mode
“RX Through Mode” reverses RXD output at each rising edge of BUS.
Please monitor the change of RXD to detect Wakeup pulse in “Power OFF Mode”,.
CODEC Mode
“CODEC Mode” is the mode of CXPI communication. NSLP should be “H” for the chip to enter “CODEC Mode”.
Outputs in the case of Master setting are changed by the falling edge of CLK, and in the case of Slave setting are changed
by the falling edge of BUS. BUS signal is delayed 2.0±0.5Tbit from TXD input, and RXD is delayed 1.0±0.5Tbit from BUS
input.
The jitter of CLK input should satisfy the CXPI standard (±1.0%) including the effect of BD41000FJ-C (±0.05%) in the case
of Master setting.
Power OFF Mode
RXD output
Non-power Supply
VBAT≥VPOR
When VBAT<VPOR is established
in all modes, It shifts to
non-power supply state
NSLP=H
BUS
Wakeup pulse detect
(Note 1)
TXD
Wakeup input detect
(Note 2)
CLK output (slave)
BUS output
BUS terminator
Hi-Z(H) fixed
Hi-Z(H) fixed
Hi-Z(H) fixed
Weak pull-up
RX Through Mode
RXD output
CLK output (slave)
BUS output
BUS terminator
Output is reversed at every
BUS signal rising edge
BUS clock output
Hi-Z(H) fixed
30kΩ pull-up
CODEC Mode
RXD output
CLK output (slave)
BUS output
BUS terminator
Decode BUS signal,
and output it
BUS clock output
Code TXD signal,
and output it.
30kΩ pull-up
Through Mode
RXD output
CLK output (slave)
BUS output
BUS terminator
Output BUS signal
by through
Hi-Z(H) fixed
Output TXD signal
by through
30kΩ pull-up
NSLP=H
NSLP=HNSLP=L
4/19
BD41000FJ-C
TSZ02201-0E2E0H500140-1-2
© 2016 ROHM Co., Ltd. All rights reserved.
2016.08.05 Rev.002
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TSZ22111 • 15 • 001
Sequence Diagram
It shows the example of BD41000FJ-C control sequence (“Sleep Mode”, “Standby Mode” and “Normal Mode”)
corresponding to the CXPI standard. (Please refer to the CXPI standard for specifications about the detail of mode
management.)
1. The Sequence from “Normal Mode” to “Sleep Mode”
When changing to “Sleep Mode”, NSLP should be switched from “H” to “L”, and then the IC turns to “Power OFF Mode”.
TXD has built-in pull-down resistor in case of a fail-safe. In “Sleep Mode”, set TXD to “L” before BD41000FJ-C enters
“Power OFF Mode” to prevent extra currents from MCU side.
Set CLK to “L” just like TXD, because the pull-down resister of CLK is active in the case of Master setting.
Figure 5. The Sequence from “Normal Mode” to “Sleep Mode”
Figure 6. The Timing Chart from “Normal Mode” to “Sleep Mode” (Master)
Micro Controller
(MCU)
Sleep condition
establish
TXD (Sleep flame)
Normal Mode
Master Node
BD41000FJ-C
Sleep flame transmit
Sleep flame transmit
(with coding)
Sleep flame detect
CLK output stop
TXD output control
Power off indicate
CLK (“L” fixed)
TXD (“L” output)
NSLP (“L” fixed)
Sleep Mode
CODEC Mode
Power OFF Mode
BD41000FJ-C
CODEC Mode
Slave Node
Micro Controller
(MCU)
Sleep flame detect
RXD (Sleep flame)
TXD output control
Power off indicate
TXD (“L” output)
NSLP (“L” output)
Sleep Mode
Normal Mode
Power off Mode
Sleep flame transmit
(with coding)
Sleep flame(Note 1)
BUS clock supply stop
Note 1 Please refer to the CXPI standard about Sleep flame.
RXD (Sleep flame)
NSLP
TXD
CLK
RXD
BUS
Power OFF Mode
Operating
mode
Sleep flame transmit
Sleep flame receive
Sleep flame
CODEC Mode
Master Node
Tclock_stop_m (Note1)
Note 1 Please refer to the CXPI standard about Tclock_stop_m.
5/19
BD41000FJ-C
TSZ02201-0E2E0H500140-1-2
© 2016 ROHM Co., Ltd. All rights reserved.
2016.08.05 Rev.002
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TSZ22111 • 15 • 001
Figure 7. The Timing Chart from “Normal Mode” to “Sleep Mode” (Slave)
2. The Sequence from “Sleep Mode” to “Normal Mode” (Master Node Trigger)
To wake up the node by an internal factor, set NSLP to “H” for the chip to enter “CODEC Mode”. TXD should be “H” for
about 30µs before changing from “Power OFF Mode” to “CODEC Mode” in order to prevent abnormal outputs of BUS or
RXD.
In the case of slave mode, BD41000FJ-C reverses RXD output at every rising edge of BUS signal after receiving BUS
clock. It is better to wake up by the second clock rising edge.
To change from “Standby Mode” to “Sleep Mode” because the slave node cannot receive the second rising pulse within
the specified time, please return to “Power OFF Mode” with NSLP as “L” again after the change to “CODEC Mode” with
NSLP as “H”.
Figure 8. The Sequence from “Sleep Mode” to “Normal Mode” (Master Node Trigger)
NSLP
TXD
RXD
BUS
Power OFF Mode
Operating
mode
Sleep flame receive
Sleep flame
CODEC Mode
Slave Node
Tsleep_s (Note 2)
Note 2 Please refer to the CXPI standard about Tsleep_s.
Micro Controller
(MCU)
Wakeupfactor
CLK (Output start)
Master Node
BD41000FJ-C
CLK output start
TXD output control
Power off reset
Power OFF Mode
BD41000FJ-C
Power OFF Mode
Slave Node
Micro Controller
(MCU)
Wakeupdetect
Wakeupdecision
TXD output control
TXD (“H” output)
Normal Mode
StandbyMode
CODEC Mode
BUS clock supply start
Sleep Mode
StandbyMode
TXD (“H” output)
NSLP (“H” output)
CLK transmit
(with coding) Wakeuppulse receive
(First rising edge)
RXD (“L” output)
RXD (“H” output)
After that, Output reverse by
every BUS signal pull up edge
Power off control
Sleep Mode
Wakeuppulse receive
(Second rising edge)
CODEC ModeNormal Mode
NSLP (“H” output)
RX Through Mode
6/19
BD41000FJ-C
TSZ02201-0E2E0H500140-1-2
© 2016 ROHM Co., Ltd. All rights reserved.
2016.08.05 Rev.002
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TSZ22111 • 15 • 001
Figure 9. The Timing Chart from “Sleep Mode” to “Normal Mode” (Master Node Trigger, Master)
Figure 10. The Timing Chart from “Sleep Mode” to “Normal Mode” (Master Node Trigger, Slave)
NSLP
TXD
CLK
RXD
BUS
CODEC Mode
Operating
mode Power OFF Mode
Master Node
Within 30μs
NSLP
TXD
RXD
BUS
CODEC Mode
Operating
mode Power OFF Mode
Slave Node
Wakeuppulse
(Clock signal)
CLK
RX Through
Mode
Within 30μs
7/19
BD41000FJ-C
TSZ02201-0E2E0H500140-1-2
© 2016 ROHM Co., Ltd. All rights reserved.
2016.08.05 Rev.002
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TSZ22111 • 15 • 001
3. The Sequence from “Sleep Mode” to “Normal Mode” (Slave Node Trigger)
To wake up the slave node by an internal factor, set TXD to “H” for the chip to enter “Through Mode”.
After receiving the wakeup pulse in the Master Node, RXD output reverses at every rising edge of the BUS signal. It is
better to establish Wakeup at clock’s first rising edge.
To change from “Standby Mode” to “Sleep Mode”, in case the master node cannot receive BUS clock within the
specified time, set NSLP to “L” to return to “Power OFF Mode” then enter to “CODEC Mode” by setting NSLP to “H”.
Figure 11. The Sequence from “Sleep Mode” to “Normal Mode” (Slave Node Trigger)
Figure 12. The Timing Chart from “Sleep Mode” to “Normal Mode” (Slave Node Trigger, Master)
Micro Controller
(MCU)
Master Node
BD41000FJ-C
Power OFF Mode
BD41000FJ-C
Power OFF Mode
Slave Node
MicroController
(MCU)
Normal Mode
StandbyMode
BUS clock supply start
Sleep Mode
StandbyMode
Clock transmit
(with coding)
Power off control
Sleep Mode
Clock receive
RX Through Mode
NSLP (“H” output)
Through Mode In the case of it cannot receive
clock within the role time,
Wakeup pulse retransmit
Wakeupfactor
TXD output control
TXD (“H” output)
Wakeup BD41000FJ-C
when it exceeds TTXD_wakeup
Wakeuppulse transmit
TXD (Wakeup pulse)
Wakeuppulse transmit
(without coding)
Wakeuppulse receive
Wakeupdetect
CLK output start
TXD output control
Power off control
CLK (Output start)
TXD (“H” output)
NSLP (“H” output)
Clock signal detect
RXD(Clock signal)
CODEC Mode
RXD (“L” output)
Normal Mode CODEC Mode
Wakeup pulse
After that, Output reverse at
every BUS signal rising edge
Through output
NSLP
TXD
RXD
BUS
CODEC Mode
Operation
mode Power OFF Mode
Master Node
CLK
Within 30μs
Rx Through Mode
Tclock_start_m (Note1)
Note 1,2 Please refer to the CXPI standard about Tclock_start_m, Ttx_wakeup.
Ttx_wakeup(Note 2)
8/19
BD41000FJ-C
TSZ02201-0E2E0H500140-1-2
© 2016 ROHM Co., Ltd. All rights reserved.
2016.08.05 Rev.002
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TSZ22111 • 15 • 001
Figure 13. The Timing Chart from “Sleep Mode” to “Normal Mode” (Slave Node Trigger, Slave)
Transmission and Reception Started Effective Time after Shift to CODEC Mode
To detect clock sequence is to learn the LO width of logic value1 during “CODEC Mode” with NSLP as “H”. To keep
learning it, please start to transmit and receive data after the time equal to 16 Tbit clocks at least. (6 Tbit clocks are
necessary until BUS clock is outputted by BUS or CLK after NSLP as “H”.)
Figure 14. The Actual Time of Transmission and Reception after “CODEC Mode” Changing
Arbitration Function
BD41000FJ-C has built-in function to stop transmission upon detection of BUS data collision.
When the signal is detected on BUS before the start of transmit data, BD41000FJ-C stops to transmit data of 1UART
flame section.
Figure 15. Arbitration Function (When Reception is detected before Reception)
NSLP
TXD
CLK
RXD
BUS
CODEC Mode
Power OFF Mode
Slave Node
Wakeuppulse
Ttx_wakeup(Note 2) Ttx_wakeup(Note 2)
Ttx_wakeup_space(Note 3)
Through Mode
Note2,3 Please refer to the CXPI standard about Ttx_wakeup, Ttx_wakeup_space
TTXD_wakeup
Operation
mode
BUS
Max 6Tbit 16Tbit
Prohibit Transmit and Receive Transmit and Receive possible
16Tbit
Prohibit Transmit and Receive Transmit and Receive
possible
Max 6Tbit
Power OFF RX
Through
Master
NSLP
Master
CLK
Slave
RXD
Slave
NSLP
Slave
CLK
Slave
state
Master
state
0 1 0
10 0 1 1 11 0
Stop BUS output
Transmission
possible
1 0 1 0 1 01 0
Start
Bit Stop
Bit
Start
Bit
Detect
signal
Stop
Bit
Transmission impossible
Start
Bit
Transmission possible
Start
Bit
Restart BUS output
TXD
BUS
RXD
Transmission
possible
(Arbitration)
6.5Tbit2.5Tbit
9/19
BD41000FJ-C
TSZ02201-0E2E0H500140-1-2
© 2016 ROHM Co., Ltd. All rights reserved.
2016.08.05 Rev.002
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TSZ22111 • 15 • 001
In the case of collision (arbitration defeat) after data transmission by other node on BUS, it stops the transmission of
remaining UART flame data at the collision. It is necessary to have the interval 1Tbit more to transmit again after
arbitration defeat.
Figure 16. Arbitration Function (When the Collision is detected after Data Transmission)
Fail-safe Mode
BD41000FJ-C has built in fail-safe mode such as DTC (TXD Dominant Abnormal Detection Circuit), TSD (Abnormal
Thermal Detection Circuit) and UVLO/POR (Abnormal Under Voltage Detection Circuit).
The operations of each abnormality situation are as follows;
Table 2. Fail-safe Functions
Fail-safe Function
State Transition
BUS Output
RXD Output
CLK Output
(While using slave)
DTC abnormality
No change
CODEC Mode：Logical value1 output(Note 1)
Through Mode：Hi-Z(H) fixed
BUS signal output
Hi-Z (H) fixed
TSD abnormality
No change
Hi-Z (H) fixed
Hi-Z (H) fixed
Hi-Z (H) fixed
UVLO abnormality
No change
Hi-Z (H) fixed
Hi-Z (H) fixed
Hi-Z (H) fixed
POR abnormality
Power OFF Mode
Hi-Z (H) fixed
Hi-Z (H) fixed
Hi-Z (H) fixed
(Note 1) In the case of TXD fixed L, Logical value0 is outputted only in first 10bit. Logical value1 is outputted before DTC abnormality is detected.
When “L” time of TXD is more than TDTC, DTC (Dominant Timeout Counter) detects abnormality, and then it stops output. It
can retune to normal status with TXD as “H”
When the junction temperature exceeds TTSD, TSD (Thermal Shutdown) circuit detects abnormality, and then it stops
output. It can return to normal status when the temperature drops below TTSD_HYS.
Operations of UVLO (Under Voltage Lockout) and POR (Power ON Reset) are as follows;
When supply voltage drops below VUVLO, UVLO abnormality is detected, and then BUS, RXD and CLK outputs are fixed
Hi-Z (H). (Only slave)
When power supply exceeds VUVLO, transceiver restarts output. When supply voltage drops below VPOR, POR abnormality
is detected, and then it changes to “Power OFF Mode”, and reset status.
Figure 17. Internal Status and Mode by Supply Voltage
0 1 0 1
10 0 1 1 11 0
Stop BUS output
Transmission possible
1 0 1 0 1 01 0
Start
Bit Stop
Bit
Start
Bit
Defeat
(TXD≠RXD)
Stop
Bit
送信停止
Occurring
collision Transmission impossible
Start
Bit
Transmission possible
0
Start
Bit
Restart BUS output
TXD
BUS
RXD
Absolute maxim rating
40V
Operating guarantee range
POR
Activation range
BAT
voltage UVLO
Activation range
Power OFF Normal operation
UVLO
detection state
18V7V6.7V5.0V0V
Mode
10/19
BD41000FJ-C
TSZ02201-0E2E0H500140-1-2
© 2016 ROHM Co., Ltd. All rights reserved.
2016.08.05 Rev.002
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TSZ22111 • 15 • 001
Absolute Maximum Ratings (Ta = 25°C)
Table 3. Absolute Maximum Ratings (Ta = 25°C)
Parameter
Symbol
Rating
Unit
Supply Voltage on Pin BAT (Note 1)
VBAT
-0.3 to +40.0
V
MS Voltage
VMS
-0.3 to +40.0
V
BUS Voltage
VBUS
-27.0 to +40.0
V
CLK, TXD, RXD, NSLP voltage
VMCU
-0.3 to +7.0
V
Power Dissipation (Note 2)
Pd
0.67
W
Storage Temperature Range
Tstg
-55 to +150
°C
Junction Max Temperature
Tjmax
150
°C
Electro Static Discharge (HBM) (Note 3)
VESD
4000
V
(Note 1) Pd, ASO should not be exceeded.
(Note 2) Regarding above Ta=25°C, Pd decreased at 5.40mW/°C for temperatures when mounted on 70x70x1.6mm Glass-epoxy PCB.
(Note 3) JEDEC qualified.
Caution: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over
the absolute maximum ratings.
Recommended Operating Conditions
Table 4. Recommended Operating Conditions
Parameter
Symbol
Rating
Unit
BAT Supply Voltage Range
VBAT
+7 to +18
V
Operating Temperature Range
Topr
-40 to +125
°C
11/19
BD41000FJ-C
TSZ02201-0E2E0H500140-1-2
© 2016 ROHM Co., Ltd. All rights reserved.
2016.08.05 Rev.002
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TSZ22111 • 15 • 001
Electrical Characteristics (Unless Otherwise Specified Ta=-40°C to +125°C, VBAT=7V to 18V)
Table 5. Electrical Characteristics (1)
Parameter
Symbol
Min
Typ
Max
Unit
Conditions
BAT
Supply Current 1
IBAT_SLP
-
3
10
µA
After NSLP Shifts from H to L
Supply Current 2
IBAT_NOR
-
3
10
mA
NSLP=H, MS=H,
CLK=20kHz (Duty=50%)
TXD=10kHz (Duty=50%)
TXD, NLSP, CLK (When Input)
VIH
VIHMCU_IN
2.0
-
-
V
VIL
VILMCU_IN
-
-
0.8
V
Input H Current
IIHMCU_IN
6.0
14.0
40.0
µA
Input Voltage=5V
Input L Current
IILMCU_IN
-5.0
0.0
5.0
µA
Wakeup Input Detection Time
(TXD)
TTXD_wakeup
30
100
150
µs
H Width
Input Clock Duty
(CLK)
DutyCLK
48
50
95
%
Duty Rule of H Width
MS
VIH
VIHMS_IN
VBAT-1.0
-
-
V
VIL
VILMS_IN
-
-
VBAT-3.0
V
Input H Current
IIHMS_IN
-5.0
-
5.0
µA
Input Voltage= VBAT =18V
Input L Current
IILMS_IN
-5.0
-
5.0
µA
In Power OFF Mode
RXD, CLK (When Output)
Output ON Current
OILMCU_OUT
1.3
3.5
-
mA
Output Pin=0.4V
Output OFF Current
OIHMCU_OUT
-5.0
0.0
5.0
µA
Output Pin =5V
BUS (DC Characteristics)
Recessive Output Voltage
VBUS_RES
VBAT
x 0.9
-
-
V
RL=500Ω
Dominant Output Voltage 1
VBUS_DOM_1
-
-
1.2
V
VBAT=7V, RL=500Ω
Dominant Output Voltage 2
VBUS_DOM_2
0.6
-
-
V
VBAT=7V, RL=1kΩ
Dominant Output Voltage 3
VBUS_DOM_3
-
-
2.0
V
VBAT=18V, RL=500Ω
Dominant Output Voltage 4
VBUS_DOM_4
0.8
-
-
V
VBAT=18V, RL=1kΩ
H Level Leakage Current
IIHBUS
-5.0
0.0
5.0
µA
When Recessive Output
VBAT= VBUS=18V
Pull-up Resister
RBUS
20
30
50
kΩ
VBAT=12V
Short-circuit Output Current
IOCPBUS
40
-
200
mA
VBAT= VBUS=18V、RL=0Ω
L Current at Receiver Operating
IOLBUS
-1
-
-
mA
VBAT=12V, VBUS=0V
Input Leakage Current at
Receiver Operating
ILBUS
-
-
20
µA
VBAT=8V, VBUS=18V
Leakage Current when NO_GND
ILBUS_NO_GND
-1
-
1
mA
GND=VBAT=12V,
VBUS=0V to 18V
Leakage Current when NO_BAT
ILBUS_NO_BAT
-
-
100
µA
VBAT=0V, VBUS=0V to18V
Input H Threshold Voltage
VIHBUS_REC
VBAT
x 0.556
-
-
V
Input L Threshold Voltage
VILBUS_DOM
-
-
VBAT
x 0.423
V
Input Threshold Voltage (Typical)
VTHCBUS
VBAT
x 0.475
VBAT
x 0.5
VBAT
x 0.525
V
Input Hysteresis Voltage
VHYSBUS
-
-
VBAT
x 0.133
V
12/19
BD41000FJ-C
TSZ02201-0E2E0H500140-1-2
© 2016 ROHM Co., Ltd. All rights reserved.
2016.08.05 Rev.002
www.rohm.com
TSZ22111 • 15 • 001
Table 6. Electrical Characteristics (2)
Parameter
Symbol
Min
Typ
Max
Unit
Conditions
BUS (AC Characteristics)
LO Level Time 1 of Logical Value
“1” (Note 1)
Ttx_1_lo_rec
-
-
0.39Tbit
+0.6τ
-
TH_rec=70%
LO Level Time 2 of Logical Value
“1”
Ttx_1_lo_dom
0.11
-
-
Tbit
TH_dom=30%
HI Detection Time of Receiving
Ttx_0_hi
0.06
-
-
Tbit
TH_rec=55.6%
Difference of LO Level Time
Between Logical Value “1” and
Logical Value “0”
Ttx_dif
0.06
-
-
Tbit
Ttx_dif= Ttx_0_lo - Ttx_1_lo
Delay Time from the LO Level
Detection to Logical Value “0”
Output
Ttx_0_pd
-
-
0.11
Tbit
TH_dom=30%
LO time 1 of Logical Value “0”
Ttx_0_lo_rec
Ttx_1_lo_rec
+ 0.06
-
-
Tbit
TH_rec=70%
LO time 2 of Logical Value “0”
Ttx_0_lo_dom
Ttx_1_lo_dom
+ 0.06
-
-
Tbit
TH_dom=30%
BUS Pull-down Time
Ttx_1_dom_m
-
-
0.16
Tbit
TH_dom=30%
Recessive Voltage of Logical
Value “0”
V_rec_0
93
-
-
%
Ratio for the Recessive
voltage (V_rec_1)
when logical value is 1
Wakeup Pulse Detection LO
Time for Master Setting
Trx_wakeup_master
30
100
150
µs
TH_dom=42.3%
Wakeup Pulse Detection LO
Time for Slave Setting
Trx_wakeup_slave
0.5
3
5
µs
TH_dom=42.3%
TSD
TSD Detection Temperature(Note
2)
TTSD
150
-
200
°C
TSD Hysteresis Temperature(Note
2)
TTSD_HYS
-
14
-
°C
UVLO
UVLO Detection Voltage
VUVLO
5.0
-
6.7
V
POR
POR Detection Voltage
VPOR
-
-
5.0
V
DTC
Dominant Time-out Time
TDTC
9
13
22
ms
(Note 1) τis a fixed number when BUS (1μs ≤τ≤ 5μs)
(Note 2) It is a design guarantee parameter, and is not production tested.
Figure 18. BUS Waves of Logical Value 1, 0
BUS Wave
Logical Value “1”
V_rec_0
TH_rec
TH_dom
Ttx_1_dom_m
Ttx_0_lo_dom
Ttx_0_lo_rec Ttx_0_hi
Ttx_1_lo_dom
Ttx_1_lo_rec
V_rec_1
TH_rec
TH_dom
Ttx_dif
Tbit
BUS Wave
Logical Value “0”
Note1 These parameters show the ratio for VBAT.
(Note1)
(Note1)
(Note1)
(Note1)
13/19
BD41000FJ-C
TSZ02201-0E2E0H500140-1-2
© 2016 ROHM Co., Ltd. All rights reserved.
2016.08.05 Rev.002
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TSZ22111 • 15 • 001
Application Example
Figure 19. Application Example of Secondary Clock Master Option
Power Dissipation
Figure 20. Power Dissipation
(Note 1) Measured Board (70mm x 70mm x 1.6mm, glass epoxy 1-layer)
(Note 2) These values are changed by number of layer and copper foil area.
BD41000FJ-C
Regulator
Micro
Controller
(Note 1)
INT
CLK(3)
VDD MS(8)
TXD(4)
RXD(1)
NSLP(2) GND(5)
BUS(6)
BAT(7)
10kΩ2.7kΩ(Note 2)2.7kΩ
GND 220pF
100nF
Note 2 While using slave, Pullup registor is no need for CLK in the case of non-using CLK output.
Slave node (Applicable secondary clock master option)
RXD
TXD
CLK
I/O
Note 1 INT: Interrupt, RXD: UART RXD, TXD: UART TXD, CLK: Clock, I/O: General Purpose I/O
CXPI BUS VECU
I/O
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
025 50 75 100 125 150
Power dissipation Pd[W]
Temp Ta [℃]
0.67W
θja = 185.2℃/W
14/19
BD41000FJ-C
TSZ02201-0E2E0H500140-1-2
© 2016 ROHM Co., Ltd. All rights reserved.
2016.08.05 Rev.002
www.rohm.com
TSZ22111 • 15 • 001
I/O Equivalent Circuits
Type
Equivalence Circuit
Type
Equivalence Circuit
A
Output pin: RXD
B
Input pin: NSLP, TXD
C
Input/output pin: CLK
D
CXPI BUS Input/output pin: BUS
E
Input pin: MS
BUS
BAT
1/2 x BAT
15/19
BD41000FJ-C
TSZ02201-0E2E0H500140-1-2
© 2016 ROHM Co., Ltd. All rights reserved.
2016.08.05 Rev.002
www.rohm.com
TSZ22111 • 15 • 001
Operational Notes
1. Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power
supply pins.
2. Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Furthermore, connect a capacitor to ground at
all power supply pins. Consider the effect of temperature and aging on the capacitance value when using electrolytic
capacitors.
3. Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
4. Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5. Thermal Consideration
Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may
result in deterioration of the properties of the chip. In case of exceeding this absolute maximum rating, increase the
board size and copper area to prevent exceeding the maximum junction temperature rating.
6. Recommended Operating Conditions
These conditions represent a range within which the expected characteristics of the IC can be approximately obtained.
The electrical characteristics are guaranteed under the conditions of each parameter.
7. Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow
instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power
supply. Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and
routing of connections.
8. Operation Under Strong Electromagnetic Field
Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.
9. Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may
subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply
should always be turned off completely before connecting or removing it from the test setup during the inspection
process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during
transport and storage.
10. Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and
unintentional solder bridge deposited in between pins during assembly to name a few.
11. Unused Input Pins
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small
charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and
cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the
power supply or ground line.
16/19
BD41000FJ-C
TSZ02201-0E2E0H500140-1-2
© 2016 ROHM Co., Ltd. All rights reserved.
2016.08.05 Rev.002
www.rohm.com
TSZ22111 • 15 • 001
Operational Notes – continued
12. Regarding the Input Pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a
parasitic diode or transistor. For example (refer to figure below):
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be
avoided.
Figure 21. Example of Monolithic IC Structure
13. Ceramic Capacitor
When using a ceramic capacitor, determine the dielectric constant considering the change of capacitance with
temperature and the decrease in nominal capacitance due to DC bias and others.
14. Area of Safe Operation (ASO)
Operate the IC such that the output voltage, output current, and the maximum junction temperature rating are all within
the Area of Safe Operation (ASO).
15. Thermal Shutdown Circuit(TSD)
This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always
be within the IC’s maximum junction temperature rating. If however the rating is exceeded for a continued period, the
junction temperature (Tj) will rise which will activate the TSD circuit that will turn OFF all output pins. When the Tj falls
below the TSD threshold, the circuits are automatically restored to normal operation.
Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no
circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from
heat damage.
N N
P+PN N
P+
P Substrate
GND
NP+N N
P+
NP
P Substrate
GND GND
Parasitic
Elements
Pin A
Pin A
Pin B Pin B
B C
EParasitic
Elements
GND
Parasitic
Elements
CB
E
Transistor (NPN)Resistor
N Region
close-by
Parasitic
Elements
17/19
BD41000FJ-C
TSZ02201-0E2E0H500140-1-2
© 2016 ROHM Co., Ltd. All rights reserved.
2016.08.05 Rev.002
www.rohm.com
TSZ22111 • 15 • 001
Ordering Information
B
D
4
1
0
0
0
F
J
－
C
G
E
2
Part Number
Package
FJ: SOP-J8
Product Rank
C: for Automotive
G: Halogen free
Packaging and forming specification
E2: Embossed tape and reel
Marking Diagrams
Part Number Marking
Package
Orderable Part Number
41000
SOP-J8
BD41000FJ-CGE2
SOP-J8 (TOP VIEW)
41000
Part Number Marking
LOT Number
1PIN MARK
18/19
BD41000FJ-C
TSZ02201-0E2E0H500140-1-2
© 2016 ROHM Co., Ltd. All rights reserved.
2016.08.05 Rev.002
www.rohm.com
TSZ22111 • 15 • 001
Physical Dimension, Tape and Reel Information
Package Name
SOP-J8
19/19
BD41000FJ-C
TSZ02201-0E2E0H500140-1-2
© 2016 ROHM Co., Ltd. All rights reserved.
2016.08.05 Rev.002
www.rohm.com
TSZ22111 • 15 • 001
Revision History
Date
Revision
Changes
15.Dec.2015
001
New Release
5.Aug.2016
002
P1 General Desciption, Features Modified Power saving mode to Power saving
P1 Key Specifications Modified Power Saving Mode to Power OFF Mode
P1 Typical Application Circuit Delete redundant diode
P1 Typical Application Circuit Modified VBAT to VECU
P2 Pin Description Modified Functon explanation of NSLP
P2 Pin Desctiption Modified Function explanation of CLK
P2 Block Diagram Modified pin number of GND
P3 State Transition Chart Modified CLK output (slave) of RX through mode
P7 Figure12 Modified CLK signal from H to L while “Power OFF mode”
P7 Figure12 Modified Trx_wakeup_master to Ttx_wakeup
P9 Fail Safe Mode Modified BUS output explanation of DTC abnormality
P12 Electrical Characteristics Modified explanation of Note2
P12 Figure18 Added arrow of Ttx_1_dom_m
P12 Figure18 Added Note1
P13 Figure19 Delete redundant diode
P13 Figure19 Modified VBAT to VECU
P13 Figure19 Modified explanation of Note2
P15 Operational Notes Modified explanation of 2.Power Supply Lines
P16 Figure21 Modified Figure Number from 20 to 21
Notice-PAA-E Rev.003
© 2015 ROHM Co., Ltd. All rights reserved.
Notice
Precaution on using ROHM Products
1. If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment (Note 1),
aircraft/spacecraft, nuclear power controllers, etc.) and whose malfunction or failure may cause loss of human life,
bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales
representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any
ROHM’s Products for Specific Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅢ
CLASSⅡb
CLASSⅢ
CLASSⅣ
CLASSⅢ
2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3. Our Products are not designed under any special or extraordinary environments or conditions, as exemplified below.
Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the
use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our
Products under any special or extraordinary environments or conditions (as exemplified below), your independent
verification and confirmation of product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4. The Products are not subject to radiation-proof design.
5. Please verify and confirm characteristics of the final or mounted products in using the Products.
6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7. De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in
the range that does not exceed the maximum junction temperature.
8. Confirm that operation temperature is within the specified range described in the product specification.
9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PAA-E Rev.003
© 2015 ROHM Co., Ltd. All rights reserved.
Precautions Regarding Application Examples and External Circuits
1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2. You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1. Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1. All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4. The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
DatasheetDatasheet
Notice – WE Rev.001
© 2015 ROHM Co., Ltd. All rights reserved.
General Precaution
1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.
ROHM shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s
representative.
3. The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or
concerning such information.