PC74HC/HCT 154 MSI} 4-TO-16 LINE DECODER/DEMULTIPLEXER FEATURES TYPICAL 16-line demultiplexing capability SYMBOL PARAMETER CONDITIONS UNIT @ Decodes 4 binary-coded inputs into HC HcT one of 16 mutually exclusive outputs - 2-input enable gate for strobing or PH L/ propagation delay vt ~ jeer 11 13 | ns expansion PLH n En n ce Output capability: standard C| input capacitance 3.5 | 35 | pF loc category: MSI c power dissipation 1 GENERAL DESCRIPTION PD capacitance per package | MWS tand2 | 6 |) 60 | PF The 74HC/HCT154 are high-speed GND = 0 V; Tamb = 25 C; ty = ty = 6 ns Si-gate CMOS devices and are pin compatible with low power Schottky Notes TTL (LSTTL). They are specified in 1. Cpp is used to determine the dynamic power dissipation (Pp in HW): compliance with JEDEC standard no. 7A. = 2 : 2 , The 74HC/HCT154 decoders accept PD = CPD x Vcc x fi + = (CL x VCC" x fo) where: four active HIGH binary address inputs fi = input frequency in MHz CL = output load capacitance in pF and provide 16 mutually exclusive active fo = output frequency in MHz Vcc = supply voltage in V LOW outputs. E (Cy x Vec? x fy) = sum of outputs The 2-input enable gate can be used to 2. For HC the condition is Vj = GND to VCC strobe the decoder to eliminate the normal For HCT the condition is V} = GND to Vcc ~ 1.5 V decoding glitches on the outputs, or it can be used for the expansion of the PACKAGE OUTLINES decoder. 24-ead DIL; plastic (SOT101A). The enable gate has two ANDed inputs 24-lead mini-pack; plastic (SO24; SOT 137A). which must be LOW to enable the outputs. The 154 can be used as a 1-to-16 demultiplexer by using one of the enable PIN DESCRIPTION inputs as the multiplexed data input. P YM When the other enable is LOW, the IN NO, SYMBOL NAME AND FUNCTION addressed output will follow the state of 1,2,3,4,.5,6, the applied data. 7291011 _ _ 13, 14, 15, 16. Yo to Y15 outputs (active LOW) 17 18, 19 Eo, E4 enable inputs (active LOW) 12 GND ground (0 V} 23, 22, 21,20 | Ag to A3 address inputs 24 Vcc positive supply voltage Yofi U [24] Voc px of xy oft - 3 J isw2 BO, ip? El 22] As ~ |.) aps 1, aE _ 23 Ag Yo (~-1 6 AK 6 Ys [4 | [2] a2 , 2 Ra ; 7 Ya [5 | [20] Ag 22 ) Ay iG 7h 8 ; Be = = PS 9 a *E] i, bs mja, | || @ faa sha = = : : Bu pA oo pale wea || vB ser v7 [B] 7] Yis 44 O 16 2 we _ _ 18 o 15 pS al Fs] Yc eae} Po expe] SR mpe] Bs Ye [0] hs] Yi sTaresT 1nd ppv BN EN 5 Pv Y40 [a] [34] Vi 7Z87485.1 7296937 eno [12 13] 44 (a) (b) 7Z874Aa5 Fig. 1 Pin configuration. Fig. 2 Logic symbol. Fig. 3 LEC logic symbol. Seotember 1993 303 Printed From CAPS XPert Version 1.2P This Material Copyrighted By Philips Semiconductors.Jk 74HC/HCT 154 MSI ! rrr rrrr rcrrr rrerr rte = m-|orr crrrr Trrrr rcrrr Crest 9 nn : wo & by 3 2 5 I~} EEE LITLE Crrr rrrr rosie 3 a Tv N -! = - & I> f EDD Ler r @LrrrT GIrT urirl io mm 3 = it Cc - a Im} DGG Grrr wrcrrr LeErsa xrrstTe.t + 2 23 2 I>} ORE GPETrT Lcerxy TEAr rere 8 LL ns oa = oli> | rrr GTrrr rrrmr GTirr rere \~ 5 eo 2 Elm] rec mwrrr rrrr surrt irre i 3 3 ~ of 5 x RE Ea I>} DEG LETTE GETs4 TrIrr rrrl:d * Flo xe - oT jy | EET Grrr GTrsar rTTrT rxr@1=.t ir Ale I w 2 o 2 oe |e >) EEL GETT Tarr rcrrrz xrrrsr! < ie =| Lr ie |e + c 2|_ >) TED GTEELT 4+rErTrT Lrrrm xrrirs| sg lo " Py alse o x 2 N io |= >| CED TLETsa TLITIT LLTLT rLrIge ala & 5 le nN | 3 6 e[ SCD rrr GFErr LTrrr rrrri{s aft 9 lo fo g a a - gle pen - a io >) DCoED LTAarr @LTELeT LTrrrT rrr & > be z jOo_+ o Fa] ous >) ror amrr Errr rrrrz rrxrsz;? lp |e = lo 9 2 q| xxx Jo44 JISG4 TrErr xrree oe ol] oon 4 lots 5 Ct) xxMxxM ast LITT saasnu Tree o| a lp - wizle g z =; @/xKxM YsSrTrD 4s~4rr aswrr syurz) a < o is - @)xxx star surat sarar sar4ur!]s | | - z 8 o tu tw oO = x tu =] fe - Ww} TAT aan s asst ssngn 444. | & 5 g =I z > wr Troe 4soodsn saad songs saws 0 re = Y15 304 September o ) ( Printed From CAPS XPert Version 1.2P This Material Copyrighted By Philips Semiconductors4-to-16 line decoder/demultiplexer 74HC/HCT154 MSI DC CHARACTERISTICS FOR 74HC For the DC characteristics see chapter "HCMOS family characteristics, section Family specifications. Output capability: standard icc category: MSI AC CHARACTERISTICS FOR 74HC GND = 0 V; t, = te = 6 ns; CL = 50 pF Tamb (C) TEST CONDITIONS 74HC SYMBOL | PARAMETER UNIT | Vee WAVEFORMS +25 40to +85 | 40to +125 Vv min.| typ. | max. | min.) max. | min. | max. . 36 | 150 190 225 2.0 tPHL/ | Propagation delay 13 | 30 38 45 [ns | 45 | Fig.6 'PLH An to Yn 10 | 26 33 38 6.0 : 39 | 150 190 225 2.0 teHL/ _| Propagation delay 14 | 30 38 45 [ns | 45 | Fig.7 tPLH En to Yn v1 | 26 33 38 6.0 } 19 | 75 95 110 2.0 TTHL! . output transition time 7 15 19 22 ns 4.5 | Figs6 and 7 tTLH 6 | 13 16 19 6.0 September 1993 305 Printed From CAPS XPert Version 1.2P This Material Copyrighted By Philips Semiconductors.74HC/HCT 154 MSI DC CHARACTERISTICS FOR 74HCT For the DC characteristics see chapter HCMOS family characteristics, section Family specifications. Output capability: standard icc category: MSI Note to HCT types The value of additional quiescent supply current (Alec) for a unit foad of 1 is given in the family specifications. To determine Alcc per input, multiply this value by the unit load coefficient shown in the table below. UNIT LOAD INPUT | COEFFICIENT An 1.0 E, 10 AC CHARACTERISTICS FOR 74HCT GND = OV; t, = ts = 6 ns; C, = 50 pF Tamb (C) TEST CONDITIONS 74HCT SYMBOL | PARAMETER UNIT | Voc | WAVEFORMS +25 40 to +85 | 40to +125 Vv min. | typ. | max. | min.| max. | min. | max. tpHiL/ Propagation delay . LH An to Yn 16 | 35 44 53 {ns | 45 | Fig6 tpHL/ Propagation delay . 'PLH E, to Yn 15 | 32 40 48 ns 4.5 Fig. 7 rH! output transition time 7 15 19 22 ns 45 | Figs Gand7 306 September 1993 Printed From CAPS XPert Version 1.2P This Material Copyrighted By Philips Semiconductors.4-to-16 line decoder/demultiplexer 74HC/HCT 154 MSI AC WAVEFORMS Ap INPUT Yp OUTPUT 7287483 TTHL Fig. 6 Waveforms showing the address input (A,) to output (Y,,) propagation delays and the output transition times. E,, INPUT , OUTPUT 7287482 Fig. 7 Waveforms showing the enable input (Ep) to output (Y,,) propagation delays and the output transition times. Note to AC waveforms (1) HC: Vy = 50%; V; = GND to Vcc. HCT: Vy = 1.3V; Vy =GND to3V. APPLICATION INFORMATION Ag woteeteosees 15 strobe 7222196. Fig. 8 1-of-16 decoder; LOW levei output is selected. <t a data input 7Z22197.1 Fig. 9 1-of-16 demultiplexer; logic jeve! on selected outputs follow the logic level on the data input. Printed From CAPS XPert Version 1.2P This Material Copyrighted By Philips Semiconductors. September 1993 307