Semiconductor Group Jan-15-1998Page 1
HITFETBSP 78
Preliminary data
Smart Lowside Power Switch
Features
• Logic Level Input
• Input Protection (ESD)
• Thermal shutdown with
auto restart
• Overload protection
• Short circuit protection
• Overvoltage protection
• Current limitation
• Analog driving possible
Product Summary
Drain source voltage V40
VDS
On-state resistance RDS(on) 50 mΩ
Nominal load current ID(Nom) 3A
Clamping energy mJEAS 500
Application
• All kinds of resistive, inductive and capacitive loads in switching or linear
applications
• µC compatible power switch for 12 V and 24 V DC applications
• Replaces electromechanical relays and discrete circuits
General Description
N channel vertical power FET in Smart SIPMOS technology. Fully protected by embedded
protection functions.
Pin Symbol Function
1IN Input
2DRAIN Output to the load
3SOURCE Ground
TAB DRAIN Output to the load
Semiconductor Group Jan-15-1998Page 2
Preliminary data BSP 78
Block Diagram
protection
Overvoltage
Drain
IN
ESD
HITFET
Source
Current
Over-
protection
temperature Short circuit
protection
+
limitation
V
bb
Short circuit
protection
LOAD
Overload
protection
M
Unit
Gate-Driving
Semiconductor Group Jan-15-1998Page 3
Preliminary data BSP 78
Maximum Ratings at Tj = 25°C, unless otherwise specified
Parameter Value UnitSymbol V40
VDS
Drain source voltage
Drain source voltage for
short circuit protection
40VDS(SC)
Continuous input voltage VIN -0.2 ... +10
Peak input voltage (IIN ≤ 2 mA) VIN(peak) -0.2 ... VDS
Operating temperature Tj°C
-40 ...+150
Storage temperature Tstg -55 ...+150
Power dissipation, TC = 85 °C Ptot W1.7
Unclamped single pulse inductive energy F) EAS 500 mJ
Electrostatic discharge voltage (Human Body Model)
according to MIL STD 883D, method 3015.7 and
EOS/ESD assn. standard S5.1 - 1993
2000VESD kV
E
DIN humidity category, DIN 40 040
IEC climatic category; DIN IEC 68-1 40/150/56
Thermal resistance K/W
RthJA
junction - ambient:
@ min. footprint
@ 6 cm2 cooling area F)
125
72
junction-soldering point: RthJS 17 K/W
1not tested, specified by design
2Device on 50mm+50mm*1.5mm epoxy PCB FR4 with 6 cm2 (one layer, 70µm thick) copper area for Drain
connection. PCB is vertical without blown air.
Semiconductor Group Jan-15-1998Page 4
Preliminary data BSP 78
Electrical Characteristics
Parameter Symbol UnitValues
at Tj = 25°C, unless otherwise specified min. max.typ.
Characteristics
Drain source clamp voltage
Tj = - 40 ...+ 150, Imess = 10 mA -VDS(AZ) 40 55 V
IDSS - -Off-state drain currentTj = -40 ... +150°C
VIN = 0 V, VDS = 32 V 10 µA
Input treshold voltage
ID = 0.7 mA 1.71.3 V2.2VIN(th)
IIN(on)
On state input current 30 µA10-
RDS(on)
On-state resistance
ID = 3 A, VIN = 5 V, Tj = 25 °C
ID = 3 A, VIN = 5 V, Tj = 150 °C
mΩ
60
120
-
-
45
75
RDS(on)
On-state resistance
ID = 3 A, VIN = 10 V, Tj = 25 °C
ID = 3 A, VIN = 10 V, Tj = 150 °C
50
100
35
65
-
-
ID(Nom)
Nominal load current
VDS = 0.5 V, TS = 85 °C, Tj < 150°C,
VIN = 10 V
- - A3
AID(lim)
Current limit (active if VDS>2.5 V)
VIN = 10 V, VDS = 12 V 16 24 32
Dynamic Characteristics
Turn-on time VIN to 90% ID:
RL = 5 Ω, VIN = 0 to 10 V, Vbb = 12 V ton -60 150 µs
Turn-off time VIN to 10% ID:
RL = 5 Ω, VIN = 10 to 0 V, Vbb = 12 V toff -60 150
Slew rate on 70 to 50% Vbb:
RL = 5 Ω, VIN = 0 to 10 V, Vbb = 12 V -dVDS/dton -0.4 1V/µs
Slew rate off 50 to 70% Vbb:
RL = 5 Ω, VIN = 10 to 0 V, Vbb = 12 V dVDS/dtoff -0.7 1
Semiconductor Group Jan-15-1998Page 5
Preliminary data BSP 78
Electrical Characteristics
Parameter Symbol UnitValues
at Tj = 25°C, unless otherwise specified typ.min. max.
Protection Functions °C150Tjt
Thermal overload trip temperature 165 -
Thermal hysteresis ∆Tjt -10 K-
300Input current protection mode - -IIN(Prot) µA
Unclamped single pulse inductive energy F)
ID = 3 A, Tj = 25 °C, Vbb = 12 V
ID = 3 A, Tj = 150 °C, Vbb = 12 V
EAS
500
300
-
-
-
-
mJ
Inverse Diode
Continuous source drain voltage
VIN = 0 V, -ID = 5*3 A, tP = 300 µs -1.1 -VVSD
1not tested, specified by design
Semiconductor Group Jan-15-1998Page 6
Preliminary data BSP 78
Block diagram
Inductive and overvoltage
output clamp
Terms
Short circuit behaviour
Input circuit (ESD protection)
IN
t
V
t
IIN
t
ID
t
Tj
Thermal hysteresis
Gate Drive
Source/
Ground
Input
Input is not designed for DC
current > 2 mA
Semiconductor Group Jan-15-1998Page 7
Preliminary data BSP 78
Maximum allowable power dissipation
Ptot = f(TC)
-50 -25 0 25 50 75 100 °C 150
TC
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
W
1.7
Ptot
On-state resistance
RON = f(Tj); ID=3A; VIN=10V
-40 -15 10 35 60 85 110 135 °C 185
Tj
0
10
20
30
40
50
60
70
80
90
100
mΩ
120
RDS(on)
typ.
max.
On-state resistance
RON = f(Tj); ID=3A; VIN=5V
-40 -15 10 35 60 85 110 135 °C 185
Tj
0
10
20
30
40
50
60
70
80
90
100
110
120
mΩ
140
RDS(on)
typ.
max.
Typ. input threshold voltage
VIN(th) = f(Tj); ID=-; VDS=12V
-50 -25 0 25 50 75 100 °C 150
Tj
0.0
0.2
0.5
0.8
1.0
1.2
1.5
V
2.0
VIN(th)
Semiconductor Group Jan-15-1998Page 8
Preliminary data BSP 78
Typ. short circuit current
ID(SC) = f(Tj); VDS=12V
Parameter: VIN
-40 -15 10 35 60 85 110 135 °C 185
Tj
0
5
10
15
20
A
30
ID
5V
Vin=10V
Typ. transfer characteristics
ID = f(VIN); VDS=12V; Tj=25°C
012345678V10
VIN
0
5
10
15
20
A
30
ID
Typ. output characteristic
ID = f(VDS); Tj=25°C
Parameter: VIN
0 1 2 3 4 V6
VDS
0
5
10
15
20
25
A
35
ID
Vin=3V
4V
5V
6V
7V
10V
Typ. overload current
ID(lim) = f(t), Vbb=12 V, no heatsink
Parameter: Tjstart
0.0 0.5 1.0 1.5 2.0 s3.0
t
0
5
10
15
20
25
30
A
40
ID(lim)
-40°C
25°C
85°C
150°C
Semiconductor Group Jan-15-1998Page 9
Preliminary data BSP 78
Transient thermal impendance
ZthJC = f(tP)
Parameter: D=tP/T
10 -7 10 -6 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 10 3
s
tP
-3
10
-2
10
-1
10
0
10
1
10
2
10
K/W
ZthJA
0
0.01
0.02
0.05
0.1
0.2
D=0.5
Typ. off-state drain current
IDSS = f(Tj)
-40 -15 10 35 60 85 110 135 °C 185
Tj
0
1
2
3
4
5
6
7
8
µA
10
IDSS
typ.typ.
max.
Semiconductor Group Jan-15-1998Page 10
Preliminary data BSP 78
Package and ordering code
all dimensions in mm
Ordering code: Q67060-S7203-A2
