This is information on a product in full production.
May 2015 DocID027777 Rev 2 1/49
LED6000
3 A, 61 V monolithic current source with dimming capability
Datasheet - production data
Features
Up to 3 A DC output current
4.5 V to 61 V operating input voltage
RDS,ON = 250 m typ.
Adjustable fSW (250 kHz - 1.5 MHz)
Dimming function with dedicated pin
Low IQ shutdown (10 µA typ. from VIN)
Low IQ operating (2.4 mA typ.)
± 3% output current accuracy
Synchronization
Enable with dedicated pin
Adjustable soft-start time
Adjustable current limitation
Low dropout operation (12 µs max.)
VBIAS improves efficiency at light-load
Output voltage sequencing
Auto recovery thermal shutdown
MLCC output capacitor
Applications
HB LED driving applications
Halogen bulb replacement
Description
The LED6000 is a step-down monolithic switching
regulator designed to source up to 3 A DC current
for high power LED driving. The 250 mV typical
RSENSE voltage drop enhances the efficiency.
Digital dimming is implemented by driving the
dedicated DIM pin.
The adjustable current limitation, designed to
select the inductor RMS in accordance with the
nominal output LED current, and the adjustability
of the switching frequency allow the size of the
application to be compact. The embedded
switchover feature on the VBIAS pin maximizes
efficiency. Multiple devices can be synchronized
by sharing the SYNCH pin to prevent beating
noise in low-noise applications, and to reduce the
input current RMS value.
The device is fully protected against overheating,
overcurrent and output short-circuit.
The LED6000 is available in an HTSSOP16
exposed pad package.
Figure 1. Application schematic
HTSSOP16 (RTH = 40 °C)
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Contents LED6000
2/49 DocID027777 Rev 2
Contents
1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2 Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.1 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.3 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.4 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.5 ESD protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.1 Oscillator and synchronization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
4.2 Soft-start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.3 Digital dimming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.4 Error amplifier and light-load management . . . . . . . . . . . . . . . . . . . . . . . 19
4.5 Low VIN operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.6 Overcurrent protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.7 Overtemperature protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5 Application notes - step-down conversion . . . . . . . . . . . . . . . . . . . . . . 24
5.1 Input capacitor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5.2 Output capacitor and inductor selection . . . . . . . . . . . . . . . . . . . . . . . . . . 25
5.3 Compensation strategy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.4 Thermal considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
5.5 Layout considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
5.6 Demonstration board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
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LED6000 Contents
49
6 Application notes - alternative topologies . . . . . . . . . . . . . . . . . . . . . . 35
6.1 Inverting buck-boost . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
6.2 Positive buck-boost . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
6.3 Floating boost . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
6.4 Compensation strategy for alternative topologies . . . . . . . . . . . . . . . . . . 44
7 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
HTSSOP16 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
8 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Block diagram LED6000
4/49 DocID027777 Rev 2
1 Block diagram
Figure 2. Block diagram
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LED6000 Pin settings
49
2 Pin settings
2.1 Pin connection
Figure 3. Pin connection (top view)
Pin settings LED6000
6/49 DocID027777 Rev 2
2.2 Pin description
Table 1. Pin description
No. Pin Description
1 VBIAS
Auxiliary input that can be used to supply a part of the analog circuitry to increase the
efficiency at the light-load. Connect to GND if not used or bypass with a 1 µF ceramic
capacitor if supplied by an auxiliary rail.
2 VIN DC input voltage
3 VIN DC input voltage
4VCC
Filtered DC input voltage to the internal circuitry. Bypass to the signal GND by a 1 µF
ceramic capacitor.
5 EN Active high enable pin. Connect to the VCC pin if not used.
6SS
An internal current generator (5 µA typ.) charges the external capacitor to implement
the soft-start.
7 SYNCH Master / slave synchronization
8COMP
Output of the error amplifier. The designed compensation network is connected at
this pin.
9 FB Inverting input of the error amplifier
10 FSW A pull-down resistor to GND selects the switching frequency.
11 ILIM A pull-down resistor to GND selects the peak current limitation.
12 DIM A PWM signal in this input pin implements the LED PWM current dimming. It's pulled-
down by an internal 2 µA current.
13 LX Switching node
14 LX Switching node
15 BOOT
Connect an external capacitor (100 nF typ.) between BOOT and LX pins. The gate
charge required to drive the internal n-DMOS is recovered by an internal regulator
during the off-time.
16 GND Signal GND
-- E. P. The exposed pad must be connected to the signal GND.
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LED6000 Pin settings
49
2.3 Maximum ratings
2.4 Thermal data
2.5 ESD protection
Table 2. Absolute maximum ratings
Symbol Description Min. Max. Unit
VIN -0.3 61 V
VCC -0.3 61 V
BOOT
VBOOT - GND -0.3 65 V
VBOOT - VLX -0.3 4 V
VBIAS -0.3 VCC V
EN -0.3 VCC V
DIM -0.3 VCC V
LX -0.3 VIN + 0.3 V
SYNCH -0.3 5.5 V
SS -0.3 3.6 V
FSW -0.3 3.6 V
COMP -0.3 3.6 V
ILIM -0.3 3.6 V
FB -0.3 3.6 V
TJOperating temperature range -40 150 °C
TSTG Storage temperature range -65 150 °C
TLEAD Lead temperature (soldering 10 sec.) 260 °C
IHS High-side RMS current 3 A
Table 3. Thermal data
Symbol Parameter Value Unit
RthJA
Thermal resistance junction ambient (device soldered on the
STMicroelectronics® demonstration board) 40 °C/W
Table 4. ESD protection
Symbol Test condition Value Unit
ESD HBM 2 KV
CDM 500 V
Electrical characteristics LED6000
8/49 DocID027777 Rev 2
3 Electrical characteristics
All the population tested at TJ = 25 °C, VIN = VCC = 24 V, VBIAS = GND, VDIM = VEN = 3 V
and RILIM = N. M. unless otherwise specified.
Table 5. Electrical characteristics
Symbol Parameter Test condition Min. Typ. Max. Unit
VIN
Operating input voltage
range
(1) 4.5 61 V
RDSON HS High-side RDSON
ILX = 0.5 A 0.25 0.32
ILX = 0.5 A (1) 0.25 0.42
fSW
Switching frequency
FSW pin floating; 233 250 267 kHz
FSW pin floating (1) 225 250 275 kHz
Selected switching
frequency RFSW = 10 k1350 1500 1650 kHz
IPK
Peak current limit ILIM pin floating; VFB = 0.2 V (2) 3.5 4.1 4.7 A
Selected peak current limit RILIM = 100 k; VFB = 0.2 V (2) 0.68 0.85 1.01 A
ISKIP Pulse skipping peak current
ILIM pin floating (2) 0.40 A
RILIM = 100 k(2) 0.15 A
TONMIN Minimum on-time 120 150 ns
TONMAX Maximum on-time Refer to Section 4: Functional
description for TONMAX details. 12 s
TOFFMIN Minimum off-time (3) 360 ns
VCC / VBIAS
VCCH VCC UVLO rising threshold (1) 3.85 4.10 4.30 V
VCCHYST VCC UVLO hysteresis (1) 160 250 340 mV
SWO
VBIAS threshold
Switch internal supply from VCC to
VBIAS. VBIAS ramping up from 0 V.
(1) 2.82 2.90 2.98 V
Hysteresis (3) 80 mV
VCC -VBIAS threshold
Switch internal supply from VCC to
VBIAS. VIN = VCC = 24 V, VBIAS falling
from 24 V to GND.
(1) 3.35 4.05 4.90 V
Hysteresis (3) 750 mV
Power consumption
ISHTDWN Shutdown current from VIN VEN = GND 10 15 A
IQUIESC
Quiescent current from VIN
and VCC
LX floating, VFB = 1 V,
VBIAS = GND, FSW floating. 2.4 3.4 mA
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LED6000 Electrical characteristics
49
IQOPVIN
Quiescent current from VIN
and VCC LX floating, VFB = 1 V,
VBIAS = 3.3 V, FSW floating
0.9 1.4 mA
IQOPVBIAS
Quiescent current from
VBIAS 1.5 2.4 mA
Enable
VENL Device OFF level 0.06 0.30 V
VENH Device ON level 0.35 0.90 V
Soft-start
TSSSETUP Soft-start setup time Delay from UVLO rising to switching
activity
(3) 640 s
ISSCH CSS charging current VSS = GND 4.3 5.0 5.7 A
Error amplifier
VFB Voltage feedback
0.242 0.250 0.258 V
(1) 0.240 0.250 0.260 V
VCOMPH VFB = GND; VSS = 3.2 V 3.20 3.35 3.50 V
VCOMPL VFB = 3.2 V; VSS = 3.2 V 0.1 V
IFB FB biasing current VFB = 3.6 V 5 50 nA
IOSOURCE
VFB = GND; SS pin floating;
VCOMP = 2 V
(3) 3.1 mA
IOSINK
Output stage sinking
capability
Unity gain buffer configuration (FB
connected to COMP). No load on
COMP pin.
(3) 5mA
AV0 Error amplifier gain (3) 100 dB
GBWP
Unity gain buffer configuration (FB
connected to COMP). No load on
COMP pin.
(3) 23 MHz
Synchronization (fan out: 5 slave devices max.)
fSYN MIN Synchronization frequency Pin FSW floating 280 kHz
VSYNOUT Master output amplitude
ILOAD = 4 mA 2.45
V
ILOAD = 0 A; pin SYNCH floating 3.8
VSYNOW Output pulse width ILOAD = 0 A; pin SYNCH floating 150 215 280 ns
VSYNIH
SYNCH slave high level
input threshold 2.0
V
VSYNIL
SYNCH slave low level
input threshold 1.0
ISYN
Slave SYNCH pull-down
current VSYNCH = 5 V 450 700 950 A
VSYNIW Input pulse width 150 ns
Table 5. Electrical characteristics (continued)
Symbol Parameter Test condition Min. Typ. Max. Unit
Electrical characteristics LED6000
10/49 DocID027777 Rev 2
Dimming
VDIMH DIM rising threshold 1.23 1.7 V
VDIML DIM falling threshold 0.75 1.00 V
VDIMPD DIM pull-down current VDIM = 2 V 0.5 1.5 2.5 A
TDIMTO Dimming timeout (3) 42 ms
Thermal shutdown
TSHDWN
Thermal shutdown
temperature
(3) 170 °C
THYS
Thermal shutdown
hysteresis
(3) 15 °C
1. Specifications referred to TJ from -40 to +125 °C. Specifications in the -40 to +125 °C temperature range are assured by
design, characterization and statistical correlation.
2. Parameter tested in static condition during testing phase. Parameter value may change over dynamic application condition.
3. Not tested in production.
Table 5. Electrical characteristics (continued)
Symbol Parameter Test condition Min. Typ. Max. Unit
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LED6000 Functional description
49
4 Functional description
The LED6000 device is based on a voltage mode, constant frequency control loop. The
LEDs current, monitored through the voltage drop on the external current sensing resistor,
RSNS, is compared to an internal reference (0.25 V) providing an error signal on the COMP
pin. The COMP voltage level is then compared to a fixed frequency sawtooth ramp, which
finally controls the on- and off-time of the power switch.
The main internal blocks are shown in Figure 2: Block diagram on page 4 and can be
summarized as follow.
The fully integrated oscillator that provides the sawtooth ramp to modulate the duty
cycle and the synchronization signal. Its switching frequency can be adjusted by an
external resistor. The input voltage feedforward is implemented.
The soft-start circuitry to limit the inrush current during the startup phase.
The voltage mode error amplifier.
The pulse width modulator and the relative logic circuitry necessary to drive the internal
power switch.
The high-side driver for the embedded N-channel power MOSFET switch and
bootstrap circuitry. A dedicated high resistance low-side MOSFET, for anti-boot
discharge management purposes, is also present.
The peak current limit sensing block, with a programmable threshold, to handle the
overload including a thermal shutdown block, to prevent the thermal runaway.
The bias circuitry, which includes a voltage regulator and an internal reference, to
supply the internal circuitry and provide a fixed internal reference and manages the
current dimming feature. The switchover function from VCC to VBIAS can be
implemented for higher efficiency. This block also implements voltage monitor circuitry
(UVLO) that checks the input and internal voltages.
4.1 Oscillator and synchronization
Figure 4 shows the block diagram of the oscillator circuit. The internal oscillator provides
a constant frequency clock, whose frequency depends on the resistor externally connected
between the FSW pin and ground.
Figure 4. Oscillator and synchronization
Functional description LED6000
12/49 DocID027777 Rev 2
If the FSW pin is left floating, the programmed frequency is 250 kHz (typ.); if the FSW pin is
connected to an external resistor, the programmed switching frequency can be increased up
to 1.5 MHz, as shown in Figure 5. The required RFSW value (expressed in k) is estimated
by Equation 1:
Equation 1
Figure 5. Switching frequency programmability
To improve the line transient performance, keeping the PWM gain constant versus the input
voltage, the input voltage feedforward is implemented by changing the slope of the sawtooth
ramp, according to the input voltage change (Figure 6 a).
The slope of the sawtooth also changes if the oscillator frequency is programmed by the
external resistor. In this way a frequency feedforward is implemented (Figure 6 b) in order to
keep the PWM modulator gain constant versus the switching frequency.
On the SYNCH pin the synchronization signal is generated. This signal has a phase shift of
180° with respect to the clock. This delay is useful when two devices are synchronized
connecting the SYNCH pins together. When SYNCH pins are connected, the device with
a higher oscillator frequency works as a master, so the slave device switches at the
frequency of the master but with a delay of half a period. This helps reducing the RMS
current flowing through the input capacitor. Up to five LED6000s can be connected to the
same SYNCH pin; however, the clock phase shift from master switching frequency to the
slave input clock is 180°.
The LED6000 device can be synchronized to work at a higher frequency, in the range of
250 kHz - 1500 kHz, providing an external clock signal on the SYNCH pin. The
synchronization changes the sawtooth amplitude, also affecting the PWM gain (Figure 6 c).
This change must be taken into account when the loop stability is studied. In order to
FSW
SW R
kHzF 12500
250
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LED6000 Functional description
49
minimize the change of the PWM gain, the free-running frequency should be set (with a
resistor on the FSW pin) only slightly lower than the external clock frequency.
This pre-adjusting of the slave IC switching frequency keeps the truncation of the ramp
sawtooth negligible.
In case two or more (up to five) LED6000 SYNCH pins are tied together, the LED6000 IC
with higher programmed switching frequency is typically the master device; however, the
SYNCH circuit is also able to synchronize with a slightly lower external frequency, so the
frequency pre-adjustment with the same resistor on the FSW pin, as suggested above, is
required for a proper operation.
The SYNCH signal is provided as soon as EN is asserted high; however, if DIM is kept low
for more than TDIMTO timeout, the SYNCH signal is no more available until DIM re-assertion
high.
Functional description LED6000
14/49 DocID027777 Rev 2
Figure 6. Feedforward
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LED6000 Functional description
49
4.2 Soft-start
The soft-start is essential to assure a correct and safe startup of the step-down converter. It
avoids an inrush current surge and makes the output voltage to increase monotonically.
The soft-start is performed as soon as the EN and DIM pin are asserted high; when this
occurs, an external capacitor, connected between the SS pin and ground, is charged by
a constant current (5 µA typ.). The SS voltage is used as reference of the switching
regulator and the output voltage of the converter tracks the ramp of the SS voltage. When
the SS pin voltage reaches the 0.25 V level, the error amplifier switches to the internal
0.25 V reference to regulate the output voltage.
Figure 7. Soft-start
During the soft-start period the current limit is set to the nominal value.
The dVSS/dt slope is programmed in agreement with Equation 2:
Equation 2
Before starting the CSS capacitor charge, the soft-start circuitry turns-on the discharge
switch shown in Figure 7 for TSSDISCH minimum time, in order to completely discharge the
CSS capacitor.
As a consequence, the maximum value for the soft-start capacitor, which assures an almost
complete discharge in case of the EN signal toggle, is provided by:
Equation 3
given TSSDISCH = 530 µs and RSSDISCH = 380 typical values.
The enable feature allows to put the device into the standby mode. With the EN pin lower
than VENL the device is disabled and the power consumption is reduced to 10 A (typ.). If
the EN pin is higher than VENH, the device is enabled. If the EN pin is left floating, an internal
pull-down current ensures that the voltage at the pin reaches the inhibit threshold and the
device is disabled. The pin is also VCC compatible.
V
TA
V
TI
CSS
REF
SSSS
SS 25.0
5
nF
R
T
C
SSDISCH
SSDISCH
MAXSS 270
5
_
Functional description LED6000
16/49 DocID027777 Rev 2
4.3 Digital dimming
The switching activity is inhibited as long as the DIM pin is kept below the VDIML threshold.
When the DIM is asserted low, the HS MOS is turned-off as soon as the minimum on-time is
expired and the COMP pin is parked close to the maximum ramp peak value, in order to
limit the input inrush current when the IC restarts the switching activity. The internal
oscillator and, consequently, the IC quiescent current are reduced only if the DIM is kept low
for more than TDIMTO timeout.
The inductor current dynamic performance, when dimming input goes high, depends on the
designed system response. The best dimming performance is obtained by maximizing the
bandwidth and phase margin, when possible.
As a general rule, the output capacitor minimization improves dimming performance in
terms of the shorter LEDs current rising time and reduced inductor peak current.
An oversized output capacitor value requires an extra current for the fast charge so
generating an inductor current overshoot and oscillations.
Refer also to Section 5.2 on page 25 for output capacitor design hints.
The dimming performance depends on the current pulse shape specification of the final
application.
Figure 8. Dimming operation
The ideal current pulse has rectangular shape; however, in any case it degenerates into
a trapezoid or, at worst, into a triangle, depending on the ratio (tRISE + tFALL)/ TLED.
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LED6000 Functional description
49
Figure 9. Dimming operation (rising edge) - VIN = 44 V, 12 LED
Figure 10. Dimming operation (falling edge) - VIN = 44 V, 12 LED
Functional description LED6000
18/49 DocID027777 Rev 2
In Figure 11 a very short DIM pulse is shown, measured in the standard demonstration
board, VIN = 44 V, 12 LEDs. The programmed LED current, 1 A, is reached at the end of the
DIM pulse (35 µs).
Figure 11. Dimming operation - short DIM pulse
The above consideration is crucial when short DIM pulses are expected in the final
application. Once the external power components and the compensation network are
selected, a direct measurement to determine tRISE and tFALL is necessary to certify the
achieved dimming performance.
When the DIM is forced above the VDIMH threshold after TDIMTO has elapsed, a new soft-
start sequence is performed.
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LED6000 Functional description
49
4.4 Error amplifier and light-load management
The error amplifier (E/A) provides the error signal to be compared with the sawtooth to
perform the pulse width modulation. Its non-inverting input is internally connected to
a 0.25 V voltage reference and its inverting input (FB) and output (COMP) are externally
available for feedback and frequency compensation. In this device the error amplifier is
a voltage mode operational amplifier, therefore, with the high DC gain and low output
impedance.
The uncompensated error amplifier characteristics are summarized inTable 6.
In the continuous conduction working mode (CCM), the transfer function of the power
section has two poles due to the LC filter and one zero due to the ESR of the output
capacitor. Different kinds of compensation networks can be used depending on the ESR
value of the output capacitor.
If the zero introduced by the output capacitor helps to compensate the double pole of the LC
filter, a type II compensation network can be used. Otherwise, a type III compensation
network must be used (see Section 5.3 on page 27 for details on the compensation network
design).
In case of the light-load (i.e.: if the output current is lower than the half of the inductor current
ripple) the LED6000 enters the pulse-skipping working mode. The HS MOS is kept off if the
COMP level is below 200 mV (typ.); when this bottom level is reached the integrated switch
is turned on until the inductor current reaches ISKIP value. So, in the discontinuous
conduction working mode (DCM), the HS MOS on-time is only related to the time necessary
to charge the inductor up to the ISKIP level.
The ISKIP threshold is reduced with increasing the RILIM resistor value, as shown also in
Table 5 on page 8 and plotted in Figure 12, so allowing the LED6000 device work in the
continuous conduction mode also in case lower current LEDs are selected.
Table 6. Error amplifier characteristics
Parameters Value
Low frequency gain (A0)100 dB
GBWP 23 MHz
Output voltage swing 0 to 3.5 V
Source/sink current capability 3.1 mA / 5 mA
Functional description LED6000
20/49 DocID027777 Rev 2
Figure 12. ISKIP typical current and RILIM value
However, due to the current sensing comparator delay, the actual inductor charge current is
slightly impacted by the VIN and selected inductor value.
In order to let the bootstrap capacitor recharge, in case of an extremely light-load the
LED6000 is able to pull-down the LX net through an integrated small LS MOS. In this way
the bootstrap recharge current can flow from the VIN through the CBOOT
, LX and LS MOS.
This mechanism is activated if the HS MOS has been kept turned-off for more than 3 ms
(typ.).
4.5 Low VIN operation
In normal operation (i.e.: VOUT programmed lower than input voltage) when the HS MOS is
turned off, a minimum off time (TOFFMIN) interval is performed.
In case the input voltage falls close or below the programmed output voltage (low dropout,
LDO) the LED6000 control loop is able to increase the duty cycle up to 100%. However, in
order to keep the boot capacitor properly recharged, a maximum HS MOS on-time is limited
(TONMAX). When this limit is reached the HS MOS is turned-off and an integrated switch
working as a pull-down resistor between the LX and GND is turned on, until one of the
following conditions is met:
A negative current limit (300 mA typ.) is reached
A timeout (1 µs typ.) is reached.
So doing the LED6000 device is able to work in the low dropout operation, due to the
advanced boot capacitor management, and the effective maximum duty cycle is about
12 s / 13 s = 92%.
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LED6000 Functional description
49
4.6 Overcurrent protection
The LED6000 implements overcurrent protection by sensing the current flowing through the
power MOSFET. Due to the noise created by the switching activity of the power MOSFET,
the current sensing circuitry is disabled during the initial phase of the conduction time. This
avoids erroneous detection of fault condition. This interval is generally known as “masking
time” or “blanking time”. The masking time is about 120 ns.
If the overcurrent limit is reached, the power MOSFET is turned off implementing pulse by
pulse overcurrent protection. In the overcurrent condition, the device can skip turn-on pulses
in order to keep the output current constant and equal to the current limit. If, at the end of the
“masking time”, the current is higher than the overcurrent threshold, the power MOSFET is
turned off and one pulse is skipped. If, at the following switching on, when the “masking
time” ends, the current is still higher than the overcurrent threshold, the device skips two
pulses. This mechanism is repeated and the device can skip up to seven pulses (refer to
Figure 13).
If at the end of the “masking time” the current is lower than the overcurrent threshold, the
number of skipped cycles is decreased by one unit.
As a consequence, the overcurrent protection acts by turning off the power MOSFET and
reducing the switching frequency down to one eighth of the default switching frequency, in
order to keep constant the output current close to the current limit.
Figure 13. OCP and frequency scaling
This kind of overcurrent protection is effective if the inductor can be completely discharged
during HS MOS turn-off time, in order to avoid the inductor current to run away. In case of
the output short-circuit the maximum switching frequency can be computed by the following
equation:
Equation 4
MINONLIMDCRONIN
LIMDCRF
MAXSW TIRRV
IRV
F
,
,
1
8
Functional description LED6000
22/49 DocID027777 Rev 2
Assuming VF = 0.6 V the free-wheeling diode direct voltage, RDCR = 30 m inductor
parasitic resistance, ILIM = IPK = 4 A the peak current limit, RON = 0.25 HS MOS
resistance and TON,MIN = 120 ns minimum HS MOS on duration, the maximum FSW
frequency which avoids the inductor current runaway in case of the output short-circuit and
VIN = 61 V is 801 kHz.
If the programmed switching frequency is higher than the above computed limit, an
estimation of the inductor current in case of the output short-circuit fault is provided by
Equation 5:
Equation 5
The peak current limit threshold (ILIM) can be programmed in the range 0.85 A - 4.0 A by
selecting the proper RILIM resistor, as suggested in Equation 6.
Equation 6
IPK is the default LED6000 current limit in case of RILIM not mounted, as shown in Table 5 on
page 8.
Figure 14. Current limit and programming resistor
DCRONMINONSWDCR
FINONSW
LIM RRTFR
VVTF
I
,
8
8
LIM
PK
ILIM I
I
kR 20
DocID027777 Rev 2 23/49
LED6000 Functional description
49
4.7 Overtemperature protection
It is recommended that the device never exceeds the maximum allowable junction
temperature. This temperature increase is mainly caused by the total power dissipated by
the integrated power MOSFET.
To avoid any damage to the device when reaching high temperature, the LED6000
implements a thermal shutdown feature: when the junction temperature reaches 170 °C
(typ.) the device turns off the power MOSFET and shuts-down.
When the junction temperature drops to 155 °C (typ.), the device restarts with a new soft-
start sequence.
Application notes - step-down conversion LED6000
24/49 DocID027777 Rev 2
5 Application notes - step-down conversion
5.1 Input capacitor selection
The input capacitor must be rated for the maximum input operating voltage and the
maximum RMS input current.
Since the step-down converters input current is a sequence of pulses from 0A to IOUT
, the
input capacitor must absorb the equivalent RMS current which can be up to the load current
divided by two (worst case, with duty cycle of 50%). For this reason, the quality of these
capacitors must be very high to minimize the power dissipation generated by the internal
ESR, thereby improving system reliability and efficiency.
The RMS input current (flowing through the input capacitor) in step-down conversion is
roughly estimated by:
Equation 7
The actual DC/DC conversion duty cycle, D = VOUT/VIN, is influenced by a few parameters:
Equation 8
where VF is the freewheeling diode forward voltage and VSW the voltage drop across the
internal high-side MOSFET. Considering the range DMIN to DMAX it is possible to determine
the maximum ICIN,RMS flowing through the input capacitor.
The input capacitor value must be dimensioned to safely handle the input RMS current and
to limit the VIN and VCC ramp-up slew rate to 0.5 V/µs maximum, in order to avoid the
device active ESD protections turn-on.
DDII OUTRMSCIN 1
,
MINSWMAXIN
FOUT
MIN
MAXSWMININ
FOUT
MAX
VV
VV
D
VV
VV
D
,,
,,
DocID027777 Rev 2 25/49
LED6000 Application notes - step-down conversion
49
Different capacitors can be considered:
Electrolytic capacitors
These are the most commonly used due to their low cost and wide range of operative
voltage. The only drawback is that, considering ripple current rating requirements, they are
physically larger than other capacitors.
Ceramic capacitors
If available for the required value and voltage rating, these capacitors usually have a higher
RMS current rating for a given physical dimension (due to the very low ESR). The drawback
is their high cost.
Tantalum capacitor
Small, good quality tantalum capacitors with very low ESR are becoming more available.
However, they can occasionally burn if subjected to a very high current, for example when
they are connected to the power supply.
The amount of the input voltage ripple can be roughly overestimated by Equation 9.
Equation 9
In case of MLCC ceramic input capacitors, the equivalent series resistance (RES,IN) is
negligible.
In addition to the above considerations, a ceramic capacitor with an appropriate voltage
rating and with a value 1 µF or higher should always be placed across VIN and power
ground and across VCC and the IC GND pins, as close as possible to the LED6000 device.
This solution is necessary for spike filtering purposes.
5.2 Output capacitor and inductor selection
The output capacitor is very important in order to satisfy the output voltage ripple
requirement. Using a small inductor value is useful to reduce the size of the choke but
increases the current ripple. So, to reduce the output voltage ripple, a low ESR capacitor is
required.
The current in the output capacitor has a triangular waveform which generates a voltage
ripple across it. This ripple is due to the capacitive component (charge and discharge of the
output capacitor) and the resistive component (due to the voltage drop across its ESR). So
the output capacitor must be selected in order to have a voltage ripple compliant with the
application requirements.
The allowed LED current ripple (ILED,PP) is typically from 2% to 5% of the LED DC current.
OUTINES
SWIN
OUT
PPIN IR
FC
IDD
V
,,
1
Application notes - step-down conversion LED6000
26/49 DocID027777 Rev 2
Figure 15. LEDs small signal model
Based on the small signal model typically adopted for LEDs (as shown in Figure 15), the
amount of the inductor current ripple which flows through the LEDs can be estimated by the
following equation:
Equation 10
The typical LED dynamic resistance, for high current LEDs, is about 0.9 to 1 .
The output capacitor, CO, is typically an MLCC ceramic capacitor in the range of 1 µF and
with equivalent series resistance lower than 10 m, as a consequence the zero due to the
time constant CO * RES is in the range of 10 MHz or above.
Starting from Equation 10 it's possible to roughly estimate the required CO value:
Equation 11
In the above equation it has been assumed that the total inductor current ripple is well
approximated by the first Fourier harmonic, 8/2 * IL,PP
, due to the inductor current
triangular shape.
The inductance value fixes the current ripple flowing through the output capacitor and LEDs.
So the minimum inductance value, in order to have the expected current ripple, must be
selected.
The rule to fix the current ripple value is to have a ripple at 30% - 60% of the programmed
LEDs current.
In the continuous conduction mode (CCM), the required inductance value can be calculated
by Equation 12.
dSNSESO
ESO
LLED RNRRsC
RsC
sIsI
1
1
PPLEDdSNSSW
PPLO IRNRf
IC
,
,
22
18
DocID027777 Rev 2 27/49
LED6000 Application notes - step-down conversion
49
Equation 12
In order to guarantee a maximum current ripple in every condition, Equation 12 must be
evaluated in case of maximum input voltage, assuming VOUT fixed.
Increasing the value of the inductance helps to reduce the current ripple but, at the same
time, strongly impacts the converter response time in case of high frequency dimming
requirements. On the other hand, with a lower inductance value the regulator response time
is improved but the power conversion efficiency is impacted and the output capacitor must
be increased to limit the current ripple flowing through the LEDs.
As usually, the L-CO choice is a trade-off among multiple design parameters.
5.3 Compensation strategy
The compensation network must assure stability and good dynamic performance. The loop
of the LED6000 is based on the voltage mode control. The error amplifier is an operational
amplifier with high bandwidth. So, by selecting the compensation network the E/A is
considered as ideal, that is, its bandwidth is much larger than the system one.
Figure 16. Switching regulator control loop simplified model
SWL
IN
OUT
OUT
FI
V
V
V
L
1
Application notes - step-down conversion LED6000
28/49 DocID027777 Rev 2
The transfer function of the PWM modulator, from the error amplifier output (COMP pin) to
the LX pin results in an almost constant gain, due to the voltage feedforward which
generates a sawtooth with amplitude VS directly proportional to the input voltage:
Equation 13
For the LED6000 the feedforward gain is KFF = 1/30.
The synchronization of the device with an external clock provided through the SYNCH pin
can modify the PWM modulator gain (see Section 4.1 on page 11 to understand how this
gain changes and how to keep it constant in spite of the external synchronization).
The transfer function of the power section (i.e.: the voltage across RSNS resulting as
a variation of the duty cycle) is:
Equation 14
given L, RDC, CO, RES, RSNS and Rd the parameters shown in Figure 16.
The power section transfer function can be rewritten as follows:
Equation 15
Equation 16
Equation 17
with the assumption that the inductor parasitic resistance, RDC, and the output capacitor
parasitic resistance, RES, are negligible compared to LED dynamic resistance, Rd.
The closed loop gain is then given by:
Equation 18
INFFS
PW VkV
G
11
0
O
ESO
dDCSNS
INSNSSNS
LC
Cs
RCs
RNRLsR
VR
sd
sV
sG
1
//
)(
)(
)(
dSNS
INSNS
LC
LCLC
z
LCLC RNR
VR
G
f
s
fQ
s
f
s
GsG
0
2
0;
22
1
2
1
)(
SNSd
d
O
LC
dESO
z
RRN
RN
LC
f
RNRC
f
2
1
;
2
1
dSNSO
ddSNSO
RNRCL
RNRNRLC
Q
)()()()( 0sGsGsGsG COMPPWLCLOOP
DocID027777 Rev 2 29/49
LED6000 Application notes - step-down conversion
49
As shown in Equation 16, fz depends on the output capacitor parasitic resistance and on the
LEDs dynamic resistance. Following the considerations summarized in Section 5.2 on
page 25, in the typical application the programmed control loop bandwidth (BW) might be
higher than fz, so this zero helps stabilize the loop. If this assumption is verified, a type II
compensation network is required for loop stabilization.
In Figure 17 the type II compensation network is shown.
Figure 17. Type II compensation network
The type II compensation network transfer function, from VSNS to COMP, is computed in
Equation 19.
Equation 19
Equation 20
The following suggestions can be followed for a quite common compensation strategy,
assuming that CP << CF
.
Starting from Equation 18, the control loop gain module at s = 2* FBW allows to fix the
RF/RU ratio:
Equation 21
After choosing the regulator bandwidth (typically FBW < 0.2 * FSW) and a value for RU,
usually between 1 k and 50 k, in order to achieve CF and CP not comparable with
FPF
P
UPF
P
FF
ZRCC
f
RCC
f
RC
f//2
1
;
2
1
;
2
1
101
Application notes - step-down conversion LED6000
30/49 DocID027777 Rev 2
parasitic capacitance of the board, the RF required value is computed by Equation 21.
Select CF in order to place FZ1 below FLC (typically 0.1 * FLC)
Select CP in order to place FP1 at 0.5 * FSW
Equation 22
The resultant control loop and other transfer functions gain are shown in Figure 18.
Figure 18. Type II compensation - Bode plot
5.4 Thermal considerations
The thermal design is important to prevent the thermal shutdown of the device if junction
temperature goes above 170 °C (typ.). The three different sources of losses within the
device are:
Conduction losses due to the non-negligible RDSON of the power switch; these are
equal to:
Equation 23
where D is the duty cycle of the application and the maximum RDSON, over the temperature,
is 420 m. Note that the duty cycle is theoretically given by the ratio between VOUT and
VIN, but actually it is slightly higher in order to compensate the losses of the regulator. So
the conduction losses increase compared with the ideal case.
Switching losses due to power MOSFET turn ON and OFF; these can be calculated as:
SWF
P
LCF
FfR
C
fR
C
5.02
1
;
1.02
1
2
,, OUTONHSONHS IDRP
DocID027777 Rev 2 31/49
LED6000 Application notes - step-down conversion
49
Equation 24
where TRISE and TFALL are the overlap times of the voltage across the power switch (VDS)
and the current flowing into it during turn ON and turn OFF phases. TTR is the equivalent
switching time. For this device the typical value for the equivalent switching time is 40 ns.
Quiescent current losses, calculated as:
Equation 25
where IQOPVIN and IQOPVBIAS are the LED6000 quiescent current in case of the separate
bias supply. If the switchover feature is not used, the IC quiescent current is the only one
from VIN, IQUIESC, as summarized inTable 5 on page 8.
The junction temperature TJ can be calculated as:
Equation 26
where TA is the ambient temperature and PTOT is the sum of the power losses just seen.
RthJA is the equivalent thermal resistance junction to ambient of the device; it can be
calculated as the parallel of many paths of heat conduction from the junction to the ambient.
For this device the path through the exposed pad is the one conducting the largest amount
of heat. The RthJA, measured on the demonstration board described in the following
paragraph, is about 40 °C/W for the HTSSOP16 package.
5.5 Layout considerations
The PCB layout of the switching DC/DC regulators is very important to minimize the noise
injected in high impedance nodes and interference generated by the high switching current
loops. Two separated ground areas must be considered: the signal ground and the power
ground.
In a step-down converter the input loop (including the input capacitor, the power MOSFET
and the freewheeling diode) is the most critical one. This is due to the fact that high value
pulsed currents are flowing through it. In order to minimize the EMI, this loop must be as
short as possible. The input loop, including also the output capacitor, must be referred to the
power ground. All the other components are referred to the signal ground.
The feedback pin (FB) connection to the external current sensing resistor is a high
impedance node, so the interference can be minimized by placing the routing of the
feedback node as far as possible from the high current paths. To reduce the pick-up noise,
the compensation network involving FB and COMP pins should be placed very close to the
device.
To filter the high frequency noise, a small bypass capacitor (1 F or higher) must be added
as close as possible to the input voltage pin of the device, for both VIN and VCC pins.
Thanks to the exposed pad of the device, the ground plane helps to reduce the junction to
ambient thermal resistance; so a wide ground plane enhances the thermal performance of
the converter, allowing high power conversion.
SWTROUTINSW
FALLRISE
OUTINSWHS fTIVf
TT
IVP
2
,
QOPVBIASBIASQOPVININQ IVIVP
TOTJAthAJ PRTT ,
Application notes - step-down conversion LED6000
32/49 DocID027777 Rev 2
The exposed pad must be connected to the signal GND pin. The connection to the ground
plane must be achieved by taking care of the above mentioned input loop, in order to avoid
a high current flowing through the signal GND.
Refer to Section 5.6 for the LED6000 layout example.
5.6 Demonstration board
In this section the LED6000 step-down demonstration board is described.
The default settings are:
Input voltage up to 60 V
Programmed LED current 1 A (HB LEDs)
FSW = 500 kHz
VBIAS = GND
Figure 19. LED6000 demonstration board schematic (step-down)
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Table 7. LED6000 demonstration board component list
Reference Part Package Note Manufacturer P/N
C1, C2 4.7 F 1210 X7S/100 V/10% TDK C3225X7S2A475K
C3, C4 1 F 0805 X7S/100 V/10% TDK C2012X7S2A105K
C5 470 nF 1206 X7R/100 V/10% TDK C3225X7R2A474M
C6, C8 N. M.
C7 100 nF 0603 X7R/16 V/10%
C9 2.2 nF 0603 X7R/25 V/10%
C10 1 nF 0603 X7R/16 V/10%
C11 220 pF 0603 NP0/50 V/5%
C12 100 pF 0603 100 V
C13 1 F 0805 X5R/16 V/20%
R1, R5 N. M.
R4 0 0603
DocID027777 Rev 2 33/49
LED6000 Application notes - step-down conversion
49
R6 4.7 k0603 1% tolerance
R7 1.5 k0603 1% tolerance
R8 47 k0603 1% tolerance
R9 33 k0603 1% tolerance
R12 100 k0603 1% tolerance
R13 0.24 1210 1%, 0.5 W PANASONIC ERJ14BQFR24U
L1 47 H 10 x 10 2.2 A sat. / 128 mCOILCRAFT MSS1038-473
D1 STPS2L60 SMBflat 60 V - 2 A Schottky rectifier STM STPS2L60UF
D2 N. M.
U1 LED6000 HTSSOP16 STM LED6000
Table 7. LED6000 demonstration board component list (continued)
Reference Part Package Note Manufacturer P/N
Application notes - step-down conversion LED6000
34/49 DocID027777 Rev 2
Figure 20. LED6000 demonstration board layout (component side)
Figure 21. LED6000 demonstration board layout (bottom side)
DocID027777 Rev 2 35/49
LED6000 Application notes - alternative topologies
49
6 Application notes - alternative topologies
Thanks to the wide input voltage range and the adjustable compensation network, the
LED6000 device is suitable to implement boost and buck-boost topologies.
6.1 Inverting buck-boost
The buck-boost topology fits the application with an input voltage range that overlaps the
output voltage, VOUT
, which is the voltage drop across the LEDs and the sensing resistor.
The inverting buck-boost (see Figure 22) requires the same components count as the buck
conversion and it is more efficient than the positive buck-boost, since no additional power
MOSFET is required.
Figure 22. Inverting buck-boost topology
A current generator based on this topology implies two main application constraints:
The output voltage is negative so the LEDs must be reversed
The device GND floats with the negative output voltage. The device is supplied
between VIN and VOUT (< 0). As a consequence:
Equation 27
VIN,MAX = 61 V is the maximum operating input voltage for the LED6000, as shown in
Table 5 on page 8.
In buck-boost topology working in the continuous conduction mode (CCM), the HS MOS
on-time interval, D, is given by:
Equation 28
However, due to power losses (mainly switching and conduction losses), the real duty cycle
is always higher than this. The real value (which can be measured in the application) should
be used in the following formulas.
MAXINOUTIN VVV ,
OUTIN
OUT
VV
V
D
Application notes - alternative topologies LED6000
36/49 DocID027777 Rev 2
The peak current flowing in the embedded switch is:
Equation 29
While its average current level is equal to:
Equation 30
This is due to the fact that the current flowing through the internal power switch is delivered
to the output only during the OFF phase.
The switch peak current must be lower than the minimum current limit of the overcurrent
protection and the average current must be lower than the rated DC current of the device.
In addition to these constraints, the thermal considerations summarized in Section 5.4 on
page 30 must also be evaluated.
Figure 23. Inverting buck-boost schematic
Figure 23 shows the schematic circuit for an LED current source based on inverting buck-
boost topology. The input voltage ranges from 15 to 30 V and it can drive a string composed
of 8 LEDs with 0.5 A DC.
SW
INOUT
RIPPLE
OUT
SW fL
DV
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I
IOUT
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DocID027777 Rev 2 37/49
LED6000 Application notes - alternative topologies
49
This schematic also includes additional circuitry:
A level shifter network for the proper dimming operation, since the LED6000 local
ground (ICGND) is referred to the negative output voltage given by the voltage drop
across the LEDs and the sensing resistor. This function is implemented by Q1, R15,
R16 and R17. However, due to limited control loop bandwidth, the dimming operation in
buck-boost topology is quite limited in terms of the minimum achievable DIM pulse.
An external overvoltage protection which avoids the IC damage in case of the LED
open row fault. This function is implemented by a Zener diode, D2, R7 and the sensing
resistor, RSNS = R13.
In case the LED string is disconnected the maximum output voltage is given by:
Equation 31
Equation 31, in addition to Equation 27, must be verified in order avoid the LED6000 to be
exposed to electrical stress outside the allowed range (seeTable 2 on page 7 for details).
The series resistor, R7, must be selected in order to limit the maximum current flowing
through the D2, as shown in Equation 32.
Equation 32
The compensation network design strategy for buck-boost topology is described in
Section 6.4 on page 44.
Figure 24. Inverting buck-boost PCB layout (component side)
2, DFBMAXOUT VVV
7
2RR
V
I
SNS
FB
D
Application notes - alternative topologies LED6000
38/49 DocID027777 Rev 2
Figure 25. Inverting buck-boost PCB layout (bottom side)
6.2 Positive buck-boost
The buck-boost topology fits the application with an input voltage range that overlaps the
output voltage, VOUT
, which is the voltage drop across the LEDs and the sensing resistor.
The positive buck-boost (see Figure 26) can provide a positive output voltage, referred to
ground, but it requires two additional power components, a MOSFET and a Schottky diode.
Figure 26. Positive buck-boost topology
DocID027777 Rev 2 39/49
LED6000 Application notes - alternative topologies
49
The main drawback of this topology, compared to inverting buck-boost, is the slightly lower
efficiency. In the positive buck-boost Equation 27 on page 35 is not applied, so the
maximum input voltage is the maximum operating input voltage for the LED6000, as shown
in Table 5 on page 8. In addition, the maximum output voltage can be higher than 61 V,
assuming that the external MOS FET and Schottky diode are properly rated.
The other considerations summarized in Section 6.1 on page 35 are also applied to this
topology.
Figure 27 shows the schematic circuit for an LED current source based on positive buck-
boost topology. The input voltage ranges from 24 to 54 V and it can drive a string composed
of 14 LEDs with 0.55 A DC.
Figure 27. Positive buck-boost schematic
This schematic also includes two additional circuitry:
A level shifter / clamping network for safe MOS driving and protection;
An external overvoltage protection which avoids the IC damage in case of the LED
open row fault. This function is implemented by a Zener diode, D3, R7 and the sensing
resistor, RSNS = R13.
In case the LED string is disconnected the maximum output voltage is given by:
Equation 33
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Application notes - alternative topologies LED6000
40/49 DocID027777 Rev 2
The series resistor, R7, must be selected in order to limit the maximum current flowing
through the D3, as shown in Equation 34.
Equation 34
The compensation network design strategy for buck-boost topology is described in
Section 6.4 on page 44.
Figure 28. Positive buck-boost PCB layout (component side)
Figure 29. Positive buck-boost PCB layout (bottom side)
7
3RR
V
I
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FB
D
DocID027777 Rev 2 41/49
LED6000 Application notes - alternative topologies
49
6.3 Floating boost
The floating-boost topology fits the application with an input voltage range always lower than
the output voltage, VOUT
, which is the voltage drop across the LEDs and the sensing
resistor. The floating boost (see Figure 30) requires the same components count as the
buck conversion.
Figure 30. Floating-boost topology
In this topology the output voltage is referred to VIN and not to GND. The device is supplied
by VOUT as a consequence the maximum voltage drop across the LEDs string is 61 V.
In floating-boost topology working in the continuous conduction mode (CCM), the HS MOS
on-time interval, D, is given by:
Equation 35
However, due conduction losses, the real duty cycle is always higher than the ideal one.
The real value should be used in the following formulas.
The peak current flowing in the embedded switch is:
Equation 36
While its average current level is equal to:
Equation 37
This is due to the fact that the current flowing through the internal power switch is delivered
to the output only during the OFF phase.
OUT
INOUT
V
VV
D
SW
INOUT
RIPPLE
OUT
SW fL
DV
D
I
I
D
I
I
2121
D
I
IOUT
SW
1
Application notes - alternative topologies LED6000
42/49 DocID027777 Rev 2
The switch peak current must be lower than the minimum current limit of the overcurrent
protection and the average current must be lower than the rated DC current of the device.
In addition to these constraints, the thermal considerations summarized in Section 5.4 on
page 30 must also be evaluated.
Figure 31. Floating-boost reference schematic
Figure 31 shows the schematic circuit for an LED current source based on floating-boost
topology. The expected input voltage range is from 18 V to 36 V and it can drive a string
composed of 15 LEDs with 0.5 A DC.
This schematic also includes two additional circuitry:
A level shifter network for the proper dimming operation, since the LED6000 local
ground is different from the board GND. This function is implemented by Q1, R15, R16
and R17. However, due to limited control loop bandwidth, the dimming operation in
floating-boost topology is quite limited in terms of the minimum achievable DIM pulse.
An external overvoltage protection which avoids the IC damage in case of the LED
open row fault. This function is implemented by a Zener diode, D2, R7 and the sensing
resistor, RSNS = R13.
In case the LED string is disconnected the maximum output voltage is given by:
Equation 38
Equation 38 must be verified in order avoid the LED6000 to be exposed to electrical stress
outside the allowed range (see Table 2 on page 7 for details).
The series resistor, R7, must be selected in order to limit the maximum current flowing
through the D2, as shown in Equation 32 on page 37.
The compensation network design strategy for floating-boost topology is described in
Section 6.4.
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DocID027777 Rev 2 43/49
LED6000 Application notes - alternative topologies
49
Figure 32. Floating-boost PCB layout (component side)
Figure 33. Floating-boost PCB layout (bottom side)
Application notes - alternative topologies LED6000
44/49 DocID027777 Rev 2
6.4 Compensation strategy for alternative topologies
The transfer function of the power section for buck-boost and floating-boost topology, driving
N power LEDs with estimated Rd dynamic resistance, can be summarized by Equation 39:
Equation 39
This simplified model is based on the assumption that the output capacitor ESR is negligible
compared to LED dynamic resistance, Rd, and the LED current sensing resistor, RSNS.
Further, the RSNS is assumed negligible compared to the total LED dynamic resistance,
N * Rd.
The closed loop transfer function is still given by Equation 18 on page 28, assuming for the
power section the model summarized in Equation 39.
The singularity RHPZ, computed at the maximum load and minimum input voltage, is the
limitation in the loop bandwidth design (fBW). Typically the maximum bandwidth is designed
to be lower than:
Equation 40
Table 8. Transfer function singularities
ZRHPZ LC
Buck boost
Floating boost
Table 9. Transfer function parameters
QG
0D
Buck boost
Floating boost
2
2
0
1
11
)(
)(
)(
LC
LC
RHPZZ
SNS
LC s
Q
s
ss
G
sd
sV
sG
dO RNC
1
LED
O
IDL
VD
2
1
O
CL
D
1
dO RNC
1
LED
O
IL
VD
2
1
O
CL
D
1
d
ORND
L
C 1
dSNS
SNSO
RNR
R
DD
V
1
INO
O
VV
V
d
ORND
L
C 1
dSNS
SNSO
RNR
R
D
V
1
O
IN
V
V
1
24
1RHPZ
BW
f
DocID027777 Rev 2 45/49
LED6000 Application notes - alternative topologies
49
In case Z and LC are lower than the target bandwidth, a type II compensation network is
necessary for loop stabilization, following the compensation strategy described in
Section 5.3 on page 27.
Otherwise, in case a very low bandwidth design is suitable, a simple type I compensation
network is required. This approach is feasible if the target bandwidth is ¼ of fLC or lower.
Figure 34. Type I compensation network
This kind of compensation network just provides one single low frequency pole, given by:
Equation 41
Starting from Equation 18 on page 28, the control loop gain module at s = 2* FBW allows
to set fPLF necessary value:
Equation 42
A typical choice for RU usually falls in the range from 1 k to 50 k, in order to provide for
CF a reasonable value (in the range from 1 nF to 100 nF) and to proper bias the overvoltage
protection Zener diode.
UF
PLF RC
f
2
1
1)2( 0
,
BW
PLF
INFF
BWILOOP f
f
Vk
G
fsG
Package information LED6000
46/49 DocID027777 Rev 2
7 Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
HTSSOP16 package information
Figure 35. HTSSOP16 package outline
DocID027777 Rev 2 47/49
LED6000 Package information
49
Table 10. HTSSOP16 package mechanical data
Symbol
Dimensions (mm)
Min. Typ. Max.
A1.20
A1 0.15
A2 0.80 1.00 1.05
b 0.19 0.30
c 0.09 0.20
D 4.90 5.00 5.10
D1 2.80 3.00 3.20
E 6.20 6.40 6.60
E1 4.30 4.40 4.50
E2 2.80 3.00 3.20
e0.65
L 0.45 0.60 0.75
L1 1.00
k 0.00 8.00
aaa 0.10
Ordering information LED6000
48/49 DocID027777 Rev 2
8 Ordering information
9 Revision history
Table 11. Order codes
Order code Package Packaging
LED6000PHR HTSSOP16 Tube
LED6000PHTR HTSSOP16 Tape and reel
Table 12. Document revision history
Date Revision Changes
21-Apr-2015 1 Initial release.
15-May-2015 2 Updated document status to “production data” on page 1.
Minor modifications throughout document.
DocID027777 Rev 2 49/49
LED6000
49
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