DPAD/SSTDPAD Series Vishay Siliconix Dual Low-Leakage Pico-Amp Diodes DPAD1 SSTDPAD5 DPAD5 SSTDPAD100 DPAD50 PRODUCT SUMMARY Part Number IR Max (pA) DPAD1 -1 DPAD5/SSTDPAD5 -5 DPAD50 -50 SSTDPAD100 -100 FEATURES BENEFITS APPLICATIONS D Ultralow Leakage: DPAD1 <1 pA D Ultralow Capacitance: DPAD1 <0.8 pF D Negligible Circuit Leakage Contribution D Circuit "Transparent" Except to Shunt High-Frequency Spikes D Op Amp Input Protection D Multiplexer Overvoltage Protection DESCRIPTION The DPAD/SSTDPAD series of extremely low-leakage diodes provides a superior alternative to conventional diode technology when reverse current (leakage) must be minimized. These devices feature leakage currents ranging from -1 pA (DPAD1) to -100 pA (SSTDPAD100) to support a wide range of applications. The low-cost, compact, narrow-body SO-8 (SSTDPAD) package allows maximum circuit performance. Tape- and-reel options are avaliable for automated assembly (see Packaging Information). The TO-78 and TO-71 (DPAD) hermetically sealed metal cans are available with full military processing per MIL-S-19500 (see Military Information). TO-78 C1 Narrow Body SOIC 1 C1 1 8 NC C1 2 7 A2 A1 3 6 C2 NC 4 5 C2 Top View SSTDPAD5 SSTDPAD100 5 C1 2 A1 A2 1 4 2 3 4 3 C2 A1 Case* Substrate Top View DPAD1 Document Number: 70340 S-04029--Rev. C, 04-Jun-01 TO-71 Modified A2 *Case and Pin 3 must be floating C2 Top View DPAD5 DPAD50 www.vishay.com 5-1 DPAD/SSTDPAD Series Vishay Siliconix ABSOLUTE MAXIMUM RATINGSa Notes: a. TA = 25_C unless otherwise noted. b. Derate 4 mW/_C at 25_C. Forward Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55 to 150_C Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . -55 to 150_C Lead Temperature (1/16" from case for 10 sec.) . . . . . . . . . . . . . . . . . . . 300_C Total Device Dissipationb . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500 mW SPECIFICATIONS (TA = 25_C UNLESS OTHERWISE NOTED) Limits Parameter Symbol Test Conditions Min Typa Max -1 Unit Static Reverse Current IR VR = -20 V DPAD1 -0.2 DPAD5/SSTDPAD5 -2 -5 DPAD5/SSTDPAD5DPAD50 -5 -50 -10 -100 SSTDPAD100 Reverse Breakdown Voltage -45 -60 DPAD5/DPAD50 -45 -55 SSTDPAD5/SSTDPAD100 -30 -50 IR = -1 m mA BVR Forward Voltage Drop DPAD1 VF IF = 1 mA pA V 0.8 1.5 Dynamic Reverse Capacitance CR VR = -5V, f = 1 MHz 0.6 0.8 1.0 2.0 SSTDPAD5/SSTDPAD100 2.0 4.0 DPAD1 0.07 0.2 All Others 0.1 0.5 VR1 = VR2 = -5 V f = 1 MHz R1 - CR2 C Differential Capacitance DPAD1 DPAD5/DPAD50 pF Notes: a. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. TYPICAL CHARACTERISTICS (TA = 25_C UNLESS OTHERWISE NOTED) Reverse Current vs. Reverse Voltage Reverse Current vs. Temperature -1000 -100 DPAD/SSTDPAD5 VR = -20 V IR @ 125_C -100 -10 DPAD/SSTDPAD5 IR (pA) IR (pA) DPAD1 -10 -1 DPAD1 DPAD/SSTDPAD5 -1 -0.1 IR @ 25_C DPAD1 -0.01 -0.1 0 -6 -12 -18 VR (V) www.vishay.com 5-2 -24 -30 -55 -35 -15 5 25 45 65 85 105 125 TA - Temperature (_C) Document Number: 70340 S-04029--Rev. C, 04-Jun-01