DPAD/SSTDPAD Series
Vishay Siliconix
Document Number: 70340
S-04029—Rev. C, 04-Jun-01 www.vishay.com
5-1
Dual Low-Leakage Pico–Amp Diodes
DPAD1 SSTDPAD5
DPAD5 SSTDPAD100
DPAD50
PRODUCT SUMMARY
Part Number IR Max (pA)
DPAD1 –1
DPAD5/SSTDPAD5 –5
DPAD50 –50
SSTDPAD100 –100
FEATURES BENEFITS APPLICATIONS
DUltralow Leakage: DPAD1 <1 pA
DUltralow Capacitance: DPAD1 <0.8 pF
DNegligible Circuit Leakage
Contribution
DCircuit “Transparent” Except to Shunt
High-Frequency Spikes
DOp Amp Input Protection
DMultiplexer Overvoltage
Protection
DESCRIPTION
The D PAD/SSTDPAD series of extremely low-leakage diodes
provides a superior alternative to conventional diode
technology when reverse current (leakage) must be
minimized. These devices feature leakage currents ranging
from –1 pA ( DPAD1) to –100 pA (SSTDPAD100) to support a
wide range of applications.
The low-cost, compact, narrow-body SO-8 (SSTDPAD)
package allows maximum circuit performance. Tape- and-reel
options ar e avaliable for automated assembly (see Packaging
Information).
The TO-78 and TO-71 (DPAD) hermetically sealed metal cans
are available with full military processing per MIL-S-19500
(see Military Information).
C1NC
C1A2
A1C2
NC C2
Narrow Body SOIC
5
6
7
8
Top View
2
3
4
1
TO-78
A2
Top View
C2
A1
C1
Case*
Substrate
1
2
5
4
3
*Case and Pin 3
must be floating
DPAD1
SSTDPAD5
SSTDPAD100
TO-71
Modified
Top View
A1
C1A2
C2
1
2
4
3
DPAD5
DPAD50
DPAD/SSTDPAD Series
Vishay Siliconix
www.vishay.com
5-2 Document Number: 70340
S-04029—Rev. C, 04-Jun-01
ABSOLUTE MAXIMUM RATINGSa
Forward Current 50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage Temperature –55 to 150_C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating Junction Temperature –55 to 150_C. . . . . . . . . . . . . . . . . . . . . . . . .
Lead Temperature (1/16” from case for 10 sec.) 300_C. . . . . . . . . . . . . . . . . . .
Total Device Dissipationb500 mW. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Notes:
a. TA = 25_C unless otherwise noted.
b. Derate 4 mW/_C at 25_C.
SPECIFICATIONS (TA = 25_C UNLESS OTHERWISE NOTED)
Limits
Parameter Symbol Test Conditions Min TypaMax Unit
Static
DPAD1 –0.2 –1
DPAD5/SSTDPAD5 –2–5
Reverse Current IRVR = –20 V DPAD5/SSTDPAD5DPAD50 –5–50 pA
SSTDPAD100 –10 –100
DPAD1 –45 –60
Reverse Breakdown Voltage BVRIR = –1 mADPAD5/DPAD50 –45 –55
RR
m
SSTDPAD5/SSTDPAD100 –30 –50 V
Forward Voltage Drop VFIF = 1 mA 0.8 1.5
Dynamic
DPAD1 0.6 0.8
Reverse Capacitance CRVR = –5V, f = 1 MHz DPAD5/DPAD50 1.0 2.0
R R SSTDPAD5/SSTDPAD100 2.0 4.0 pF
ȧ ȧ
VR1 = VR2 = –5 V DPAD1 0.07 0.2
Differential Capacitance
ȧ
CR1 – CR2
ȧ
VR1 = VR2 = –5 V
f = 1 MHz All Others 0.1 0.5
Notes:
a. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
TYPICAL CHARACTERISTICS (TA = 25_C UNLESS OTHERWISE NOTED)
Reverse Current vs. Reverse Voltage
0
IR @ 125_C
IR @ 25_C
Reverse Current vs. Temperature
–1000
–100
–10
–1
–0.1 –6–12 –18 –24 –30 –55 –35 125
–100
–10
–0.01
–1
–0.1
–15 5 25 45 65 85 105
VR (V) TA – Temperature (_C)
VR = –20 V
DPAD/SSTDPAD5
DPAD1
DPAD1
DPAD/SSTDPAD5
DPAD/SSTDPAD5
DPAD1
IR (pA)
IR (pA)
