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Thank You 400 Amherst Street, Suite 301 Nashua, NH 03063AYg, Biporemones LF155 - LF255 - LF355 LF156 - LF256 - LF356 LF157 - LF257 - LF357 WIDE BANDWIDTH | SINGLE J-FET OPERATIONAL AMPLIFIERS s REPLACE HYBRID AND MODULE FET OP AMPs e RUGGED J-FETs ALLOW BLOW-OUT FREE- HANDLING COMPARED WITH MOSFET INPUT DEVICES sw EXCELLENT FOR LOW NOISE = APPLICA- : TIONS USING EITHER HIGH OR LOW i SOURCE IMPEDANCE (VERY LOW I/F , CORNER) ; m OFFSET VOLTAGE ADJUST DOES NOT | DEGRADE DRIFT OR COMMON-MODE | REJECTION AS IN MOST MONOLITHIC ' AMPLIFIERS s INTERNAL COMPENSATION AND LARGE | DIFFERENTIALINPUT VOLTAGE CAPABILITY (UP TO Vec*) | i TYPICAL APPLICATIONS a PRECISION HIGH SPEED INTEGRATORS i m FAST D/A AND A/D CONVERTERS a HIGH IMPEDANCE BUFFERS WIDEBAND, LOW NOISE, LOW DRIFT AMPLIFIERS a LOGARITHMIC AMPLIFIERS = PHOTOCELL AMPLIFIERS = SAMPLE AND HOLD CIRCUITS DESCRIPTION | These circuits are monolithic J-FET input operational ampiifiers incorporating well matched, high voltage J-FET on the same chip with standard bipolar transistors. This amplifiers feature low input bias and offset | currents, low input offset voltage and input offset ' voltage drift, coupled with offset adjust which does not degrade drift or common-mode rejection. The devices are also designed for high slew rate, wide bandwidth, extremely fast settling time, low voltage and : current noise and a low Vi noise comer. Pay. N D DIPS sos (Plastic Package) (Plastic Micropackage) H TO99 (Metal Can) ORDER CODES Temperature | Package | Part Numb art Number Range HINID LF355, LF356, LF357 0C, +70C elele LF255, LF256, F257) ~-40C,+105C | #} | LF155, LF156, LF157 | -55C, +125C | | | e Examples : LF355N, LF155H PIN CONNECTIONS (top views) DIP&/SO8 a 1 8 2q- 7 3 f L. P| 6 4q H 5 1 - Offset null 1 5 - Offset null 2 2 - Inverting input 6 - Output 3 - Non-inverting input 7 -Vec* 4-Vec 8-NC. wi2 . November 1992 277 155-01. TBLLF155 - LF156 - LF157 SCHEMATIC DIAGRAM 155-03.EPS 155-04.EPS ABSOLUTE MAXIMUM RATINGS Symbo! Parameter Value Unit Vcc | Supply Voltage +22 Vv vi Input Voltage - (note 1) +20 v Via Differential Input Voltage +40 Vv Prot Power Dissipation 570 mw Output Short-circuit Duration Infinite Toper | Operating Free Air Temperature Range LF155-LF156-LF157 ~55 to +125 C LF255-LF256-LF257 ~40 to +105 LF355-LF356-LF357 0 to +70 Tstg Storage Temperature Range -65 to 150 C 22 278 kyq, Secntomne| | | ELECTRICAL CHARACTERISTICS LF155 - LF156 - LF157 LF155, LF156, LF157 -55C < Tamb < +125C +16V < Vcc < +20V LF255, LF256, LF257 -40C < Tamb < +105C +15V < Voc < +20V (unless otherwise specified) LF155 - LF156 - LF157 Symbol Parameter LF255 - LF256 - LF257 | unit Min. | Typ. | Max. Vio Input Offset wowace (Rs = 50Q) mV Tamb = +25C 3 5 Tin. s Tamb < Tmax. LF155, LF156, LF157 7 LF255, LF256, LF257 6.5 lio Input Offset Current - (note 3) Tamb = +25C 3 20 pA Tmin. Tamb Tmax. LF155, LF 156, LF157 20 nA LF255, LF256, LF257 1 nA lio Input Bias Current - (note 3) Tamb = 25C 20 100 pA Trin. < Tamb < Tmax. LF155, LF156, LF157 50 nA LF255, LF256, LF257 5 nA Ava Large Signal Voltage Gain (Ri = 2kQ, Vo = 10V, Vec = +15V) VimV Tamb =+ 25C 50 200 Trin. < Tamb Tmax. 25 SVR_| Supply Voitage Rejection Ratio - (note 4) 85 100 dB Icc | Supply Current, {leo = +15V, no load) | omA Tamb =+ 25C LF155, LF255 2 4 LF156, LF256 5 7 LF157, LF257 5 7 DVio | Input Offset Voltage Drift (Rs = 500) 5 uvPc | DVioVio | Change in Average Temperature Coefficient with Vio adjust 0.5 pVPC (Rg = 50Q) - (note 2) per mV Vien | Input Common Mode Voltage Range (Vcc = +15V, Tam = 25C) +11 | 415.1 Vv 12 CMR_ | Common Mode Rejection Ratio 85 100 dB +Vopr | Output Voltage Swing Woe = +15V) v Ri = 10kQ +12 +13 Ri = 2kQ +10 +12 GBP | Gain Bandwidth Product (Voc = +15V, Tamb = 25C) MHz LF155, LF255 2.5 LF156, LF256 5 LF157, LF257 20 SR Slew Rate (Vcc = +15V, Tam = 25C) Vis Ay =1 . LF155, LF255 5 LF156, LF256 7.5 12 Av =5 F157, LF257 30 50 Ri__| input Resistance (Tamp = +25C) 10! Q C__| input Capacitance (Voc = +15V, Tamp = 25C) 3 pF n Equivalent input Noise Voltage (Vcc = +15V, Tam = 25C, As = 100) nv f= 1000Hz LF155, LF255 20 VHz LF156, LF256 12 LF157, LF257 12 f = 100Hz LF155, LF255 25 LF156, LF256 15 LF157, LF257 15 in Equivalent Input Noise Current pA (Vcc = 15V, Tamb = 25C, f = 100Hz or f = 1000Hz)} 0.01 VHz ts Settling Time (Vcc = +15V, Tamp = 25C) - (note 5) ps LF155, LF255 4 LF156, LF256 1.5 LF157, LF257 1.6 ; 312 & SGS-THOMSON 7 iircrorlscrnomcs 155-03.TBLLF155 - LF156 - LF157 ELECTRICAL CHARACTERISTICS LF355, LF356, LF357 (unless otherwise specified) OC < Tame $ +70C Voc = 15V Symbol Parameter LF355 - LF356 - LF357 | nit Min. | Typ. | Max. Vio Input Offset Voltage (Rs = 5082) mV amb = +25C 3 10 Trin. S Tam S Tmax. 13 lio Input Offset Current - (note 3) Tamb = +25C 3 50 pA Trin. S Tamb S Tmax. 2 nA_| lip Input Bias Current - (note 3) Tamb = 25C 20 200 pA Tin. S Tamp S Tmax. 8 nA Aud Large Si Signal vohage Gain (RL = 2kQ, Vo = +10V) Vien 25 200 Trin < +e < Tmax. 15 SVR_| Supply Voltage Rejection Ratio - (note 4) 80 100 dB lec Supply Current, no Load mA Tamb = 25 6 LF355 2 4 LF356, LF357 5 10 OVio | Input Offset Voltage Drift (Rs = 509) - (note 2) 5 phVPC DViaVio | Change in Average Temperature Coefficient with Vio adjust pVPC (Rs = 500) 0.5 per mV Vien | Input Common Mode Voltage Range (Tamp = 25C) 410 | +15.1 Vv 12 CMR_ | Common Mode Rejection Ratio 80 100 dB +Vopp | Output Voltage Swing Ri = 10k22 +12 +13 Vv Ri = 2kQ +10 +12 GBP | Gain Bandwidth Product (Tamp = 25C) LF355 2.5 MHz LF356 5 LF357 20 SR__ | Slew Rate (Tamp = 25C) V/s Ay =1 LF355 5 LF356 12 Av =5 LF357 50 Ri__| Input Resistance (Tamb = +25C) 10 Q Ci__| Input Capacitance (Tamp = 25C) 3 pF n Equivalent Input Noise Voltage (Tamn = 25C, Rs = 1002) nv f = 1000Hz LF355 20 NHz LF356, LF357 12 f = 100Hz LF355 25 LF356, LF357 16 in Equivalent | Input Noise Current A, (Tamb = 25C, f = 100Hz or f = 1000Hz) 0.01 ie ts Settling Time (Tamp = 25C) - (note 5) LF355 4 us LF356, LF357 1.5 Notes: 1. Unless otherwise specified the absolute maximum negative input voltage is equal to the negative power supply voltage. 2. The temperature coefficient of the adjusted input offset voltage changes only a small amount (0. SVG typically) for each mV of adjustment, from its original unadjusted value. Common-mode rejection and open loop voltage gain are also unaffected by offset adjustme: 3. rel input bias currents are junction leakage currents which approximately double for every 10C i increase in the junction temperature @ to limited production test time, the input bias current measured is correlated to junction temperature. we a normal operation nee junction temperature rises above the ambient ture as a result of internal power dissipation, Pror Tame = Tamb + rot where Feni-a)is the thermal resistance from junction to ambient. Use of a heatsink is recommended if input currents are to be kept to a minimum. 4. Supply voltage rejection is measured for both suppty magnitudes increasing or decreasing simuttaneously, in accordance with com- practise. 5. Settling time is defined here, for a unity gain inverter connection using 2kQ resistors for the LF155, LF156 series. It is the time required for the error voltage (the voltage at the inverting input pin on amplifier) to settle to within 0.01% of its final value from the time a 10V step input is applied to the inverter. For the LF 157 series Av = -5, the feedback resistor from output to input is 2kQ and the output step is 10V. 42 280 ky7 SGS-THOMSON SIF imenocecrnontcsAPPLICATION HINTS The LF 155, LF156, LF157 series are op amps with J- ET input transistors. These JFETs have large reverse preakdown voltages from gate to source or drain elimi- nating the need of clamps across the inputs. Therefore large differential input voltages can easily be accom- modated without a large increase of input currents. The maximum differential input voltage is independent of he supply voltage. However, neither of the negative Nput voltages should be allowed to exceed the nega- ive supply as this will cause large currents to flow which pan result in a destroyed unit. Exceeding the negative common-mode limit on either Nput will cause a reversal of the phase to the output and 7orce the amplifier output to the corresponding high or ow state. Exceeding the negative common-mode limit Dn both inputs will force the amplifier output to a high State. In neither case does a latch occur since raising the input back within the common-mode range again Duts the input stage and thus the amplifier in a normal Dperating mode. Exceeding the positive common-mode limit on a single nput will not change the phase of the output however, f both inputs exceed the limit, the output of the amplifier will be forced to a high state. These amplifiers will operate with the common-mode input voltage equal to the positive supply. In fact, the bommon-mode voltage can exceed the positive supply by approximately 100 mV independent of supply volt- lage and over the full operating temperature range. The positive suplly can therefore be used as a reference on an input as, for example, in a supply current monitor and/or limiter. Precautions should be taken to ensure that the power supply for the integrated circuit never becomes i THOMSON IP MICROELECTRONICS LF155 - LF156 - LF157 reversed in polarity or that the unit is not inadvertently installed backwards in a socket as an unilimited current surge through the resulting forward diode within the IC could cause fusing of the internal conductors and result in a destroyed unit. Because these amplifiers are JFET rather than MOS- FET input op amps they do not require special hand- ling. Allofthe bias currents in these amplifiers are set by FET current sources. The drain currents for the amplifiers are therefore essentially independent of supply volt- ages. As with most amplifiers, care should be taken with lead dress, components placement and supply decoupling in order to ensure stability. For example, resistors from the output to an input should be placed with the body close to the input to minimiz "pickup" and maximize the frequency of the feedback pole by minimizing the ca- pacitance from the input to ground. A feedback pole is created when the feedback around any amplifier is resistive. The parallel resistance and capacitance from the input of the device (usually the in- verting input) to ac ground set the frequency of the pole. In many instances the frequency of this pole is much greater than the expected 3 dB frequency of the closed loop gain and consequently there is negligible effect on stability margin. However, if the feedback pole is less than approximately six time the expected 3 dB fre- quency a lead capacitor should be placed from the out- put to the input of the op amp. The value of that added capacitor should be such that the RC time constant of this capacitor and the resistance it parallels is greater than or equal to the original feedback pole time con- stant. 5/12 281LF155 - LF156 - LF157 TYPICAL CIRCUITS LARGE POWER BW AMPLIFIER SETTLING TIME TEST CIRCUIT z. +10V -10V 155-05.EPS For distortion < 1% and a 20 Vee Vo swing, power bandwidth is : 500kH: 2N 4416 155-06.EPS Settling time is tested with the LF 155, LF156 connected as unity gain converter Ai = 2kQ and LF 157 connected for Av = -5, Ri = 0.4kQ 6/12 282INPUT BIAS CURRENT (pA) INPUT BIAS CURRENT (pA) SUPPLY CURRENT (mA) INPUT BIAS CURRENT 100 k 10k ik Vec= $20V Voc= #18 V pe Vec= 10V_ | Vec= 5V 10 | 100 LF155 0.1 L -35 -25 5 35 55 CASE TEMPERATURE (C) 125 INPUT BIAS CURRENT +15V +26C = 50 ko2 yA a Veco = Tamb RL ul 1 oot | LF1IS6, LF157 Free-air a LF156, LF157 With heatsink ~~ to 4 LF 155 with heatsink _ LFS Free air 38 8 8 8 AN 5 Qo 5 10 COMMON-MODE VOLTAGE (V) SUPPLY CURRENT a 5 10 15 20 25 SUPPLY VOLTAGE {+ VI} 4| LF155 - LF156 - LF157 INPUT BIAS CURRENT 100 k _ Wk a bE tkhVcc= +20V < Vec= +15V 3 Vec=+10V <2 3 1001] vee = 5V SS | m 2 10 o 5 1 $s LF156, LF157 = 0.1 4 -55 -25 - 35 65 95 PEAK-TO-PEAK OUTPUT SWING (V) CASE TEMPERATURE (C) VOLTAGE SWING 125 0 5 10 165 20 SUPPLY VOLTAGE (+ V) SUPPLY CURRENT 7 1G - Sf < 6 oy a of : aoe 1 a 5 * of ec : Ae 3 4 a eo" > x* % ] LA se Ss 3 Ke | a tT LF156, L157 2 L pot gy 0 5 10 15 2a 25 SUPPLY VOLTAGE (+ V) 155-07.EPS 7A $GS-THOMSON me MICKROELECTRON 283LF155-LF1S6-LFiS7 .. eN2 POSITIVE COMMON-MODE NEGATIVE OUTPUT VOLTAGE SWING (V) INPUT VOLTAGE LIMIT (V) OPEN LOOP VOLTAGE GAIN /V) MAXIMUM NEGATIVE CURRENT ~15 Vec=+15V SS j RAIN 40 N \ ~ Ne. Rs | NB a Yt. o7 + \ 5 oO * x 0 ad i QO 5 10 15 0 23% DW 35 OUTPUT SINK CURRENT (mA) MAXIMUM POSITIVE COMMON-MODE INPUT VOLTAGE 20 T r_T T 55C <T mb = +125C VA 15 Y LY 5 10 15 20 POSITIVE SUPPLY VOLTAGE {V) OPEN LOOP VOLTAGE GAIN 5 10 15 20 SUPPLY VOLTAGE (+) POSITIVE OUTPUT VOLTAGE SWING (V) INPUT VOLTAGE LIMIT (V) NEGATIVE COMMON-MODE PEAK-TO-PEAK OUTPUT SWING (V) MAXIMUM POSITIVE CURRENT 15 + TO Vegs +15 V N 10 4 oa 3 o 4 t Il af | 3 | a oa 5 2 i 8 ae) o a + +7/ 8 _ oO oTT oO oS 3 0 0 5 10 15 20 25 30 35 40 OUTPUT SQUACE CURRENT (mA) MAXIMUM NEGATIVE COMMON-MODE INPUT VOLTAGE -20 -15 = Fam = 58C j amb =+ -10 { T Tomb = +125C | 5 o - 10 15 -20 NEGATIVE SUPPLY VOLTAGE {V} OUTPUT VOLTAGE SWING 28 Voc = + 15V 7 Tamb = + 25C 16 12 8 oO 0 10 19! OUTPUT LOAD A, (ka! 155-08.EPS~ OUTPUT VOLTAGE SWING (60 mV/DIV! OUTPUT VOLTAGE SWING (60 mV/DIV) OUTPUT VOLTAGE SWING (50 mv/DIV) SMALL SIGNAL PULSE RESPONSE TIME (0.5 s/DIV) SMALL SIGNAL PULSE RESPONSE TIME (0.5 ys/DIV} SMALL SIGNAL PULSE RESPONSE TIME (0.1 s/DIV} LF155 - LF156 - LF157 LARGE SIGNAL PULSE RESPONSE OUTPUT VOLTAGE SWING (6 V/DIV) TIME (1 us/DIV) LARGE SIGNAL PULSE RESPONSE OUTPUT VOLTAGE SWING (5 V/DIV) TIME (1 2s/DIV} LARGE SIGNAL PULSE RESPONSE OUTPUT VOLTAGE SWING (6 V/DIV) TIME (0.5 ,s/DIv) 155-09.EPS 92 ky SES;THOMSON 285LF155 - LF156 - LF157 GAIN BANDWIDTH PRODUCT 5 LF155 : 4 Vec=110V | 3 Vec=i5V Vcc=+20V GAIN BANDWIDTH PRODUCT (MHz2} t -55 15 25 65 105 AMBIENT TEMPERATURE (C) NORMALIZED SLEW ARATE GAIN BANDWIDTH PRODUCT LFIS6 LF157 curves identical but x 4 10 vec | 345 UNITY GAIN BANDWIDTH PRODUCT (MHz) -5 -15 25 65 105 AMBIENT TEMPERATURE (C) INVERTER SETTLING TIME - 10 = Tamb + 25C ; > Vv - i s Voc= 15 2 cc - +i5 ! & LF186 - LF157 = 5 a a> 10 mv | 5 2 | a Ke 0 | os | 8 > 9 | N 5 : a | 3 E -5 ' 3 2 10 0 1 . -55 -15 25 65 105 0 0.5 10 5 10 i TEMPERATURE (C} SETTLING TIME (us) INVERTER SETTLING TIME ~ OPEN LOOP FREQUENCY RESPONSE - 110 10 T PoP Urey _ Veco = +15V 2 Vee - #15 $s Tamb = +25C z 90 ~ = 5 < 5 o n w> ws Qo a i <> < ' Fo 5 so J 0 oF 9 i > 9 z 0 Su 8 - - -5 a . Fe z 10 a . & 0 10 10 5 | 10' 107 107 10% 10 10% 10 SETTLING TIME (ys) FREQUENCY (Hz) 155-10.EPS i 10/12 SGS-THOMSON : ky SEROMSON 286LF155 - LF156 - LF157 GAIN (dB) QAIN (dB) GAIN (dB) BODE PLOT Phase 10 10! 102 FREQUENCY (MHz) BODE PLOT 125 100 Phase Vec= +15 V175 50 Gain 25 0 -25 50 15 100 128 150 10 10! 107 FREQUENCY (MHz) BODE PLOT 35 mae 30 Vcc = +15V 25 20 25 15 Phase 10 -25 5 50 0 15 5 100 10 125 -15 150 | 178 0 10! 10 FREQUENCY (MHz) (seos6ep) 39VHd (sees5ep) aSWHd (sees80p) 3SVHd POWER SUPPLY REJECTION RATIO (dB) POWER SUPPLY REJECTION RATIO (dB) COMMON-MODE REJECTION RATIO (dB) ky Ses ron POWER SUPPLY REJECTION RATIO 100 Tamb ~ +25C 60 MN Yec =+15V N\ NX. Positive supply 60 f N\ 40 }- Negative supply \ \ LFI5S 0 _t 10 407 yo% 104 10? = 408 FREQUENCY (Hz! POWER SUPPLY REJECTION RATIO 120 amb = +25C Vcc =+15V 100 Positi 40 20 0 10? 107) 107 108 t0 107 FREQUENCY (Hz) COMMON-MODE REJECTION RATIO 100 r t we Vcc = 15V 50 \ NK [RL = 22 \ N\ Tamb = +25C 60 \ a AN wollire 6 7 10 10 10 FREQUENCY (Hz) 155-11.EPSLF155 - LF156 - LF157 EQUIVALENT INPUT NOISE VOLTAGE (nV/VHz) jz) EQUIVALENT INPUT NOISE VOLTAGE (n V/ PEAK TO PEAK OUTPUT VOLTAGE SWING (V) 12/12 EQUIVALENT INPUT NOISE VOLTAGE (EXPANDED SCALE ) 100 Tamb Vec LF155 LF166, LF157 4 2 10 10 10 = 10% 100k FREQUENCY (Hz) EQUIVALENT INPUT NOISE VOLTAGE 140 Tamb = +25C Vec = 15V 8 8 8 8 10 104 FREQUENCY (Hz) UNDISTORTED OUTPUT VOLTAGE SWING 23 Veo = t18V 24 RL = 2k Tamb = +25C 16 1% Dist LF157 OUTPUT IMPEDANCE (0) OUTPUT IMPEDANCE (0) OUTPUT IMPEDANCE (0) OUTPUT IMPEDANCE Tamb = + Vec = 15V 10 ~ 10 0 308 107 FREQUENCY (Ha) OUTPUT IMPEDANCE +25C Fee +i5v UV Tamb Vcc bt LEIS, tT INN A 10 =6 10 S10 FREQUENCY (Hz} 4 10 7 OUTPUT IMPEDANCE 10 Tamb = +25C Vec = +15V a vat 40 Ay=10 107! 10 | FREQUENCY [Hz) 155-12.EPS