REVISIONS LTR DESCRIPTION DATE (yR-MO-pA) APPROVED A Added device types 02, 03, and 04. Made 93-04-15 | K. Cottongim changes to tables I and II. REV SHEET REV A SHEET 15 | 16 | 17 | 18 REV STATUS REV A A A A A A OF SHEETS SHEET Tee] PsP et sf ol 7] ef 9 | od a ded as | ag PREPARED BY PMIC N/A Steve L. Duncan DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 STANDARDIZED CHECKED By MILITARY Michael Jones DRAWING srprovey wy MICROCIRCUIT, MEMORY, 512K X 8-BIT, THIS DRAWING IS AVAILABLE Kendall A. Cottongim ELECTRICALLY ERASABLE PROGRAMMABLE FOR USE BY ALL DEPARTMENTS READ ONLY MEMORY, HYBRID AND AGENCIES OF THE DEPARTMENT OF DEFENSE eee oe DATE SIZE | CAGE CODE 5962-93091 AMSC N/A REVISION LEVEL A 67268 A SHEET 1 oF 18 DESC FORM 195 JUL 91 DISTRIBUTION STATEMENT A. Approved for public release; 5962-E272-93 distribution is unlimited.1. SCOPE 1.1 Scope. This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). This drawing describes device requirements for hybrid microcircuits to be processed in accordance with MIL-H-38534. Two product assurance classes, military high reliability (device class H) and space application (device class K) and a choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of radiation hardness assurance levels are reflected in the PIN. 1.2 PIN. The PIN shalt be as shown in the following example: 5962 - 93091 _01_ HL xX xX | | | | | | | | | | | | | | | | Federal RHA Device Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) \ / (see 1.2.3) V/ Drawing number 1.2.1 Radiation hardness assurance (RHA) designator. Device classes H and K RHA marked devices shall meet the MIL-H-38534 specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) shall identify the circuit function as follows: Device type Generic number Circuit function Access time 01 WE-512K8-150CQ EEPROM, 512K x 8-bit 150 ns 02 WE-512K8-300C@ EEPROM, 512K x 8-bit 300 ns 03 WE-512K8~250CQ EEPROM, 512K x 8-bit 250 ns 04 WE-512K8-200Q EEPROM, 512K x 8-bit 200 ns 1.2.3 Device class designator. This device class designator shall be a single letter identifying the product assurance Level as follows: Device class Device requirements documentation Hor K Certification and qualification to MIL-H-38534 1.2.4 Case outline(s). The case outline(s) shall be as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style x See figure 1 32 Dual-in-line, Dual cavity 1.2.5 Lead finish. The lead finish shall be as specified in MIL-H-38534 for classes H and K. Finish letter "X" shall not be marked on the microcircuit or its packaging. The "X" designation is for use in specifications when Lead finishes A, B, and C are considered acceptable and interchangeable without preference. STANDARDIZED SIZE 5962-93091 MILITARY DRAWING A DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 REVISION LEVEL SHEET A 2 DESC FORM 193A JUL 911.3 Absolute maximum ratings. 1/ Supply voltage range ... 2... ...2.2.2.2.2004 -0.6 V de to +6.25 V dc Input voltage range... .. 2.2... . 2. ee ee -0.6 V de to +6.25 V de Power dissipation (Pp) ... 2.2... ...--2.8204 1.6 W Storage temperature range. ........2.2.. ee + 6*65C to +150C Lead temperature (soldering, 10 seconds) ........ +300C Thermal resistance, Junction to case (@j-) ....... 28C/W Data retention ..........0.0.2..080204.4 10 years minimum 1.4 Recommended operating conditions. Supply voltage range .................-. 44.5 V de to +5.5 V de Input low voltage range (Vy)... 2.2... 7 - +. 70.3 V de to 40.8 V de Input high voltage range (Wy) 2. 2... ee ee 42.2 V de to Voc + 0.3 V de Output voltage, High minimum (VQy) . 2... - 2.2 eee 42.4 V dc Output voltage, Low maximum (Vgp) . . 2... 2. 2 eee +0.45 V de Case operating temperature range (Tc)... 2... we, -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbook. Unless otherwise specified, the following specification, standards, and handbook of the issue Listed in that issue of the Department of Defense Index of Specifications and Standards specified in the solicitation, form a part of this drawing to the extent specified herein. SPECIFICATION MILITARY MIL-H-38534 Hybrid Microcircuits, General Specification for. STANDARDS MILITARY MIL-STD-480 - Configuration Control-Engineering Changes, Deviations and Waivers. MIL-STD-883 Test Methods and Procedures for Microelectronics. MIL-STD-1835 Microcircuit Case Outlines. HANDBOOK MILITARY MIL~HDBK~780 Standardized Military Drawings. (Copies of the specification, standards, and handbook required by manufacturers in connection with specific acquisition functions should be obtained from the contracting activity or as directed by the contracting activity.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing shall take precedence. i/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum Levels may degrade performance and affect reliability. STANDARDIZED SIZE 5962-93091 MILITARY DRAWING A DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 REVISION LEVEL SHEET 3 DESC FORM 193A JUL 913. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-H-38534 and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-H-38534 and herein. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein and figure 1. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Truth table(s). The truth table(s) shall be as specified on figure 3. 3.2.4 Timing diagram(s). The timing diagram(s) shall be as specified on figures 4, 5, 6, and 7. 3.2.5 Block diagram. The block diagram shall be as specified on figure 8. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full specified operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shalt be the subgroups specified in table II. The electrical tests for each subgroup are described in table 1. 3.5 Marking. Marking shall be in accordance with MIL-H-38534. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be marked as Listed in QML-38534. 3.6 Manufacturer eligibility. In addition to the general requirements of MIL-H-38534, the manufacturer of the part described herein shall maintain the electrical test data (variables format) from the initial quality conformance inspection group A lot sample, produced on the certified line, for each device type listed herein. The data should also include a summary of all parameters manually tested, and for those which, if any, are guaranteed. This data shall be maintained under document revision level control by the manufacturer and be made available to the preparing activity (DESC-EC) upon request. 3.7 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to supply to this drawing. The certificate of compliance submitted to DESC-EC shall affirm that the manufacturer's product meets the requirements of MIL-H-38534 and the requirements herein. 3.8 Certificate of conformance. A certificate of conformance as required in MIL-H-38534 shall be provided with each lot of microcircuits delivered to this drawing. 4. QUALITY ASSURANCE PROVISIONS 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-H-38534. STANDARDIZED SIZE 5962-93091 MILITARY DRAWING A DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 REVISION LEVEL SHEET 4 DESC FORM 193A JUL 91TABLE I. Electrical performance characteristics. | | | | | | Test | Symbol | Conditions 4/ [ Group A | Device | Limits | Unit | | ~55C = Te = +125C | subgroups | type | | | | Vsg = 0 V de | | | | | | |+4.5 Vdes Vec 2 +5.5 Vdc | | | | | | |_unless otherwise specified | | | Min | Max l DC PARAMETERS | fo _ | | | | | Supply current ITec [CS = OE = Vy, WE = Vyy, | 1,2,3 | atl | | 180 | mA | [1/0 O through I/O 7 = open, | | | | | | inputs = Vec = 5.5 V de, | | | | | { JAO through A18 change at | | | | | | 5 MHz | I | | | | | | | | | | Standby current lIsg [CS = Vcc, 1/0 0 through | 1, 2,3 | Att} | 10 | mA | [1/0 7 = open, inputs = | | | | | | [Veg = 5.5 V de, AO through | | | | | | [._A18 change at 5 MHz | I | | | | | | | | | | Input leakage current |I,y Vin = Vgg to Vec {| 1, 2,3 | atl | | 80 | A | | | | | | | | _ | | | | | Output leakage current j|lio \Vout = Vgg to Vcc, CS= Vy | 1, 2,3 | ALL | | 80 {| PA | | | | | | { | | | | | | | Input low voltage oe | } 1,2,3 | atl | | 0.8 | Vv | | | | i | | | | | | | | | Input high voltage \Vin | {| 1, 2,3 | Alt f 2.0 | | Vv | { | | { | | | | | | | | | Output low voltage Vor Io, = 2.1 mA, Vee = 74.5 V | 1,2, 3 | Ale | | 045 |v | | L { | | | | | | | | | | Output high voltage Vou {Igy = ~400 pA, Vee = 44-5 V | 1,2, 3 | AL | 2.4 | | Vv | { | | | | | FUNCTIONAL TESTING | | | | | | | Functional tests | |See 4.3.1 | 7, 8A, BB | ALL | | | | | | | | L | DYNAMIC CHARACTERISTICS | | | | | | Input capacitance [Cry Vin = OVde 8 2/ | 4 J All | 90 | pF | | | | | | | | | | | | Output capacitance {Cour |Your = OVde 2/ | 4 { all | | 120 | pF | | | | | | | See footnotes at end of table. STANDARDIZED SIZE 5962-93091 MILITARY DRAWING A DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 REVISION LEVEL | SHEET A 5 DESC FORM 193A JUL 91TABLE I. Electrical performance characteristics - Continued. | | | | | Test Symbol | Conditions 1/ | Group A | Device | Limits {| Unit | | -55C S Te S +125C {| subgroups [| type | | | | Vsg = OV de | | | | | | [+4.5 V de = Ver S$ +5.5 V de | | | | | | | unless otherwise specified | | L._ Min | Max l READ CYCLE AC TIMING CHARACTERISTICS | | | | | | | Read cycle time Itre |See figure 4 | 9, 10,11 | OF | 150 | | ns | | 02 | 300 | | | | | | 03 | 250 | | | | | | 04 | 200 | | | | | | | | Address access time Itacc |See figure 4 { 9, 10, 11 | oO | | 150 | ns | | | | 02 | | 300 | | | | | @ | | 250 | | | | [04 | {__200 | | | | | | | Chip select access time |tacs |See figure 4 | 9,10, 11 | a | | 150 | ns | | | | {| 300 | | | | | O38 | {| 250 | | | i | 04 | |__200 | | | | | | | | Output hold from_address| toy |See figure 4 | 9, 10, 117 | Alt |{ 0 | | ns change OE or CS | | | | | | | | | | | | | Output enable to output | tor |See figure 4 | 9, 10, 11 | 01,04 | | 85 | ns valid | | { o2 | | 125 | | | | [| 03 [100 | BYTE WRITE AC TIMING CHARACTERISTICS | | | | | | | Address setup time itas |See figure 5 19, 10, 117 | ALL | 10 | | ns I | 1 | | | | | | | | Write pulse width |twp |See figure 5 | 9, 10, 11 | ALL | 150 | | ns { | | | | | ! | | | | | | | Chip select setup time |tcs [See figure 5 | 9, 10, 11 | all | 0 | | ns | | | | | | i | | | | | | | Address hold time [tay |See figure 5 3/ [| 9, 10, 11 | Alt | 125 | | ns | | | | | | | | | | | | | | Data valid to end of [toy |See figure 5 | 9, 10,1171 | ALL | 100 | | ns write | | | | | | | | | | | | | | Output enable setup \toes |See figure 5 | 9, 10,17 | All | 10 | | ns time | | ! | | | | | | | | | | Data hold time [toy [See figure 5 | 9, 10, 17 | AlL | 10 | | ns | | | | | | | | | | | | | | Output enable hold time |togy {See figure 5 | 9, 10, 17 [| ALL | 10 | | ns | { | | | L | See footnotes at end of table. STANDARDIZED SIZE 5962-93091 MILITARY DRAWING A DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 REVISION LEVEL | SHEET A 6 DESC FORM 193A JUL 91TABLE I. Electrical performance characteristics - Continued. | | | | | | Test | Symbol | Conditions 1/ | Group A | Device | Limits { Unit | | -55C Te S +125C | subgroups | type | | | | Vsg = O V de | | | | | [+4.5 V de = Vee $ +5.5 Vide | | | | | l | unless otherwise specified | | | Min [__ Max | BYTE WRITE AC TIMING CHARACTERISTICS - Continued | | | | | Chip select hold time |tesy |See figure 5 { 9, 10, 11 | AL | O4/ | | ns | | | 25 5/ | | | | | | | | L | | | | | | | Write pulse width high |typy |See figure 5 | 9, 10,17 | ath [| 50 | | ns | | | | | | | | l i | i | | PAGE MODE WRITE AC TIMING CHARACTERISTICS | | | | | | Data setup time Itys |See figure 6 | 9, 10,117 | att | 100 | | ns | ! | i | l | | | | | | | Data hold time Ito |See figure 6 [| 9, 10,117 {| all | 10 I {| ns | | | | | | | | | | | | | | Write pulse width [typ {See figure 6 | 9, 10,117 | All | 150 | | ns | | | | | | | | | | | | | | Byte load cycle time Itgie |See figure 6 | 9, 10,17 | ALL | | 150 | ps | | | | | | | | | | | | | Write pulse width high |typy |See figure 6 | 9, 10,17 | all | 50 | | ns | | | | | { | | | | | | | Write cycle time Ite |See figure 6 | 9, 10, 17 | ALL | |} 10 | ms | | | | { | | DATA POLLING AC TIMING CHARACTERISTICS | | | | | | Data hold time {toy |See figure 7 | 9, 10,17 [ Alt | O4/ | | ns | | | | 35 5/ | | | | | J | | | | | | | | | Output enabie hold time | toey |See figure 7 | 9, 10,17 | AlL | 104/ | | ns | | | | 35 5/ | | | | | | | | | | | | | | | | Output enable to output |to |See figure 7 | 9, 10,17 | ALL | | 100 | ns delay | | | | | | | | | | | | | | Write recovery time [typ |See figure 7 | 9, 10, 117 | ALL | 0 | { ns { { 1 | | 1/ Unless otherwise specified; the AC test conditions are as follows: Input pulse levels: Vy, = 0 V and Vyy = 3.0 V. Input rise and fall times: 5 ns. Input and output timing reference levels: 1.5 V. shall be guaranteed to the limits specified_in table I for all lots not specifically tested. 5/ CS controlled 3/ Al? and A18 must remain valid through the WE or CS low pulse. 4/ WE controlled 2/ Parameters shall be tested as part of device characterization and after design and process changes. Parameters STANDARDIZED MILITARY DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 SIZE 5962-93091 REVISION LEVEL A SHEET DESC FORM 193A JUL 91CLO ETP SL Pt 1 ) oe Cree Ure ere tru tetra eres JL BIN 74 INDENT IP TER Lae A ~ } | | mH OUOUUIUGIL AL | Fe | | EE | | Ge | , .. ia wee Fam he deep tf em ee Symbol Inches Millimeters Min Max Min Max A 1.654 | 1.686 | 42.01 42.82 B 0.580 | 0.600 | 14.73 | 15.24 c 0.235 | 0.275 | 5.97 6.99 D 0.016 | 0.020] 0.41 0.51 E 0.045 | 0.055] 1.14 1.40 F 0.100 TYP. 2.54 TYP. G 0.015 | 0.060 | 0.38 1.52 H 0.125 MIN. 3.18 MIN. J 0.008 | 0.012 | 0.20 0.30 K 0.590 | 0.610 | 14.99 | 15.49 L 0.085 TyP. 2.16 TYP. FIGURE 1. Case outline. STANDARDIZED SIZE 5962-93091 MILITARY DRAWING A DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 REVISION LEVEL | SHEET ; DESC FORM 193A JUL 91|Device types |Case outline |Terminal_number OANA UEBWD = | | | | | | | | | | | | | | | | | 7 | | | | | | | | | | | | | | | | | { | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 01-04 x Terminal connection A18 A16 AIS Al2 A? A6 AS AG A3 A2 Aj AO 1/0 0 1/0 1 1/0 2 Vss 1/0 1/0 1/0 1/0 1/0 cs A10 OE Al Ag AB A13 Ais Al? WE Vec NAW EW | | | | | | | | | | | | | | | | | | | | | | | | | | | | | FIGURE 2. Terminal connections. FIGURE 3. Truth table. }_!}|_t]_| | | | | | CS | OF | WE | AO-A18 | = MODE | DATA I/o | DEVICE | | | | | | I [|_ CURRENT | J. H| x{| x] x |_ Standby | High z | Standby | jt | t | |} Stable | Read | Data Out [Active | |_t | HI} L | Stable | write [| Data In | Active | | x] H{[ x|[ x | Out Disable | High z |. Active | | xi x] Hi x | Write inhibit] High Z/Data out | Active | | x] eft x] x | Write inhibit] High Z/Data out | Active | NOTES: 1. H = Vay = High Logic Levelt 2. L = Vy_ = Low Logic Level 3. X = Do not care (either High or Low) 4. High Z = High Impedance state STANDARDIZED MILITARY DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 SIZE 5962-93091 REVISION LEVEL A SHEET DESC FORM 193A JUL 91FIGURE 4. tg ADDRESS Ran to An KK _/ a ew) on tony h tacs 7-4 cs Ko oe . toe 4 OE CO ee WE {op _ "ace ee eee DATA QUT mmm mmm XO OUT VALID XXX Du QUT +1 VALID, Read cycle timing diagram. STANDARDIZED MILITARY DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 SIZE 5962-93091 REVISION LEVEL SHEET 10 DESC FORM 193A JUL 91) wf FIGURE 5. -- t wp Ne ee WE control led TN vad S PE wei --h Rt oy mt tins DATA [No - ----- fT et oy _ Write cycle timing diagram. STANDARDIZED MILITARY DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 SIZE A 5962-93091 REVISION LEVEL SHEET ll DESC FORM 193A JUL 91NOTES: 1. ADDRESS i _ tas Py csi a ena Cs co ee WE foe a fee ee A \ en, yoo A write cycle is initiated when O&_is high and WE or CS is pulsed low when CS or WE is Low. The address is latched on the falling edge of WE or CS, whichever occurs first. In either case, the address setup requirement applies to the falling edge of CS due to the inclusion of an address decoder in the device. Due to the inclusion of the address decoder in the device, the WE and CS write controt timings will vary. When utilizing the CS controlled write operation, all hold timings must be extended by the 25 ns propagation delay of the address decoder. for a WE controlled write operation, CS must be a minimum of 125 ns to accommodate the additional setup time required. The delay required from the previous write operation to the next must be a minimum of 10 ps. CS controtled FIGURE 5. Write cycle timing diagram - Continued. DEFENSE ELECTRONICS SUPPLY CENTER STANDARDIZED SIZE 5962-93091 MILITARY DRAWING A DAYTON, OHIO 45444 REVISION LEVEL SHEET aon 12 DESC FORM 193A JUL 91 Fe ne ne a ee ff ee ee fe Oo 4% u a a an - ~ t = . f cs NL / < CS NS NX a i \ NS 7 t wpe tweu terc SUSAR AD-AB _Xwio mia PX << DS F-9 t twe ey DH me . aD DATA Xvainore KOK BYTE oO Bri 14 BYTE 2 BYTE 3. BYTE 126 = BYTE 127 NOTES: 1. A17 and A18 are used to select one of four separate blocks within the device. 2. A? through A16 are used to specify the page address and must be the same throughout a single page mode write. AO through A6 are used to address specific bytes within a page. Parameter tyc is the write cycle time which will begin 150 ps after the last_byte_has been loaded. A write cycle is initiated when 0_is high and WE or CS is pulsed low when CS or WE is low. The address is latched on the falling edge of WE or CS,_which ever occurs last. In either case, the address setup requirement applies to the falling edge of CS due to the inclusion of an address decoder in the device, (See figure 5). 6. The delay required from the previous write Operation to the next aust be a miniaus of 10 ps. Meu FIGURE 6. Page mode write timing diagras. STANDARDIZED SIZE 5962-93091 MILITARY DRAWING A DEFENSE ELECTROWICS SUPPLY CENTER DAYTON, OHIO 45444 REVISION LEVEL SHEET 13 DESC FORM 193A JUL 91A0-A18 FIGURE 7. Data polling AC timing diagras. DAYTON, QHIO 45444 STANDARDIZED SIZE 5962-93091 : MILITARY DRAWING A DEFENSE ELECTRONICS SUPPLY CENTER _ a REVISION LEVEL | SHEET 14 DESC FORM 193A JUL 91AO-A16 |/00-7 ep We ; | YVY v v_ f vv | r REVISION LEVEL 128K x 8 128K x 8 128K x B 128K x 8 AS |: DECODER Al? Ps (65 we d FIGURE 8. Block diagras. STANDARDIZED SIZE 5962-93091 MILITARY DRAWING A DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHTO 45444 SHEET 15 DESC FORM 193A ! JUL 91 |4.2 Screening. Screening shall be in accordance with MIL-H-38534. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition D or E. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to either DESC-EC or the acquiring activity upon request. Also, the test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1015 of MIL-STD-883. (2) Ty as specified in accordance with table I of method 1015 of MIL-STD-883. (3) Prior to burn-in all devices shall be programmed with a 00 hex data pattern to the entire memory array. The resulting pattern shall be verified before and after burn-in. Devices having bits not in the proper state after burn-in shall constitute a device failure and shall not be delivered. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. 4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with MIL-H-38534 and as specified herein. 4.3.1 Group A_inspection. Group A inspection shall be in accordance with MIL-H-38534 and as follows: a. Tests shall be as specified in table II herein. b. Subgroups 5 and 6 shall be omitted. c. Subgroups 7, 8A, and 8B shall include verification of the truth table on figure 3. d. The following data patterns shall be verified during subgroups 7, 8A, and 8B: (1) O's to all memory cell Locations. (2) 1's to all memory cell locations. (3) Checkerboard pattern to entire memory array. (4) Checkerboard compliment to entire memory array. 4.3.2 Group B inspection. Group B inspection shall be in accordance with MIL-H-38534. 4.3.3 Group C inspection. Group C inspection shall be in accordance with MIL-H-38534 and as follows: a. End-point electrical parameters shall be as specified in table II herein. b. All devices requiring end-point electrical testing shall be programmed with a checkerboard pattern of alternate rows of AA hex and 55 hex. c. Steady-state life test, method 1005 of MIL-STD-883. (1) Test condition B. The test circuit shalt be maintained by the manufacturer under document revision level control and shall be made available to either DESC-EC or the acquiring activity upon request. Also, the test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1005 of MIL-STD-883. (2) Ty as specified in accordance with table I of method 1005 of MIL~STD-883. (3) Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883. (4) The checkerboard data pattern shall be verified after burn-in as part of end-point electrical testing. STANDARDIZED SIZE 5962-93091 MILITARY DRAWING A DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 REVISION LEVEL SHEET 16 DESC FORM 193A JUL 91TABLE II. Electrical test requirements. MIL-H-38534 test requirements Subgroups Cin accordance with MIL-H-38534, group A test table) Interim electrical parameters 1,4, 9 Final electrical test parameters 1%, 2, 3, 4, 7, 8A, 8B, 9, 10, 11 Group A test requirements 1, 2, 3, 4, 7, 8A, 8B, 9, 10, 11 Group C end-point electrical parameters 1, 2, 3, 4, 7, 8A, 8B, 9, 10, 11 MIL-STD-883, Group E end point electrical parameters for RHA devices Subgroups ** Cin accordance with method 5005, group A test table) | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * PDA applies to subgroup 1. xk When applicable to this standardized military drawing, the subgroups shall be defined. 4.3.4 Group D inspection. Group D inspection shall be in accordance with MIL-H-38534. 4.3.5 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation hardness assured (see 3.5 herein). RHA levels for device classes H and K shall be M, 0, R, and H. RHA quality conformance inspection sample tests shall be performed at the RHA level specified in the acquisition document. a. RHA tests for device classes H and K for levels M, D, R, and H shall be performed through each Level to determine at what levels the devices meet the RHA requirements. These RHA tests shall be performed for initial qualification and after design or process changes which may affect the RHA performance of the device. b. End-point electrical parameters shall be as specified in table II herein. c. Prior to total dose irradiation, each selected sample shall be assembled in its qualified package. It shatl pass the specified group A electrical parameters in table I for subgroups specified in table II herein. d. For device classes H and K, the devices shall be subjected to radiation hardness assured tests as specified in MIL-H-38534 for RHA Level being tested, and meet the postirradiation end-point electrical parameter Limits as defined in table I at Ty = +25C 5 percent, after exposure. e. Prior to and during total dose irradiation testing, the devices shall be biased to establish a worst case condition as specified in the radiation exposure circuit. f. For device classes H and K, subgroups 1 and 2 in table V, method 5005 of MIL-STD-883 shall be tested as appropriate for device construction. g. When specified in the purchase order or contract, a copy of the RHA delta Limits shall be supplied. STANDARDIZED SIZE 5962-93091 MILITARY DRAWING A DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 REVISION LEVEL SHEET A 17 DESC FORM 193A JUL 915. PACKAGING 5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-H-38534. 6. NOTES 6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes. 6.2 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor-prepared specification or drawing. 6.3 Configuration control of SMD's. ALL proposed changes to existing SMD's will be coordinated with the users of record for the individual documents. This coordination will be accomplished in accordance with MIL-STD-481 using DD Form 1693, Engineering Change Proposal (Short Form). 6.4 Record of users. Military and industrial users shall inform Defense Electronics Supply Center when a system application requires configuration control and the applicable SMD. DESC will maintain a record of users and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronic devices (FSC 5962) should contact DESC-EC, telephone (513) 296-6047. 6.5 Comments. Comments on this drawing should be directed to DESC-EC, Dayton, Ohio 45444, or telephone (513) 296-5373. 6.6 One part - one part number system. The one part - one part number system described below has been developed to allow for transitions between identical generic devices covered by the four major microcircuit requirements documents (MIL-M-38510, MIL-H-38534, MIL-1I-38535, and 1.2.1 of MIL-STD-883) without the necessity for the generation of unique PIN's. The four military requirements documents represent different class Levels, and previously when a device manufacturer upgraded military product from one class Level to another, the benefits of the upgraded product were unavailable to the Original Equipment Manufacturer (OEM), that was contractually locked into the original unique PIN. By establishing a one part number system covering alt four documents, the OEM can acquire to the highest class level available for a given generic device to meet system needs without modifying the original contract parts selection criteria. Example PIN Manufacturing Document Military documentation format under new system source Listing Listing New MIL-M-38510 Military Detail 5962-XXXXXZZ2(B or S)YY QPL-38510 MIL-BUL-103 Specifications Cin the SMD format) (Part 1 or 2) New MIL-H-38534 Standardized Military 5962-XXXXXZZ(H or K)YY QML-38534 MIL-BUL-103 Drawings New MIL-1-38535 Standardized Military 5962-XXXXXZZ(Q or V)YY QML-38535 MIL-BUL-103 Drawings New 1.2.1 of MIL-STD-883 Standardized 5962-XXXXXZZ(M)YY MIL-BUL-103 MIL-BUL-103 Military Drawings 6.7 Sources of supply for device classes H and K. Sources of supply for device classes H and K are listed in QML-38534. The vendors Listed in QML-38534 have submitted a certificate of compliance (see 3.7 herein) to DESC-EC and have agreed to this drawing. STANDARDIZED SIZE 5962-93091 MILITARY DRAWING A DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 REVISION LEVEL SHEET 18 DESC FORM 193A JUL 91 39937