19-1849; Rev 1; 5/01 +3V/+5V, Serial-Input, Voltage-Output, 14-Bit DACs Features Miniature (3mm x 5mm) 8-Pin MAX Package Low 120A Supply Current Fast 1s Settling Time 25MHz SPI/QSPI/MICROWIRE-Compatible Serial Interface VREF Range Extends to VDD +5V (MAX5141/MAX5142) or +3V (MAX5143/MAX5144) Single-Supply Operation Full 14-Bit Performance Without Adjustments Unbuffered Voltage Output Directly Drives 60k Loads Power-On Reset Circuit Clears DAC Output to Code 0 (MAX5141/MAX5143) or Code 8192 (MAX5142/MAX5144) Schmitt-Trigger Inputs for Direct Optocoupler Interface Asynchronous CLR Pin Configurations TOP VIEW 8 GND REF 1 Applications High-Resolution and Gain Adjustment Industrial Process Control Automated Test Equipment Data-Acquisition Systems CS 2 SCLK 3 DIN MAX5141 MAX5143 4 7 VDD CS 2 SCLK 3 6 OUT 5 CLR 10 GND REF 1 9 VDD MAX5142 MAX5144 8 RFB DIN 4 7 INV CLR 5 6 OUT MAX MAX Ordering Information PART TEMP. RANGE PIN-PACKAGE INL (LSB) SUPPLY RANGE (V) OUTPUT SWING MAX5141EUA -40C to +85C 8 MAX 1 5 Unipolar MAX5142EUB -40C to +85C 10 MAX 1 5 Bipolar MAX5143EUA -40C to +85C 8 MAX 1 3 Unipolar MAX5144EUB -40C to +85C 10 MAX 1 3 Bipolar SPI and QSPI are trademarks of Motorola, Inc. MICROWIRE is a trademark of National Semiconductor Corp. ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com. 1 MAX5141-MAX5144 General Description The MAX5141-MAX5144 are serial-input, voltage-output, 14-bit digital-to-analog converters (DACs) in tiny MAX packages, 50% smaller than comparable DACs in an 8-pin SO. They operate from low +3V (MAX5143/ MAX5144) or +5V (MAX5141/MAX5142) single supplies. They provide 14-bit performance (1LSB INL and DNL) over temperature without any adjustments. The DAC output is unbuffered, resulting in a low supply current of 120A and a low offset error of 2LSBs. The DAC output range is 0V to VREF. For bipolar operation, matched scaling resistors are provided in the MAX5142/MAX5144 for use with an external precision op amp (such as the MAX400), generating a VREF output swing. A 16-bit serial word is used to load data into the DAC latch. The 25MHz, 3-wire serial interface is compatible with SPITM/QSPITM/MICROWIRETM, and can interface directly with optocouplers for applications requiring isolation. A power-on reset circuit clears the DAC output to code 0 (MAX5141/MAX5143) or code 8192 (MAX5142/ MAX5144) when power is initially applied. A logic low on CLR asynchronously clears the DAC output to code 0 (MAX5141/MAX5143) or code 8192 (MAX5142/MAX5144), independent of the serial interface. The MAX5141/MAX5143 are available in 8-pin MAX packages and the MAX5142/MAX5144 are available in 10-pin MAX packages. MAX5141-MAX5144 +3V/+5V, Serial-Input, Voltage-Output, 14-Bit DACs ABSOLUTE MAXIMUM RATINGS VDD to GND ..............................................................-0.3V to +6V CS, SCLK, DIN, CLR to GND ...................................-0.3V to +6V REF to GND................................................-0.3V to (VDD + 0.3V) OUT, INV to GND .....................................................-0.3V to VDD RFB to INV ...................................................................-6V to +6V RFB to GND.................................................................-6V to +6V Maximum Current into Any Pin............................................50mA Continuous Power Dissipation (TA = +70C) 8-Pin MAX (derate 4.5mW/C above +70C)...............362mW 10-Pin MAX (derate 5.6mW/C above +70C).............444mW Operating Temperature Ranges MAX514_ EUA ...................................................-40C to +85C MAX514_ EUB ...................................................-40C to +85C Storage Temperature Range .............................-65C to +150C Maximum Die Temperature..............................................+150C Lead Temperature (soldering, 10s) .................................+300C Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VDD = +3V (MAX5143/MAX5144) or +5V (MAX5141/MAX5142), VREF = +2.5V, TA = TMIN to TMAX, CL = 10pF, GND = 0, RL = , unless otherwise noted. Typical values are at TA = +25C.) PARAMETER SYMBOL CONDITIONS STATIC PERFORMANCE--ANALOG SECTION Resolution N Differential Nonlinearity MIN TYP MAX UNITS 1 LSB 14 Bits DNL Guaranteed monotonic 0.5 Integral Nonlinearity INL MAX514_ 0.5 Zero-Code Offset Error ZSE Zero-Code Tempco ZSTC ROUT Bipolar Resistor Matching ppm/C (Note 2) 6.2 k RFB/RINV 1 0.03 Ratio error 20 BZSTC Power-Supply Rejection PSR REFERENCE INPUT Reference Input Range VREF RREF LSB 0.1 Bipolar Zero Offset Error Reference Input Resistance (Note 4) ppm/C 10 Gain-Error Tempco Bipolar Zero Tempco LSB LSB 0.05 Gain Error (Note 1) DAC Output Resistance 1 2 0.5 1 +4.5V VDD +5.5V (MAX5141/MAX5142) 1 2.0 Unipolar mode 10 Bipolar mode 6 DYNAMIC PERFORMANCE--ANALOG SECTION Voltage-Output Slew Rate SR (Note 5) LSB ppm/C +2.7V VDD +3.3V (MAX5143/MAX5144) (Note 3) % VDD LSB V k 15 V/s Output Settling Time To 1/2LSB of FS 1 s DAC Glitch Impulse Major-carry transition 7 nV-s Digital Feedthrough Code = 0000 hex; CS = VDD; SCLK, DIN = 0V to VDD levels 0.2 nV-s 2 _______________________________________________________________________________________ +3V/+5V, Serial-Input, Voltage-Output, 14-Bit DACs (VDD = +3V (MAX5143/MAX5144) or +5V (MAX5141/MAX5142), VREF = +2.5V, TA = TMIN to TMAX, CL = 10pF, GND = 0, RL = , unless otherwise noted. Typical values are at TA = +25C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS DYNAMIC PERFORMANCE--REFERENCE SECTION Reference -3dB Bandwidth BW Reference Feedthrough Signal-to-Noise Ratio Reference Input Capacitance Code = 3FFF hex 1 MHz Code = 0000 hex, VREF = 1VP-P at 100kHz 1 mVP-P 92 dB SNR CINREF Code = 0000 hex 70 Code = 3FFF hex 170 pF STATIC PERFORMANCE--DIGITAL INPUTS Input High Voltage VIH Input Low Voltage VIL 2.4 0.8 V Input Current IIN 1 A Input Capacitance CIN 10 pF Hysteresis Voltage VH (Note 6) V 3 0.15 V POWER SUPPLY MAX5143/MAX5144 2.7 3.6 MAX5141/MAX5142 4.5 5.5 Positive Supply Range (Note 7) VDD Positive Supply Current IDD All digital inputs at VDD or GND Power Dissipation PD All digital inputs at VDD or GND 0.12 MAX5143/MAX5144 0.36 MAX5141/MAX5142 0.60 V 0.20 mA mW TIMING CHARACTERISTICS (VDD = +2.7V to +3.3V (MAX5143/MAX5144), VDD = +4.5V to +5.5V (MAX5141/MAX5142), VREF = +2.5V, GND = 0, CMOS inputs, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C.) (Figure 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 25 MHz SCLK Frequency fCLK SCLK Pulse Width High tCH 20 ns SCLK Pulse Width Low tCL 20 ns tCSS0 15 ns 15 ns 35 ns CS Low to SCLK High Setup CS High to SCLK High Setup tCSS1 SCLK High to CS Low Hold tCSH0 SCLK High to CS High Hold tCSH1 20 ns DIN to SCLK High Setup tDS 15 ns DIN to SCLK High Hold tDH 0 ns tCLW 20 ns CLR Pulse Width Low VDD High to CS Low (Power-Up Delay) (Note 6) 20 s Note 1: Gain error tested at VREF = +2.0V, +2.5V, and +3.0V (MAX5143/MAX5144) or VREF = +2.0V, +2.5V, +3.0V, and +5.0V (MAX5141/MAX5142). Note 2: ROUT tolerance is typically 20%. Note 3: Min/max range guaranteed by gain-error test. Operation outside min/max limits will result in degraded performance. Note 4: Reference input resistance is code dependent, minimum at 2155 hex in unipolar mode, 1155 hex in bipolar mode. Note 5: Slew-rate value is measured from 10% to 90%. Note 6: Guaranteed by design. Not production tested. Note 7: Guaranteed by power-supply rejection test and Timing Characteristics. _______________________________________________________________________________________ 3 MAX5141-MAX5144 ELECTRICAL CHARACTERISTICS (continued) Typical Operating Characteristics (VDD = +3V (MAX5143/MAX5144) or +5V (MAX5141/MAX5142), VREF = +2.5V, TA = TMIN to TMAX, GND = 0, RL = , unless otherwise noted. Typical values are at TA = +25C.) 0.075 0.050 0.025 0.09 0.08 0.07 0.06 -15 10 35 60 ZERO-CODE OFFSET ERROR vs. TEMPERATURE INTEGRAL NONLINEARITY vs. TEMPERATURE MAX5141 toc04 0.6 +INL 0 -0.1 -0.2 10 35 60 85 10 35 60 -0.20 -0.25 -0.30 10 35 TEMPERATURE (C) 60 85 -15 10 35 60 85 TEMPERATURE (C) INTEGRAL NONLINEARITY vs. CODE MAX5141 toc08 0.8 0.3 0.6 0.2 0.4 0.1 0.2 0.0 -0.1 MAX5141 toc09 1.0 0.4 0.0 -0.2 -0.2 -0.4 -0.3 -0.6 -0.4 -0.8 -1.0 -0.5 -15 -40 85 INL (LSB) DNL (LSB) -0.15 3.0 -DNL DIFFERENTIAL NONLINEARITY vs. CODE -0.10 2.5 -0.4 -15 0.5 MAX5141 toc07 -0.05 2.0 -0.1 -0.3 -INL -40 GAIN ERROR vs. TEMPERATURE 1.5 +DNL TEMPERATURE (C) 0 1.0 -0.2 TEMPERATURE (C) -40 MAX5141/44 toc03 0.1 -0.4 -15 0.5 0.2 DNL (LSB) INL (LSB) 0.2 0 -0.2 4 0 0 0.4 -40 VDD = +3V DIFFERENTIAL NONLINEARITY vs. TEMPERATURE 0.8 0.2 0.1 0.07 REFERENCE VOLTAGE (V) REFERENCE VOLTAGE (V) 0.3 0.08 0.05 TEMPERATURE (C) 0.4 0.09 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 85 MAX5141 toc05 -40 0.10 0.06 VDD = +5V 0.05 0 OFFSET ERROR (LSB) 0.10 0.11 MAX5141 toc06 VDD = +3V 0.11 0.12 SUPPLY CURRENT (mA) 0.100 MAX5141/44 toc02 VDD = +5V 0.12 SUPPLY CURRENT (mA) SUPPLY CURRENT (mA) MAX5141/44 toc01 0.150 0.125 SUPPLY CURRENT vs. REFERENCE VOLTAGE SUPPLY CURRENT vs. REFERENCE VOLTAGE SUPPLY CURRENT vs. TEMPERATURE GAIN ERROR (LSB) MAX5141-MAX5144 +3V/+5V, Serial-Input, Voltage-Output, 14-Bit DACs 0 2.50k 5.00k 7.50k 10.00k 12.50k 15.00k 0 2.50k 5.00k 7.50k 10.00k 12.50k 15.00k CODE _______________________________________________________________________________________ CODE +3V/+5V, Serial-Input, Voltage-Output, 14-Bit DACs REFERENCE CURRENT vs. DIGITAL INPUT CODE FULL-SCALE STEP RESPONSE (FALLING) 120 100 MAX5141/44 toc12 CS 2V/div CS 2V/div AOUT 2V/div AOUT 2V/div 80 60 40 20 CL = 20pF CL = 20pF 0 0 5k 10k INPUT CODE 15k 20k 400ns/div 400ns/div MAJOR-CARRY GLITCH (FALLING) MAJOR-CARRY GLITCH (RISING) DIGITAL FEEDTHROUGH MAX5141/44 toc15 MAX5141/44 toc14 MAX5141/44 toc13 CS 1V/div CS 1V/div DIN 2V/div AOUT 10mV/div AOUT 20mV/div AOUT 20mV/div CL = 20pF CL = 20pF 50ns/div 200ns/div 200ns/div INTEGRAL NONLINEARITY vs. REFERENCE VOLTAGE UNIPOLAR POWER-ON GLITCH (REF = VDD) MAX5141/44 toc17 MAX5141 toc16 0.70 0.65 VDD 2V/div 0.60 INL (LSB) REFERENCE CURRENT (A) MAX5141/44 toc11 MAX5141 toc10 140 FULL-SCALE STEP RESPONSE (RISING) 0.55 0.50 VOUT 10mV/div 0.45 0.40 2.0 2.5 3.0 3.5 4.0 4.5 5.0 50ms/div REFERENCE VOLTAGE (V) _______________________________________________________________________________________ 5 MAX5141-MAX5144 Typical Operating Characteristics (continued) (VDD = +3V (MAX5143/MAX5144) or +5V (MAX5141/MAX5142), VREF = +2.5V, TA = TMIN to TMAX, GND = 0, RL = , unless otherwise noted. Typical values are at TA = +25C.) +3V/+5V, Serial-Input, Voltage-Output, 14-Bit DACs MAX5141-MAX5144 Pin Descriptions PIN MAX5142 MAX5144 NAME 1 1 REF Voltage Reference Input 2 2 CS Chip-Select Input 3 3 SCLK 4 4 DIN Serial Data Input Clear Input. Logic low asynchronously clears the DAC to code 0 (MAX5141/MAX5143) or code 8192 (MAX5142/MAX5144). MAX5141 MAX5143 FUNCTION Serial Clock Input. Duty cycle must be between 40% and 60%. 5 5 CLR 6 6 OUT DAC Output Voltage INV Junction of Internal Scaling Resistors. Connect to external op amp's inverting input in bipolar mode. -- 7 -- 8 RFB Feedback Resistor. Connect to external op amp's output in bipolar mode. 7 9 VDD Supply Voltage. Use +3V for MAX5143/MAX5144 and +5V for MAX5141/MAX5142. 8 10 GND Ground ;;;;;;;;; ;; ;;;;;; tCSH1 tLDACS CS tCSHO tCSSO tCH tCSS1 tCL SCLK tDH tDS DIN D13 D12 S0 Figure 1. Timing Diagram 6 _______________________________________________________________________________________ +3V/+5V, Serial-Input, Voltage-Output, 14-Bit DACs MAX5141-MAX5144 +2.5V MAX6166 +3V/+5V 1F 0.1F 0.1F PCS0 CS MOSI DIN SCLK SCLK IC1 (GND) REF VDD MC68XXXX CLR UNIPOLAR OUT MAX495 MAX5141 MAX5142 MAX5143 MAX5144 OUT EXTERNAL OP AMP GND Figure 2a. Typical Operating Circuit--Unipolar Output MAX6166 +3V/+5V +2.5V 1F 0.1F 0.1F +5V MC68XXXX VDD PCS0 CS MOSI DIN SCLK SCLK IC1 RFB REF CLR RINV RFB INV MAX400 OUT MAX5142 MAX5144 BIPOLAR OUT EXTERNAL OP AMP -5V (GND) GND Figure 2b. Typical Operating Circuit--Bipolar Output Detailed Description The MAX5141-MAX5144 voltage-output, 14-bit digitalto-analog converters (DACs) offer full 14-bit performance with less than 1LSB integral linearity error and less than 1LSB differential linearity error, thus ensuring monotonic performance. Serial data transfer minimizes the number of package pins required. The MAX5141-MAX5144 are composed of two matched DAC sections, with a 10-bit inverted R-2R DAC forming the ten LSBs and the four MSBs derived from 15 identically matched resistors. This architecture allows the lowest glitch energy to be transferred to the DAC output on major-carry transitions. It also lowers the DAC output impedance by a factor of eight compared _______________________________________________________________________________________ 7 MAX5141-MAX5144 +3V/+5V, Serial-Input, Voltage-Output, 14-Bit DACs to a standard R-2R ladder, allowing unbuffered operation in medium-load applications. The MAX5142/MAX5144 provide matched bipolar offset resistors, which connect to an external op amp for bipolar output swings (Figure 2b). applied. This ensures that unwanted DAC output voltages will not occur immediately following a system power-up, such as after a loss of power. Digital Interface The MAX5141-MAX5144 operate with external voltage references from +2V to VDD, and maintain 14-bit performance if certain guidelines are followed when selecting and applying the reference. Ideally, the reference's temperature coefficient should be less than 0.5ppm/C to maintain 14-bit accuracy to within 1LSB over the -40C to +85C extended temperature range. Since this converter is designed as an inverted R-2R voltage-mode DAC, the input resistance seen by the voltage reference is code dependent. In unipolar mode, the worst-case input-resistance variation is from 11.5k (at code 2155 hex) to 200k (at code 0000 hex). The maximum change in load current for a +2.5V reference is +2.5V / 11.5k = 217A; therefore, the required load regulation is 28ppm/mA for a maximum error of 0.1LSB. This implies a reference output impedance of less than 72m. In addition, the signal-path impedance from the voltage reference to the reference input must be kept low because it contributes directly to the load-regulation error. The MAX5141-MAX5144 digital interface is a standard 3-wire connection compatible with SPI/QSPI/ MICROWIRE interfaces. The chip-select input (CS) frames the serial data loading at the data-input pin (DIN). Immediately following CS's high-to-low transition, the data is shifted synchronously and latched into the input register on the rising edge of the serial clock input (SCLK). After 16 bits (14 data bits, plus two subbits set to zero) have been loaded into the serial input register, it transfers its contents to the DAC latch on CS's low-tohigh transition (Figure 3). Note that if CS is not kept low during the entire 16 SCLK cycles, data will be corrupted. In this case, reload the DAC latch with a new 16-bit word. Clearing the DAC A 20ns (min) logic low pulse on CLR asynchronously clears the DAC buffer to code 0 in the MAX5141/ MAX5143 and to code 8192 in the MAX5142/MAX5144. External Reference The MAX5141-MAX5144 operate with external voltage references from +2V to VDD. The reference voltage determines the DAC's full-scale output voltage. Power-On Reset The power-on reset circuit sets the output of the MAX5141/MAX5143 to code 0 and the output of the MAX5142/MAX5144 to code 8192 when V DD is first Applications Information Reference and Ground Inputs The requirement for a low-impedance voltage reference is met with capacitor bypassing at the reference inputs and ground. A 0.1F ceramic capacitor with short leads between REF and GND provides high-frequency bypassing. A surface-mount ceramic chip capacitor is preferred because it has the lowest inductance. An additional 1F between REF and GND provides low-frequency bypassing. A low-ESR tantalum, film, or organic semiconductor capacitor works well. Leaded capacitors are acceptable because impedance is not as criti- ; ; ;; CS DAC UPDATED SCLK SUB-BITS DIN D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 S1 S0 MSB LSB Figure 3. MAX5141-MAX5144 3-Wire Interface Timing Diagram 8 _______________________________________________________________________________________ +3V/+5V, Serial-Input, Voltage-Output, 14-Bit DACs Unbuffered Operation Unbuffered operation reduces power consumption as well as offset error contributed by the external output buffer. The R-2R DAC output is available directly at OUT, allowing 14-bit performance from +VREF to GND without degradation at zero scale. The DAC's output impedance is also low enough to drive medium loads (RL > 60k) without degradation of INL or DNL; only the gain error is increased by externally loading the DAC output. External Output Buffer Amplifier The requirements on the external output buffer amplifier change whether the DAC is used in unipolar or bipolar operational mode. In unipolar mode, the output amplifier is used in a voltage-follower connection. In bipolar mode (MAX5142/MAX5144 only), the amplifier operates with the internal scaling resistors (Figure 2b). In each mode, the DAC's output resistance is constant and is independent of input code; however, the output amplifier's input impedance should still be as high as possible to minimize gain errors. The DAC's output capacitance is also independent of input code, thus simplifying stability requirements on the external amplifier. In bipolar mode, a precision amplifier operating with dual power supplies (such as the MAX400) provides the VREF output range. In single-supply applications, precision amplifiers with input common-mode ranges including GND are available; however, their output swings do not normally include the negative rail (GND) without significant degradation of performance. A single-supply op amp, such as the MAX495, is suitable if the application does not use codes near zero. Since the LSBs for a 14-bit DAC are extremely small (152.6V for VREF = +2.5V), pay close attention to the external amplifier's input specification. The input offset voltage can degrade the zero-scale error and might require an output offset trim to maintain full accuracy if the offset voltage is greater than 1/2LSB. Similarly, the input bias current multiplied by the DAC output resistance (typically 6.25k) contributes to zero-scale error. Temperature effects also must be taken into consideration. Over the -40C to +85C extended temperature range, the offset voltage temperature coefficient (referenced to +25C) must be less than 0.95V/C to add less than 1/2LSB of zero-scale error. The external amplifier's input resistance forms a resistive divider with the DAC output resistance, which results in a gain error. To contribute less than 1/2LSB of gain error, the input resistance typically must be greater than: 6.25k x 215 = 205M The settling time is affected by the buffer input capacitance, the DAC's output capacitance, and PC board capacitance. The typical DAC output voltage settling time is 1s for a full-scale step. Settling time can be significantly less for smaller step changes. Assuming a single time-constant exponential settling response, a full-scale step takes 10.4 time constants to settle to within 1/2LSB of the final output voltage. The time constant is equal to the DAC output resistance multiplied by the total output capacitance. The DAC output capacitance is typically 10pF. Any additional output capacitance increases the settling time. The external buffer amplifier's gain-bandwidth product is important because it increases the settling time by adding another time constant to the output response. The effective time constant of two cascaded systems, each with a single time-constant response, is approximately the root square sum of the two time constants. The DAC output's time constant is 1s / 10.4 = 96ns, ignoring the effect of additional capacitance. If the time constant of an external amplifier with 1MHz bandwidth is 1 / 2 (1MHz) = 159ns, then the effective time constant of the combined system is: 2 2 (96ns) + (159ns) = 186ns This suggests that the settling time to within 1/2LSB of the final output voltage, including the external buffer amplifier, will be approximately 10.4 186ns = 1.93s. Digital Inputs and Interface Logic The digital interface for the 14-bit DAC is based on a 3-wire standard that is compatible with SPI, QSPI, and MICROWIRE interfaces. The three digital inputs (CS, DIN, and SCLK) load the digital input data serially into the DAC. A 20ns (min) logic low pulse to CLR clears the data in the DAC buffer. All of the digital inputs include Schmitt-trigger buffers to accept slow-transition interfaces. This means that optocouplers can interface directly to the MAX5141- MAX5144 without additional external logic. The digital inputs are compatible with TTL/CMOS-logic levels. _______________________________________________________________________________________ 9 MAX5141-MAX5144 cal at lower frequencies. The circuit can benefit from even larger bypassing capacitors, depending on the stability of the external reference with capacitive loading. MAX5141-MAX5144 +3V/+5V, Serial-Input, Voltage-Output, 14-Bit DACs Unipolar Configuration Table 1. Unipolar Code Table Figure 2a shows the MAX5141-MAX5144 configured for unipolar operation with an external op amp. The op amp is set for unity gain, and Table 1 lists the codes for this circuit. Bipolar MAX5142/MAX5144 can also be used in unipolar configuration by connecting RFB and INV to REF. This allows the DAC to power up to midscale. DAC LATCH CONTENTS MSB Bipolar Configuration Figure 2b shows the MAX5141-MAX5144 configured for bipolar operation with an external op amp. The op amp is set for unity gain with an offset of -1/2VREF. Table 2 shows the offset binary codes for this circuit (less than 0.25 inches). ANALOG OUTPUT, VOUT LSB 1111 1111 1111 11 VREF (16,383 / 16,384) 1000 0000 0000 00 VREF (8192 / 16,384) = 1/2VREF 0000 0000 0000 01 VREF (1 / 16,384) Table 2. Bipolar Code Table DAC LATCH CONTENTS MSB ANALOG OUTPUT, VOUT LSB Power-Supply Bypassing and Ground Management 1111 1111 1111 11 +VREF (8191 / 8192) 1000 0000 0000 01 +VREF (1 / 8192) Bypass VDD with a 0.1F ceramic capacitor connected between VDD and GND. Mount the capacitor with short leads close to the device (less than 0.25 inches). 1000 0000 0000 00 0V 0111 1111 1111 11 -VREF (1 / 8192) 0000 0000 0000 00 -VREF (8192 / 8192) = -VREF Functional Diagrams VDD VDD MAX5141 MAX5143 REF REF 14-BIT DAC CS SCLK DIN RFB INV MAX5142 MAX5144 OUT 14-BIT DATA LATCH 14-BIT DAC CS SCLK DIN CONTROL LOGIC SERIAL INPUT REGISTER CLR GND 14-BIT DATA LATCH CONTROL LOGIC SERIAL INPUT REGISTER CLR GND Chip Information TRANSISTOR COUNT: 2800 PROCESS: BiCMOS 10 ______________________________________________________________________________________ OUT +3V/+5V, Serial-Input, Voltage-Output, 14-Bit DACs 8LUMAXD.EPS ______________________________________________________________________________________ 11 MAX5141-MAX5144 ________________________________________________________Package Information +3V/+5V, Serial-Input, Voltage-Output, 14-Bit DACs 10LUMAX.EPS MAX5141-MAX5144 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 _____________________12 (c) 2001 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products. MAX5141-MAX5144 Package Information (continued)