ASM3P18S19B
Notebook LCD Panel
EMI Reduction IC
©2010 SCILLC. All rights reserved. Publication Order Number:
JANUARY 2010 Rev. 3 ASM3P18S19/D
Features
FCC approved method of EMI attenuation.
Provides up to 15dB EMI reduction.
Generates a low EMI Spread Spectrum clock and a
non-spread reference clock of the input frequency.
Optimized for Frequency range from 20 to 40MHz.
Internal loop filter minimizes external components and
board space.
Low Inherent Cycle-to-Cycle jitter.
Two spread % selections: -1.25% to -1.75%.
3.3V Operating Voltage.
Low power CMOS design.
Supports notebook VGA and other LCD timing
controller applications.
Power Down function for mobile application.
Available in Commercial temperature range.
Available in 8-pin SOIC and TSSOP Packages.
RoHS Compliant
Product Description
The ASM3P18S19B is a Versatile Spread Spectrum
Frequency Modulator designed specifically for input clock
frequencies from 20 to 40MHz. (Refer to Input Frequency
and Modulation Rate Table). The ASM3P18S19B reduces
electromagnetic interference (EMI) at the clock source,
allowing system wide reduction of EMI of down stream
clock and data dependent signals. The ASM3P18S19B
allows significant system cost savings by reducing the
number of circuit board layers, ferrite beads, shielding, and
other passive components that are traditionally required to
pass EMI regulations.
The ASM3P18S19B modulates the output of a single PLL
in order to “spread” the bandwidth of a synthesized clock,
and more importantly, decreases the peak amplitudes of its
harmonics. This results in significantly lower system EMI
compared to the typical narrow band signal produced by
oscillators and most frequency generators. Lowering EMI
by increasing a signal‟s bandwidth is called „Spread
Spectrum Clock Generation‟.
The ASM3P18S19B uses the most efficient and optimized
modulation profile approved by the FCC and is
implemented in a proprietary all digital method.
Applications
The ASM3P18S19B is targeted towards EMI management
for memory and LVDS interfaces in mobile graphic chipsets
and high-speed digital applications such as PC peripheral
devices, consumer electronics, and embedded controller
systems.
Block Diagram
VSS
VDD
ModOUT
XIN/CLKIN
Frequency
Divider
Modulation
Phase
Detector
Loop
Filter
VCO
PLL
SRS
PD#
Crystal
Oscillator
XOUT
REF
ASM3P18S19B
Rev. 3 | Page 2 of 7 | www.onsemi.com
VDD
PD#
XOUT
REF
1
2
3
4
5
6
7
8
ASM3P18S19B
XIN/ CLKIN
VSS
SRS
ModOUT
Pin Configuration
Pin Description
Pin#
Pin Name
Type
Description
1
XIN / CLKIN
I
Crystal Connection or external frequency input.This pin has dual
functions. It can be connected to either an external crystal or an external
reference clock.
2
VSS
P
Ground Connection. Connect to system ground.
3
SRS
I
Spread range select. Digital logic input used to select frequency deviation
(Refer to Spread Deviation Selection Table). This pin has an internal pull-
up resistor.
4
ModOUT
O
Spread spectrum clock output. (Refer to Input Frequency and Modulation
Rate Table and Spread Deviation Selection Table)
5
REF
O
Non-modulated Reference clock output of the input frequency.
6
PD#
I
Power down control pin. Pull LOW to enable Power-Down mode. This pin
has an internal pull-up resistor.
7
VDD
P
Power Supply for the entire chip.
8
XOUT
O
Crystal Connection. Input connection for an external crystal. If using an
external reference, this pin must be left unconnected.
Input Frequency and Modulation Rate
Part Number
Input Frequency Range
Output Frequency range
Modulation rate
ASM3P18S19B
20MHz to 40MHz
20MHz to 40MHz
Input Frequency / 512
Spread Deviation Selection
Part Number
SRS
Spread Deviation
ASM3P18S19B
0
-1.25% (DOWN)
1
-1.75% (DOWN)
ASM3P18S19B
Rev. 3 | Page 3 of 7 | www.onsemi.com
Absolute Maximum Ratings
Symbol
Parameter
Rating
Unit
VDD, VIN
Voltage on any pin with respect to Ground
-0.5 to +4.6
V
TSTG
Storage temperature
-65 to +125
°C
TA
Operating temperature
0 to +70
°C
Ts
Max. Soldering Temperature (10 sec)
260
°C
TJ
Junction Temperature
150
°C
TDV
Static Discharge Voltage (As per JEDEC STD22- A114-B)
2
KV
Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect
device reliability.
DC Electrical Characteristics
(Test condition: All parameters are measured at room temperature (+25°C) unless otherwise stated.)
Symbol
Parameter
Min
Typ
Max
Unit
VIL
Input Low voltage
VSS - 0.3
-
0.8
V
VIH
Input High voltage
2.0
-
VDD + 0.3
V
IIL
Input Low current (inputs PD#, SRS)
-60.0
-
-20.0
µA
IIH
Input High current
-
-
1.0
µA
IXOL
XOUT Output low current @ 0.4V, VDD = 3.3V
-
3
-
mA
IXOH
XOUT Output high current @ 2.5V, VDD = 3.3V
-
3
-
mA
VOL
Output Low voltage VDD = 3.3V, IOL = 20mA
-
-
0.4
V
VOH
Output High voltage VDD = 3.3V, IOH = 20mA
2.5
-
-
V
ICC
Dynamic supply current normal mode
3.3V and 25pF probe loading
7.1
fIN - min
-
26.9
fIN - max
mA
IDD
Static supply current standby mode
-
4.5
-
mA
VDD
Operating Voltage
-
3.3
-
V
tON
Power up time (first locked clock cycle after power up)
-
0.18
-
mS
ZOUT
Clock Output impedance
-
50
-
AC Electrical Characteristics
Symbol
Parameter
Min
Typ
Max
Unit
fIN
Input Frequency
20
-
40
MHz
fOUT
Output Frequency
20
-
40
MHz
tLH*
Output Rise time
Measured from 0.8V to 2.0V
-
0.66
-
nS
tHL*
Output Fall time
Measured from 0.8V to 2.0V
-
0.65
-
nS
tJC
Jitter (Cycle to cycle)
-200
-
200
pS
tD
Output Duty cycle
45
50
55
%
*tLH and tHL are measured into a capacitive load of 15pF
ASM3P18S19B
Rev. 3 | Page 4 of 7 | www.onsemi.com
Package Information
8-lead (150-mil) SOIC Package
Symbol
Dimensions
Inches
Millimeters
Min
Max
Min
Max
A1
0.004
0.010
0.10
0.25
A
0.053
0.069
1.35
1.75
A2
0.049
0.059
1.25
1.50
B
0.012
0.020
0.31
0.51
C
0.007
0.010
0.18
0.25
D
0.193 BSC
4.90 BSC
E
0.154 BSC
3.91 BSC
e
0.050 BSC
1.27 BSC
H
0.236 BSC
6.00 BSC
L
0.016
0.050
0.41
1.27
θ
Package length (Excluding end flash) D - 188 ~ 193 mils.
Package length (Including end flash) D1 - 198 ~ 207 mils.
ASM3P18S19B
Rev. 3 | Page 5 of 7 | www.onsemi.com
E
H
A
A1
A2
D
B
C
L
e
8-lead TSSOP (4.40-MM Body)
Symbol
Dimensions
Inches
Millimeters
Min
Max
Min
Max
A
0.043
1.10
A1
0.002
0.006
0.05
0.15
A2
0.033
0.037
0.85
0.95
B
0.008
0.012
0.19
0.30
C
0.004
0.008
0.09
0.20
D
0.114
0.122
2.90
3.10
E
0.169
0.177
4.30
4.50
e
0.026 BSC
0.65 BSC
H
0.252 BSC
6.40 BSC
L
0.020
0.028
0.50
0.70
θ
Note: Controlling dimensions are millimeters
TSSOP 0.0325 grams unit weight
ASM3P18S19B
Rev. 3 | Page 6 of 7 | www.onsemi.com
Ordering Information
Part Number
Marking
Package Type
Temperature
ASM3P18S19BF-08TT
3P18S19BF
8-Pin TSSOP, TUBE, Pb Free
Commercial
ASM3P18S19BF-08TR
3P18S19BF
8-Pin TSSOP, TAPE & REEL , Pb Free
Commercial
P3P18S19BF-08ST
3P18S19BF
8-Pin SOIC, TUBE, Pb Free
Commercial
P3P18S19BF-08SR
3P18S19BF
8-Pin SOIC, TAPE & Pb Free
Commercial
ASM3P18S19BG-08TT
3P18S19BG
8-Pin TSSOP, TUBE, Green
Commercial
ASM3P18S19BG-08TR
3P18S19BG
8-Pin TSSOP, TAPE & REEL, Green
Commercial
ASM3P18S19BG-08ST
3P18S19BG
8-Pin SOIC, TUBE, Green
Commercial
ASM3P18S19BG-08SR
3P18S19BG
8-Pin SOIC, TAPE & REEL, Green
Commercial
Products are available for industrial temperature range operation. Please contact factory for more information.
Device Ordering Information
A S M 3 P 1 8 S 1 9 B F - 0 8 T R
Licensed under US patent #5,488,627, #6,646,463 and #5,631,920.
O = SOT U = MSOP
S = SOIC E = TQFP
T = TSSOP L = LQFP
A = SSOP U = MSOP
V = TVSOP P = PDIP
B = BGA D = QSOP
Q = QFN X = SC-70
DEVICE PIN COUNT
X= Automotive I= Industrial P or n/c = Commercial
(-40C to +125C) (-40C to +85C) (0C to +70C)
1 = Reserved 6 = Power Management
2 = Non PLL based 7 = Power Management
3 = EMI Reduction 8 = Power Management
4 = DDR support products 9 = Hi Performance
5 = STD Zero Delay Buffer 0 = Reserved
ON Semiconductor Mixed Signal Product
PART NUMBER
F = LEAD FREE AND RoHS COMPLIANT PART
G = GREEN PACKAGE, LEAD FREE, and RoHS
R = Tape & Reel, T = Tube or Tray
ASM3P18S19B
Note: This product utilizes US Patent # 6,646,463 Impedance Emulator Patent issued to PulseCore Semiconductor, dated 11-11-2003
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without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
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including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
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