November 1999
1999 Fairc hild S emi c onduc tor Corporation FDP8030L Rev C(W)
FDP8030L/FDB8030L
N-Channel Logic Level PowerTrench MOSFET
General Description
This N-Channel Logic level MOSFET has been
designed specifical ly to improve t he overal l efficienc y of
DC/DC converters using either synchronous or
conventional switching PWM controllers.
These MOSFETS feature faster switching and lower
gate charge than other MOSFETS with comparable
RDS(on) specifications.
The result is a MOSFET that is easy and safer to drive
(even at very high frequencies), and DC/DC power
supply desi gns with hi gher overal l efficiency.
Features
• 80 A, 30 V. RDS(ON) = 0.0035 Ω @ VGS = 10 V
RDS(ON) = 0.0045 Ω @ VGS = 4.5 V
• Critic al DC elect ric al param eters specified at
elevated tem perature
• Rugged internal s ource-drain di ode can el iminate the
need for an external Zener diode transient
suppressor
• High performanc e trenc h technology for extremely
low RDS(ON)
• 175°C maximum junction temperature rating
S
GDTO-220
FDP Series
D
GSTO-263AB
FDB Series S
D
G
Absolute Maximum Ratings TA=25oC unless otherwise noted
Symbol Parameter Ratings Units
VDSS Drain-Sourc e V oltage 30 V
VGSS Gate-Source Voltage ±20 V
IDDrain Current – Continuous (Note 1) 80 A
– Pulsed (Note 1) 300
PDTotal Power Dissipation @# TC = 25°C187 W
Derate above 25°C1.25 W°C
TJ, TSTG Operating and Storage Junction Temperature Range -65 to +175 °C
TLMaximum lead temperature f or sol deri ng purposes,
1/8” from case for 5 seconds 275 °C
Thermal Characteristics
RθJC Thermal Resistance, Junction-to-Cas e 0.8 °C/W
RθJA Thermal Resistance, Junction-to-Am bient 62.5 °C/W
FDP8030L/FDB8030L
FDP8030L Rev C(W )
Electrical Characteristics TA = 25°C unless otherwise noted
Symbol Parameter Test Conditions Min Typ Max Units
Drain-Sou rce Avalanche Ratings (Note 1)
WDSS Single Pulse Drain-Source
Avalanche Energy VDD = 20 V, ID = 80 A 1500 mJ
IAR Maximum Drain-Sourc e Avalanche
Current 80 A
Off Characteristics
BVDSS Drain–Source Breakdown Voltage VGS = 0 V, ID = 250 µA30 V
∆BVDSS
∆TJ
Breakdown Voltage Temperature
Coefficient ID = 250 µA, Referenced to 25°C23 mV/°C
IDSS Zero Gate Voltage Drain Current VDS = 24 V, VGS = 0 V 10 µA
IGSSF Gate–Body Leakage, Forward VGS = 20 V, VDS = 0 V 100 nA
IGSSR Gate–Body Leak age, Reverse VGS = –20 V VDS = 0 V –100 nA
On Characteristics (Note 2)
VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA11.52 V
∆VGS(th)
∆TJ
Gate Threshold Voltage
Temperature Coeffic i ent ID = 250 µA, Referenc ed to 25°C–5 mV/°C
VGS = 10 V, ID = 80 A
TJ=125°C3.1
4.0 3.5
5.6 mΩ
RDS(on) Static Drain–S ource
On–Resistance VGS = 4.5 V, ID = 70 A 3.6 4.5
ID(on) On–State Drain Current VGS = 10 V, VDS = 10 V 60 A
gFS Forward Transconductance VDS = 10 V, ID = 80 A 170 S
Dynamic Characteristics
Ciss Input Capacitance 10500 pF
Coss Output Capacitance 2700 pF
Crss Reverse Transfer Capacitance
VDS = 15 V, V GS = 0 V,
f = 1.0 MHz 1650 pF
Switching Characteristics (Note 2)
tD(on) Turn–On Delay Time 20 35 ns
trTurn–On Rise Time 185 225 ns
tD (off) Turn–Off Delay Time 160 200 ns
tfTurn–Off Fall Ti me
VDD = 15 V, ID = 50 A,
VGS = 4.5 V, RGEN = 10 Ω
RGS = 10 Ω
200 240 ns
QgTotal Gate Charge 120 170 nC
Qgs Gate–Source Charge 27 nC
Qgd Gate–Drain Charge
VDS = 15 V,
ID = 80 A, VGS = 5 V
48 nC
Drain–Source Diode Characteristics and Maximum Ratings
ISMaximum Continuous Drai n–S ource Diode Forward Current (Note 1) 80 A
ISM Maximum Pulsed Drain-S ource Diode Forward Current (Note 1) 300 A
VSD Drain–Source Di ode Forward Volt age VGS = 0 V, IS = 80 A (Note 1) 11.3 V
Notes:
1. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
FDP8030L Rev C(W )
Typical Characteristics
0 0.5 1 1.5 2
0
20
40
60
80
100
V , DRAIN-SOURCE VOLTAGE (V)
I , DRAIN-SOURCE CURRENT (A)
3.5V
2.5V
4.5V
DS
D
3.0V
0 20406080100120
0.5
1
1.5
2
2.5
3
I , DRAIN CURRENT (A)
DRAIN-SOURCE ON-RESISTANCE
V = 2.5V
GS
10V
3.5V 4.5V
D
6.0V
3.0V
R , NORMALIZED
DS(ON)
Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
-50 -25 0 25 50 75 100 125 150
0.6
0.8
1
1.2
1.4
1.6
T , JUNCTION TEMPERATURE (°C)
DRAIN-SOURCE ON-RESISTANCE
J
R , NORMALIZED
DS(ON)
V = 10V
GS
I = 80A
D
0
0.001
0.002
0.003
0.004
0.005
0.006
0.007
0.008
0.009
0.01
2345678
VGS, GATE T O SO URCE VOLT AGE ( V )
RDS(ON), ON-RESISTANCE (OHM)
ID = 40A
TA = 125oC
TA = 25oC
Figure 3. On-Resistance Variation with
Temperature. Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
1234
0
10
20
30
40
50
60
V , GATE TO S O UR CE VO LTAGE ( V )
I , DRA IN CURREN T (A)
GS
25°C
125°C
V = 10V
DS
D
T = -55°C
A
0 0.2 0.4 0.6 0.8 1 1.2 1.4
0.0001
0.001
0.01
0.1
1
10
60
V , BODY DIODE FORWARD VOLTAGE (V)
I , REVERSE DRAIN CURRENT (A)
T = 125° C
A
25°C
-55°C
V = 0V
GS
SD
S
Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDP8030L/FDB8030L
FDP8030L Rev C(W )
Typical Characteristics
0 40 80 120 160 200 240
0
2
4
6
8
10
Q , GATE CHARGE (nC)
V , GATE-SOURCE VOLTAGE (V)
g
GS
I = 80A
DV = 5V
DS 10V
15V
0.1 0.5 1 2 5 10 30
500
1000
2000
5000
10000
18000
V , DRAIN TO SOURCE VOLTAGE (V)
CAPACITANCE (pF)
DS
V = 0V
GS
C
oss
C
rss
C
iss
Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics.
0.3 1 3 5 10 20 30 50
0.5
1
2
5
10
20
50
100
300
600
V , DRAIN-SOURCE VOLTAGE (V)
I , DRAIN CURRENT (A)
DS
D
100µs
1ms
10ms
100ms
DC
R Limit
DS(ON)
V = 10V
SINGLE PULSE
R = 0.8 °C/W
T = 25 °C
GS
θJC
C
0.1 0.3 1 3 10 30 100 300 1,000
0
1000
2000
3000
4000
5000
SINGLE PULSE TIME (mSEC)
POW E R (W )
SINGLE PULSE
R = 0.8°C/W
T = 25 °C
θJC
C
Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum
Power Dissipation.
0.01 0.05 0.1 0.5 1 5 10 50 100 500 1000
0.005
0.02
0.03
0.05
0.1
0.2
0.3
0.5
1
t ,TIME (ms)
TRANSIENT THERMAL RESISTANCE
Singl e Pulse
D = 0. 5
0.1
0.05
0.02
0.01
0.2
r(t), NORMA LIZE D EF F E CTI V E
1
Duty Cycle, D = t /t
12
R (t) = r(t) * R
R = 0.8 °C/W
θJC
θJC
θJC
T - T = P * R (t)
θJC
CJ
P(pk)
t
1 t
2
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.
FDP8030L/FDB8030L
TRADEMARKS
ACEx™
CoolFET™
CROSSVOLT™
E2CMOSTM
FACT™
FACT Quiet Series™
FAST®
FASTr™
GTO™
HiSeC™
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROV AL OF FAIRCHILD SEMICONDUCTOR CORPORA TION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT ST A TUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Formative or
In Design
First Production
Full Production
Not In Production
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICA TION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS P ATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
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TinyLogic™
UHC™
VCX™
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench
QFET™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
Rev. D
