MC14106B Hex Schmitt Trigger The MC14106B hex Schmitt Trigger is constructed with MOS P-channel and N-channel enhancement mode devices in a single monolithic structure. These devices find primary use where low power dissipation and/or high noise immunity is desired. The MC14106B may be used in place of the MC14069UB hex inverter for enhanced noise immunity or to "square up" slowly changing waveforms. This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, Vin and Vout should be constrained to the range VSS v (Vin or Vout) v VDD. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS or VDD). Unused outputs must be left open. http://onsemi.com MARKING DIAGRAMS 14 MC14106BCP AWLYYWWG PDIP-14 P SUFFIX CASE 646 Features 14 * Increased Hysteresis Voltage Over the MC14584B * Supply Voltage Range = 3.0 Vdc to 18 Vdc * Capable of Driving Two Low-power TTL Loads or One Low-power * * * Schottky TTL Load Over the Rated Temperature Range Pin-for-Pin Replacement for CD40106B and MM74C14 Can Be Used to Replace the MC14584B or MC14069UB These Devices are Pb-Free and are RoHS Compliant -0.5 to +18.0 V -0.5 to VDD + 0.5 V Input or Output Current (DC or Transient) per Pin 10 mA PD Power Dissipation, per Package (Note 1) 500 mW TA Ambient Temperature Range -55 to +125 C Tstg Storage Temperature Range -65 to +150 C TL Lead Temperature (8-Second Soldering) 260 C Vin, Vout Iin, Iout Input or Output Voltage Range (DC or Transient) 1 14 106B ALYWG G 1 Unit DC Supply Voltage Range SOIC-14 D SUFFIX CASE 751A 14 Value VDD Parameter 14106BG AWLYWW 14 MAXIMUM RATINGS (Voltages Referenced to VSS) Symbol 1 TSSOP-14 DT SUFFIX CASE 948G 1 A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week G or G = Pb-Free Package (Note: Microdot may be in either location) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Temperature Derating: Plastic "P and D/DW" Packages: - 7.0 mW/C From 65C To 125C (c) Semiconductor Components Industries, LLC, 2011 June, 2011 - Rev. 8 1 Publication Order Number: MC14106B/D MC14106B 1 2 3 4 5 6 9 8 11 10 13 12 VDD = PIN 14 VSS = PIN 7 Figure 2. Equivalent Circuit Schematic (1/6 of Circuit Shown) Figure 1. Logic Diagram ORDERING INFORMATION Package Shipping MC14106BCPG PDIP-14 (Pb-Free) 500 Units / Rail MC14106BDG SOIC-14 (Pb-Free) 55 Units / Rail MC14106BDR2G SOIC-14 (Pb-Free) Device MC14106BDTR2G 2500 / Tape & Reel TSSOP-14* For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb-Free. http://onsemi.com 2 MC14106B IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIII IIIII IIIIIIIII IIIII IIIIIII IIIIIIIIII IIIIII IIIIIIIIII IIII III III III IIII III IIII III III III IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII IIII III III III IIII III IIII III III III IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII IIII III III III IIII III IIII III III III IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII IIII III III III IIII III IIII III III III IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII IIII III III III IIII III IIII III III III IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII IIII III III III IIII III IIII III III III IIIIIIIIIIIIIIIIIIIIIIII IIII IIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIII III IIII III IIII III III III IIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII ELECTRICAL CHARACTERISTICS (Voltages Referenced to VSS) Characteristic Output Voltage Vin = VDD Symbol - 55C 25C 125C VDD Vdc Min Max Min Typ (2) Max Min Max Unit "0" Level VOL 5.0 10 15 - - - 0.05 0.05 0.05 - - - 0 0 0 0.05 0.05 0.05 - - - 0.05 0.05 0.05 Vdc "1" Level VOH 5.0 10 15 4.95 9.95 14.95 - - - 4.95 9.95 14.95 5.0 10 15 - - - 4.95 9.95 14.95 - - - Vdc Hysteresis Voltage VH (5) 5.0 10 15 0.3 1.2 1.6 2.0 3.4 5.0 0.3 1.2 1.6 1.1 1.7 2.1 2.0 3.4 5.0 0.3 1.2 1.6 2.0 3.4 5.0 Vdc Threshold Voltage Positive-Going VT+ 5.0 10 15 2.2 4.6 6.8 3.6 7.1 10.8 2.2 4.6 6.8 2.9 5.9 8.8 3.6 7.1 10.8 2.2 4.6 6.8 3.6 7.1 10.8 Vdc VT- 5.0 10 15 0.9 2.5 4.0 2.8 5.2 7.4 0.9 2.5 4.0 1.9 3.9 5.8 2.8 5.2 7.4 0.9 2.5 4.0 2.8 5.2 7.4 Vdc 5.0 5.0 10 15 - 3.0 - 0.64 - 1.6 - 4.2 - - - - - 2.4 - 0.51 - 1.3 - 3.4 - 4.2 - 0.88 - 2.25 - 8.8 - - - - - 1.7 - 0.36 - 0.9 - 2.4 - - - - IOL 5.0 10 15 0.64 1.6 4.2 - - - 0.51 1.3 3.4 0.88 2.25 8.8 - - - 0.36 0.9 2.4 - - - mAdc Input Current Iin 15 - 0.1 - 0.00001 0.1 - 1.0 mAdc Input Capacitance (Vin = 0) Cin - - - - 5.0 7.5 - - pF Quiescent Current (Per Package) IDD 5.0 10 15 - - - 0.25 0.5 1.0 - - - 0.0005 0.0010 0.0015 0.25 0.5 1.0 - - - 7.5 15 30 mAdc IT 5.0 10 15 Vin = 0 Negative-Going Output Drive Current (VOH = 2.5 Vdc) (VOH = 4.6 Vdc) (VOH = 9.5 Vdc) (VOH = 13.5 Vdc) (VOL = 0.4 Vdc) (VOL = 0.5 Vdc) (VOL = 1.5 Vdc) Source Sink Total Supply Current (Note 3, 4) (Dynamic plus Quiescent, Per Package) (CL = 50 pF on all outputs, all buffers switching) IOH mAdc IT = (1.8 mA/kHz) f + IDD IT = (3.6 mA/kHz) f + IDD IT = (5.4 mA/kHz) f + IDD mAdc 2. Data labelled "Typ" is not to be used for design purposes but is intended as an indication of the IC's potential performance. 3. The formulas given are for the typical characteristics only at 25C. 4. To calculate total supply current at loads other than 50 pF: IT(CL) = IT(50 pF) + (CL - 50) Vfk where IT is in mA (per package), CL in pF, V = (VDD - VSS) in volts, f in kHz is input frequency, and k = 0.001. 5. VH = VT+ - VT- (But maximum variation of VH is specified as less that VT+ max - VT- min). http://onsemi.com 3 MC14106B IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIII IIIII IIII IIII IIII IIII III IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII SWITCHING CHARACTERISTICS (CL = 50 pF, TA = 25C) Characteristic Symbol VDD Vdc Min Typ (6) Max Unit Output Rise Time tTLH 5.0 10 15 - - - 100 50 40 200 100 80 ns Output Fall Time tTHL 5.0 10 15 - - - 100 50 40 200 100 80 ns tPLH, tPHL 5.0 10 15 - - - 125 50 40 250 100 80 ns Propagation Delay Time 6. Data labelled "Typ" is not to be used for design purposes but is intended as an indication of the IC's potential performance. INPUT INPUT 7 VSS 20 ns tPLH tPHL CL 90% 50% 10% OUTPUT tf Figure 1. Switching Time Test Circuit and Waveforms VDD 0 0 VDD 90% 50% 10% Vout , OUTPUT VOLTAGE (Vdc) PULSE GENERATOR 20 ns VDD 14 OUTPUT VT- VT+ VH Vin, INPUT VOLTAGE (Vdc) Figure 2. Typical Transfer Characteristics http://onsemi.com 4 VDD tr VSS VOH VOL MC14106B APPLICATIONS Vout Vin VDD VH Vin VDD VH Vin VSS VSS VDD VDD Vout Vout VSS VSS (b) A Schmitt trigger offers maximum noise immunity in gate applications. (a) Schmitt Triggers will square up inputs with slow rise and fall times. Figure 3. VDD VDD R C tw Rs tw Rs Vout Vout C R tw = RC IN Useful as Pushbutton/Keyboard Debounce Circuit. Figure 4. Monostable Multivibrator http://onsemi.com 5 VDD VT+ MC14106B t1+t2 R R Vin t1 A Vout C t2 C * t1 [ RCln VDD Vin VT+ VSS VT ) VT - VDD-VT - * t2 [ RCln VDD-VT ) A VDD VT+ VSS V 1 [ RCln VDD-VT - T ) f VT - VDD-VT ) VDD Vout VT+ VSS *t1 + t2 & tPHL + tPLH Useful in discriminating against short pulse durations. Figure 5. Astable Multivibrator Figure 6. Integrator C Vin Vin R +EDGE -EDGE -EDGE C C C +EDGE Vin VDD R tw R R VDD tw = RC ln VT+ Useful as an edge detector circuit. Figure 7. Differentiator Figure 8. Positive Edge Time Delay Circuit http://onsemi.com 6 MC14106B PACKAGE DIMENSIONS SOIC-14 CASE 751A-03 ISSUE J NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. -A- 14 8 -B- P 7 PL 0.25 (0.010) M 7 1 G -T- 0.25 (0.010) M T B S A DIM A B C D F G J K M P R J M K D 14 PL F R X 45 _ C SEATING PLANE B M S SOLDERING FOOTPRINT* 7X 7.04 14X 1.52 1 14X 0.58 1.27 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 7 MILLIMETERS MIN MAX 8.55 8.75 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.337 0.344 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.228 0.244 0.010 0.019 MC14106B PACKAGE DIMENSIONS TSSOP-14 CASE 948G-01 ISSUE B 14X K REF 0.10 (0.004) 0.15 (0.006) T U M T U V S S N 2X 14 L/2 0.25 (0.010) 8 M B -U- L PIN 1 IDENT. N F 7 1 0.15 (0.006) T U NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. S S DETAIL E CCC CCC EEE CCC EEE K A -V- K1 J J1 DIM A B C D F G H J J1 K K1 L M SECTION N-N -W- C 0.10 (0.004) -T- SEATING PLANE D H G DETAIL E SOLDERING FOOTPRINT* 7.06 1 0.65 PITCH 14X 0.36 14X 1.26 DIMENSIONS: MILLIMETERS *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 8 MILLIMETERS INCHES MIN MAX MIN MAX 4.90 5.10 0.193 0.200 4.30 4.50 0.169 0.177 --- 1.20 --- 0.047 0.05 0.15 0.002 0.006 0.50 0.75 0.020 0.030 0.65 BSC 0.026 BSC 0.50 0.60 0.020 0.024 0.09 0.20 0.004 0.008 0.09 0.16 0.004 0.006 0.19 0.30 0.007 0.012 0.19 0.25 0.007 0.010 6.40 BSC 0.252 BSC 0_ 8_ 0_ 8_ MC14106B PACKAGE DIMENSIONS PDIP-14 CASE 646-06 ISSUE P 14 8 1 7 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. B A F L N C -T- SEATING PLANE H G D 14 PL J K 0.13 (0.005) M DIM A B C D F G H J K L M N INCHES MIN MAX 0.715 0.770 0.240 0.260 0.145 0.185 0.015 0.021 0.040 0.070 0.100 BSC 0.052 0.095 0.008 0.015 0.115 0.135 0.290 0.310 --- 10 _ 0.015 0.039 MILLIMETERS MIN MAX 18.16 19.56 6.10 6.60 3.69 4.69 0.38 0.53 1.02 1.78 2.54 BSC 1.32 2.41 0.20 0.38 2.92 3.43 7.37 7.87 --- 10 _ 0.38 1.01 M ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. 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American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 http://onsemi.com 9 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative MC14106B/D