1
LTC2051/LTC2052
20512fd
Dual/Quad Zero-Drift
Operational Amplifiers
Thermocouple Amplifiers
Electronic Scales
Medical Instrumentation
Strain Gauge Amplifiers
High Resolution Data Acquisition
DC Accurate RC Active Filters
Low Side Current Sense
Maximum Offset Voltage of 3μV
Maximum Offset Voltage Drift of 30nV/°C
Small Footprint, Low Profile MS8/GN16 Packages
Single Supply Operation: 2.7V to ±5.5V
Noise: 1.5μV
P-P
(0.01Hz to 10Hz Typ)
Voltage Gain: 140dB (Typ)
PSRR: 130dB (Typ)
CMRR: 130dB (Typ)
Supply Current: 0.75mA (Typ) per Amplifier
Extended Common Mode Input Range
Output Swings Rail-to-Rail
Operating Temperature Range –40°C to 125°C
Available in 3mm × 3mm × 0.8mm DFN Package
The LTC
®
2051/LTC2052 are dual/quad zero-drift opera-
tional amplifiers available in the MS8 and SO-8/GN16 and
S14 packages. For space limited applications, the LTC2051
is available in a 3mm × 3mm × 0.8mm dual fine pitch
leadless package (DFN). They operate from a single 2.7V
supply and support ±5V applications. The current con-
sumption is 750μA per op amp.
The LTC2051/LTC2052, despite their miniature size, fea-
ture uncompromising DC performance. The typical input
offset voltage and offset drift are 0.5μV and 10nV/°C. The
almost zero DC offset and drift are supported with a power
supply rejection ratio (PSRR) and common mode rejec-
tion ratio (CMRR) of more than 130dB.
The input common mode voltage ranges from the negative
supply up to typically 1V from the positive supply. The
LTC2051/LTC2052 also have an enhanced output stage
capable of driving loads as low as 2kΩ to both supply rails.
The open-loop gain is typically 140dB. The LTC2051/
LTC2052 also feature a 1.5μV
P-P
DC to 10Hz noise and a
3MHz gain-bandwidth product.
Input Referred Noise 0.1Hz to 10Hz
High Performance Low Cost Instrumentation Amplifier
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
2
1
0
–1
–2
μV
0246810
TIME (SEC) 2052 TA02
FEATURES
DESCRIPTIO
U
APPLICA TIO S
U
TYPICAL APPLICA TIO
U
+
R2
10k
0.1%
R1
100Ω
0.1%
7
4
5
6
3
2
20512 TA01
–5V
+
1/2
LTC2051HV 1/2
LTC2051HV
8
1
5V
–VIN
VIN AV = 101
R2
10k
0.1%
R1
100Ω
0.1%
2
LTC2051/LTC2052
20512fd
Total Supply Voltage (V
+
to V
)
LTC2051/LTC2052 .................................................. 7V
LTC2051HV/LTC2052HV ....................................... 12V
Input Voltage (Note 5) ..........(V
+
+ 0.3V) to (V
– 0.3V)
Output Short-Circuit Duration......................... Indefinite
Operating Temperature Range............. 40°C to 125°C
Specified Temperature Range (Note 3) 40°C to 125°C
Storage Temperature Range................ 65°C to 150°C
DD Package ...................................... 65°C to 125°C
Lead Temperature (Soldering, 10 sec)................. 300°C
(Note 1)
ORDER PART
NUMBER
ABSOLUTE AXI U RA TI GS
WWWU
PACKAGE/ORDER I FOR A TIO
UU
W
TJMAX = 125°C, θJA = 190°C/W
1
2
3
4
OUT A
–IN A
+IN A
V
8
7
6
5
V
+
OUT B
–IN B
+IN B
TOP VIEW
MS8 PACKAGE
8-LEAD PLASTIC MSOP
1
2
3
4
5
OUT A
IN A
+IN A
V
SHDN A
10
9
8
7
6
V+
OUT B
IN B
+IN B
SHDN B
TOP VIEW
MS10 PACKAGE
10-LEAD PLASTIC MSOP
TOP VIEW
V+
OUT B
–IN B
+IN B
OUT A
IN A
+IN A
V
1
2
3
4
8
7
6
5
S8 PACKAGE
8-LEAD PLASTIC SO
TJMAX = 125°C, θJA = 250°C/WTJMAX = 125°C, θJA = 250°C/W
MS8 PART
MARKING
LTC2051CMS8
LTC2051IMS8
LTC2051HVCMS8
LTC2051HVIMS8
LTC2051HMS8
LTC2051HVHMS8
LTMN
LTMP
LTPJ
LTPK
LTVF
LTVH
ORDER PART
NUMBER MS10 PART
MARKING
LTC2051CMS10
LTC2051IMS10
LTC2051HVCMS10
LTC2051HVIMS10
LTMQ
LTMR
LTRB
LTRC
ORDER PART
NUMBER S8 PART
MARKING
LTC2051CS8
LTC2051IS8
LTC2051HVCS8
LTC2051HVIS8
LTC2051HS8
LTC2051HVHS8
2051
2051I
2051HV
051HVI
2051H
051HVH
Consult LTC Marketing for parts specified with wider operating temperature ranges.
TOP VIEW
DD PACKAGE
8-LEAD (3mm × 3mm) PLASTIC DFN
5
6
7
8
4
3
2
1OUT A
–IN A
+IN A
V
V+
OUT B
–IN B
+IN B
TJMAX = 125°C, θJA = 160°C/W
EXPOSED PAD (PIN 9) IS CONNECTED TO V(PIN 4)
ORDER PART
NUMBER* DD PART
MARKING
LTC2051CDD
LTC2051IDD
LTC2051HVCDD
LTC2051HVIDD
LAAN
LAEL
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
9
3
LTC2051/LTC2052
20512fd
A V AILABLE OPTIO S
U
PART NUMBER AMPS/PACKAGE SPECIFIED TEMP RANGE SPECIFIED VOLTAGE PACKAGE
LTC2051CDD 2 0°C to 70°C3V, 5V DD
LTC2051CS8 2 0°C to 70°C 3V, 5V SO-8
LTC2051CMS8 2 0°C to 70°C 3V, 5V 8-Lead MSOP
LTC2051CMS10 2 0°C to 70°C 3V, 5V 10-Lead MSOP
LTC2051HVCDD 2 0°C to 70°C 3V, 5V, ±5V DD
LTC2051HVCS8 2 0°C to 70°C 3V, 5V, ±5V SO-8
LTC2051HVCMS8 2 0°C to 70°C 3V, 5V, ±5V 8-Lead MSOP
LTC2051HVCMS10 2 0°C to 70°C 3V, 5V, ±5V 10-Lead MSOP
LTC2051IDD 2 40°C to 85°C3V, 5V DD
LTC2051IS8 2 40°C to 85°C 3V, 5V SO-8
LTC2051IMS8 2 40°C to 85°C 3V, 5V 8-Lead MSOP
LTC2051IMS10 2 40°C to 85°C 3V, 5V 10-Lead MSOP
LTC2051HVIDD 2 40°C to 85°C 3V, 5V, ±5V DD
LTC2051HVIS8 2 40°C to 85°C 3V, 5V, ±5V SO-8
LTC2051HVIMS8 2 40°C to 85°C 3V, 5V, ±5V 8-Lead MSOP
LTC2051HVIMS10 2 40°C to 85°C 3V, 5V, ±5V 10-Lead MSOP
LTC2051HS8 2 40°C to 125°C 3V, 5V SO-8
LTC2051HMS8 2 40°C to 125°C 3V, 5V 8-Lead MSOP
LTC2051HVHS8 2 40°C to 125°C 3V, 5V, ±5V SO-8
LTC2051HVHMS8 2 40°C to 125°C 3V, 5V, ±5V 8-Lead MSOP
LTC2052CS 4 0°C to 70°C 3V, 5V 14-Lead SO
LTC2052CGN 4 0°C to 70°C 3V, 5V 16-Lead SSOP
LTC2052HVCS 4 0°C to 70°C 3V, 5V, ±5V 14-Lead SO
LTC2052HVCGN 4 0°C to 70°C 3V, 5V, ±5V 16-Lead SSOP
GN PACKAGE
16-LEAD PLASTIC SSOP
1
2
3
4
5
6
7
8
TOP VIEW
16
15
14
13
12
11
10
9
OUT A
IN A
+IN A
V+
+IN B
IN B
OUT B
NC
OUT D
IN D
+IN D
V
+IN C
IN C
OUT C
NC
ORDER PART
NUMBER
LTC2052CGN
LTC2052IGN
LTC2052HVCGN
LTC2052HVIGN
LTC2052HGN
LTC2052HVHGN
TJMAX = 125°C, θJA = 110°C/W
GN PART MARKING
2052
2052I
2052HV
052HVI
2052H
052HVH
TOP VIEW
S PACKAGE
14-LEAD PLASTIC SO
1
2
3
4
5
6
7
14
13
12
11
10
9
8
OUT A
IN A
+IN A
V
+
+IN B
IN B
OUT B
OUT D
IN D
+IN D
V
+IN C
IN C
OUT C
TJMAX = 125°C, θJA = 110°C/W
ORDER PART
NUMBER
LTC2052CS
LTC2052IS
LTC2052HVCS
LTC2052HVIS
LTC2052HS
LTC2052HVHS
PACKAGE/ORDER I FOR A TIO
UU
W
4
LTC2051/LTC2052
20512fd
LTC2051C/LTC2052C
LTC2051I/LTC2052I LTC2051H/LTC2052H
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
Input Offset Voltage (Note 2) ±0.5 ±3±0.5 ±3μV
Average Input Offset Drift (Note 2) 0.01 ±0.03 0.01 ±0.05 μV/°C
Long-Term Offset Drift 50 50 nV/mo
Input Bias Current (Note 4) V
S
= 3V ±8±50 ±8±50 pA
V
S
= 3V ±100 ±3000 pA
V
S
= 5V ±25 ±75 ±25 ±75 pA
V
S
= 5V ±150 ±3000 pA
Input Offset Current (Note 4) V
S
= 3V ±100 ±100 pA
V
S
= 3V ±150 ±700 pA
V
S
= 5V ±150 ±150 pA
V
S
= 5V ±200 ±700 pA
Input Noise Voltage R
S
= 100Ω, DC to 10Hz 1.5 1.5 μV
P-P
Common Mode Rejection Ratio V
CM
= GND to V
+
– 1.3, 115 130 115 130 dB
V
S
= 3V 110 130 110 130 dB
V
CM
= GND to V
+
– 1.3, 120 130 120 130 dB
V
S
= 5V 115 130 115 130 dB
Power Supply Rejection Ratio 120 130 120 130 dB
115 130 115 130 dB
Large-Signal Voltage Gain R
L
= 10k, V
S
= 3V 120 140 120 140 dB
115 140 115 140 dB
R
L
= 10k, V
S
= 5V 125 140 125 140 dB
120 140 120 140 dB
Output Voltage Swing High R
L
= 2k to GND V
+
– 0.15 V
+
– 0.06 V
+
– 0.15 V
+
– 0.06 V
R
L
= 10k to GND V
+
– 0.05 V
+
– 0.02 V
+
– 0.05 V
+
– 0.02 V
Output Voltage Swing Low R
L
= 2k to GND 215 215 mV
R
L
= 10k to GND 215 215 mV
Slew Rate 22V/μs
Gain Bandwidth Product 3 3 MHz
Supply Current (Per Amplifier) No Load, V
S
= 3V, V
SHDN
= V
IH
0.75 1.0 0.75 1.1 mA
No Load, V
S
= 5V, V
SHDN
= V
IH
0.85 1.2 0.85 1.3 mA
Supply Current, Shutdown V
SHDN
= V
IL
, V
S
= 3V 25 25 μA
V
SHDN
= V
IL
, V
S
= 5V 410 410 μA
(LTC2051/LTC2052, LTC2051HV/LTC2052HV) The denotes the
specifications which apply over the full operating temperature range, otherwise specifications are at T
A
= 25°C. VS = 3V, 5V
unless otherwise noted. (Note 3)
ELECTRICAL CHARACTERISTICS
A V AILABLE OPTIO S
U
LTC2052IS 4 40°C to 85°C 3V, 5V 14-Lead SO
LTC2052IGN 4 40°C to 85°C 3V, 5V 16-Lead SSOP
LTC2052HVIS 4 40°C to 85°C 3V, 5V, ±5V 14-Lead SO
LTC2052HVIGN 4 40°C to 85°C 3V, 5V, ±5V 16-Lead SSOP
LTC2052HS 4 40°C to 125°C 3V, 5V 14-Lead SO
LTC2052HGN 4 40°C to 125°C 3V, 5V 16-Lead SSOP
LTC2052HVHS 4 40°C to 125°C 3V, 5V, ±5V 14-Lead SO
LTC2052HVHGN 4 40°C to 125°C 3V, 5V, ±5V 16-Lead SSOP
PART NUMBER AMPS/PACKAGE SPECIFIED TEMP RANGE SPECIFIED VOLTAGE PACKAGE
5
LTC2051/LTC2052
20512fd
ELECTRICAL CHARACTERISTICS
LTC2051C/LTC2052C
LTC2051I/LTC2052I LTC2051H/LTC2052H
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
(LTC2051/LTC2052, LTC2051HV/LTC2052HV) The denotes the
specifications which apply over the full operating temperature range, otherwise specifications are at T
A
= 25°C. VS = 3V, 5V
unless otherwise noted. (Note 3)
Shutdown Pin Input Low Voltage (V
IL
)V
+ 0.5 V
+ 0.5 V
Shutdown Pin Input High Voltage (V
IH
)V
+
– 0.5 V
+
– 0.5 V
Shutdown Pin Input Current V
SHDN
= V
IL
, V
S
= 3V –1 –3 –1 –3 μA
V
SHDN
= V
IL
, V
S
= 5V –2 –5 –2 –5 μA
Internal Sampling Frequency 7.5 7.5 kHz
LTC2051C/LTC2052C
LTC2051I/LTC2052I LTC2051H/LTC2052H
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
Input Offset Voltage (Note 2) ±1±3±1±3μV
Average Input Offset Drift (Note 2) 0.01 ±0.03 0.01 ±0.05 μV/°C
Long-Term Offset Drift 50 50 nV/mo
Input Bias Current (Note 4) ±90 ±150 ±90 ±150 pA
±300 ±3000 pA
Input Offset Current (Note 4) ±300 ±300 pA
±500 ±700 pA
Input Noise Voltage R
S
= 100Ω, DC to 10Hz 1.5 1.5 μV
P-P
Common Mode Rejection Ratio V
CM
= V
to V
+
– 1.3 125 130 125 130 dB
120 130 120 130 dB
Power Supply Rejection Ratio 120 130 120 130 dB
115 130 115 130 dB
Large-Signal Voltage Gain R
L
= 10k 125 140 125 140 dB
120 140 120 140 dB
Maximum Output Voltage Swing R
L
= 2k to GND ±4.75 ±4.92 ±4.50 ±4.92 V
R
L
= 10k to GND ±4.90 ±4.98 ±4.85 ±4.98 V
Slew Rate 22V/μs
Gain Bandwidth Product 3 3 MHz
Supply Current (Per Amplifier) No Load, V
SHDN
= V
IH
1 1.5 1 1.5 mA
Supply Current, Shutdown V
SHDN
= V
IL
15 30 15 30 μA
Shutdown Pin Input Low Voltage (V
IL
)V
+ 0.5 V
+ 0.5 V
Shutdown Pin Input High Voltage (V
IH
)V
+
– 0.5 V
+
– 0.5 V
Shutdown Pin Input Current V
SHDN
= V
IL
–7 –15 7 15 μA
Internal Sampling Frequency 7.5 7.5 kHz
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: These parameters are guaranteed by design. Thermocouple effects
preclude measurements of these voltage levels during automated testing.
Note 3: All versions of the LTC2051/LTC2052 are designed, characterized
and expected to meet the extended temperature limits of –40°C and 125°C.
The LTC2051C/LTC2052C/LTC2051HVC/LTC2052HVC are guaranteed to
meet the temperature limits of 0°C and 70°C. The LTC2051I/LTC2052I/
LTC2051HVI/LTC2052HVI are guaranteed to meet temperature limits of –
40°C and 85°C. The LTC2051H/LTC2051HVH and LTC2052H/LTC2052HVH
(LTC2051HV/LTC2052HV) The denotes the specifications which apply over the full operating temperature range, otherwise
specifications are at T
A
= 25°C. VS = ±5V unless otherwise noted. (Note 3)
are guaranteed to meet the temperature limits of –40°C and 125°C.
Note 4: The bias current measurement accuracy depends on the proximity of
the negative supply bypass capacitors to the device under test. Because of
this, only the bias current of channel B (LTC2051) and channels A and B
(LTC2052) are 100% tested to the data sheet specifications. The bias
currents of the remaining channels are 100% tested to relaxed limits,
however, their values are guaranteed by design to meet the data sheet limits.
Note 5: This parameter is guaranteed to meet specified performance
through design and characterization. It has not been tested.
Note 6: The θ
JA
specified for the DD package is with minimal PCB heat
spreading metal. Using expanded metal area on all layers of a board
reduces this value.
6
LTC2051/LTC2052
20512fd
Output Voltage Swing
vs Load Resistance
Common Mode Rejection Ratio
vs Frequency DC CMRR
vs Common Mode Input Range PSRR vs Frequency
TYPICAL PERFOR A CE CHAR ACTERISTICS
UW
FREQUENCY (Hz)
20
CMRR (dB)
40
80
120
140
1 100 1k 100k
20512 G01
010 10k
60
100
VS = 3V OR ±5V
VCM = 0.5VP-P
V
CM
(V)
0
100
120
140
68
20512 G02
80
60
24 10
40
20
0
CMRR (dB)
V
S
= 3V V
S
= 5V
V
S
= 10V
FREQUENCY (Hz)
20
PSRR (dB)
40
60
80
120
100
10 1k 10k 1M
20512 G03
0100 100k
PSRR
+PSRR
LOAD RESISTANCE (kΩ)
0
0
OUTPUT SWING (V)
1
2
3
4
5
6
246
V
S
= 3V
V
S
= 5V
8
20512 G04
10
R
L
TO GND
Output Swing vs Output Current
OUTPUT CURRENT (mA)
0.01
0
OUTPUT VOLTAGE (V)
4
5
6
0.1 1 10
20512 G05
3
2
1
VS = 5V
VS = 3V
Bias Current vs Temperature
Output Swing
vs Load Resistance ±5V
LOAD RESISTANCE (kΩ)
0
OUTPUT VOLTAGE (V)
1
3
5
8
20512 G06
–1
–3
0
2
4
–2
–4
–5 24610
R
L
TO GND
Gain/Phase vs Frequency
Output Swing
vs Output Current, ±5V Supply
OUTPUT CURRENT (mA)
0.01
–5
OUTPUT SWING (V)
–3
–2
–1
0
1
2
0.1 1
20512 G07
3
4RL TO GND
5
–4
10
FREQUENCY (Hz)
–20
GAIN (dB)
PHASE (DEG)
0
40
80
100
100 10k 100k 10M
20512 G08
–40 1k 1M
20
60
180
140
100
80
200
160
120
V
S
= 3V OR ±5V
C
L
= 50pF
R
L
= 100k
PHASE
GAIN
TEMPERATURE (°C)
10
BIAS CURRENT (pA)
100
1k
10k
–50 50 100 125
20512 G09
10
VS = ±5V
VS = 5V
VS = 3V
7
LTC2051/LTC2052
20512fd
Sampling Frequency
vs Supply Voltage
TYPICAL PERFOR A CE CHAR ACTERISTICS
UW
Sampling Frequency
vs Temperature
Supply Current (Per Amplifier)
vs Supply Voltage Supply Current (Per Amplifier)
vs Temperature
2V/DIV
1μs/DIV
0.1
0
1.5
INPUT (V)
500μs/DIV
OUTPUT (V)
AV = 1
RL = 10k
CL = 100pF
VS = ±5V
0
20512 G11
AV = –100
RL = 100k
CL = 10pF
VS = 3V
Transient Response
2050 G12
Input Overload Recovery
Input Bias Current
vs Input Common Mode Voltage
INPUT COMMON MODE VOLTAGE (V)
–5
INPUT BIAS CURRENT (pA)
150
200
250
3
20512 G10
100
50
0–3 –1 0 15
V
S
= ±5V
V
S
= 5V
V
S
= 3V
SUPPLY VOLTAGE (V)
3
SAMPLING FREQUENCY (kHz)
7
8
11
20512 G13
6
5579
10
9
TEMPERATURE (°C)
–50
SAMPLING FREQUENCY (kHz)
7
8
125
20512 G14
6
5050 100
10
9
V
S
= ±5V
V
S
= 3V
SUPPLY VOLTAGE (V)
2.5
0
SUPPLY CURRENT (mA)
0.2
0.4
0.6
0.8
1.0
1.2
4.5 6.5 8.5 10.5
20512 G15
TEMPERATURE (°C)
–50
SUPPLY CURRENT (mA)
0.4
0.6
125
20512 G16
0.2
0050 100
1.2
1.0
0.8
V
S
= 3V
V
S
= 5V
V
S
= ±5V
8
LTC2051/LTC2052
20512fd
The dual chopper op amp buffers the inputs of A1 and
corrects its offset voltage and offset voltage drift. With the
RC values shown, the power-up warm-up time is typically
20 seconds. The step response of the composite amplifier
does not present settling tails. The LT
®
1677 should be
used when extremely low noise, V
OS
and V
OS
drift are
needed and the input source resistance is low. (For in-
stance a 350Ω strain gauge bridge.) The LT1012 or
equivalent should be used when low bias current (100pA)
is also required in conjunction with DC to 10Hz low noise,
low V
OS
and V
OS
drift. The measured typical input offset
voltages are less than 1μV.
APPLICA TIO S I FOR A TIO
WUUU
Shutdown
The LTC2051 includes a shutdown pin in the 10-lead
MSOP. When this active low pin is high or allowed to float,
the device operates normally. When the shutdown pin is
pulled low, the device enters shutdown mode; supply
current drops to 3μA, all clocking stops and the output
assumes a high impedance state.
Clock Feedthrough, Input Bias Current
The LTC2051/LTC2052 use autozeroing circuitry to achieve
an almost zero DC offset over temperature, common
mode voltage and power supply voltage. The frequency of
the clock used for autozeroing is typically 7.5kHz. The
term clock feedthrough is broadly used to indicate visibil-
ity of this clock frequency in the op amp output spectrum.
There are typically two types of clock feedthrough in
autozeroed op amps like the LTC2051/LTC2052.
The first form of clock feedthough is caused by the settling
of the internal sampling capacitor and is input referred;
that is, it is multiplied by the closed-loop gain of the op
amp. This form of clock feedthrough is independent of the
magnitude of the input source resistance or the magnitude
of the gain setting resistors. The LTC2051/LTC2052 have
a residue clock feedthrough of less than 1μV
RMS
input
referred at 7.5kHz.
The second form of clock feedthrough is caused by the
small amount of charge injection occurring during the
sampling and holding of the op amps input offset voltage.
The current spikes are multiplied by the impedance seen
at the input terminals of the op amp, appearing at the
output multiplied by the closed-loop gain of the op amp.
To reduce this form of clock feedthrough, use smaller
valued gain setting resistors and minimize the source
resistance at the input. If the resistance seen at the inputs
is less than 10k, this form of clock feedthrough is less
than 1μVRMS input referred at 7.5kHz, or less than the
amount of residue clock feedthrough from the first form
previously described.
Placing a capacitor across the feedback resistor reduces
either form of clock feedthrough by limiting the bandwidth
of the closed-loop gain.
Input bias current is defined as the DC current into the
input pins of the op amp. The same current spikes that
cause the second form of clock feedthrough
previously
described
, when averaged, dominate the DC input bias
current of the op amp below 70°C.
At temperatures above 70°C, the leakage of the ESD
protection diodes on the inputs increase the input bias
currents of both inputs in the positive direction, while the
current caused by the charge injection stays relatively
constant. At elevated temperatures (above 85°C) the
leakage current begins to dominate and both the negative
and positive pin’s input bias currents are in the positive
direction (into the pins).
Input Pins, ESD Sensitivity
ESD voltages above 700V on the input pins of the op amp
will cause the input bias currents to increase (more DC
current into the pins). At these voltages, it is possible to
damage the device to a point where the input bias current
exceeds the maximums specified in this data sheet.
TYPICAL APPLICA TIO
U
9
LTC2051/LTC2052
20512fd
+
1/2 LTC2051
+
A1
+
1/2 LTC2051 6
3
2
5
R4
R5
R3
20512 F01
R2
5V
R1
+
C2
C1
7
1
6
8
1
3
2
OUT
OUT
Obtaining Ultralow VOS Drift and Low Noise
A1 R1 R2 R3 R4 R5 C1 C2 e
IN
(DC – 1Hz) e
IN
(DC – 10Hz)
LT1677 2.49k 3.01k 340k 10k 100k 0.01μF 0.001μF 0.15μV
P-P
0.2μV
P-P
LT1012 750Ω57Ω250k 10k 100k 0.01μF 0.001μF 0.3μV
P-P
0.4μV
P-P
TYPICAL APPLICA TIO
U
U
PACKAGE DESCRIPTIO
3.00 ±0.10
(4 SIDES)
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON TOP AND BOTTOM OF PACKAGE
0.38 ± 0.10
BOTTOM VIEW—EXPOSED PAD
1.65 ± 0.10
(2 SIDES)
0.75 ±0.05
R = 0.115
TYP
2.38 ±0.10
(2 SIDES)
14
85
PIN 1
TOP MARK
(NOTE 6)
0.200 REF
0.00 – 0.05
(DD) DFN 1203
0.25 ± 0.05
2.38 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
1.65 ±0.05
(2 SIDES)2.15 ±0.05
0.50
BSC
0.675 ±0.05
3.5 ±0.05
PACKAGE
OUTLINE
0.25 ± 0.05 0.50 BSC
DD Package
8-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1698)
10
LTC2051/LTC2052
20512fd
U
PACKAGE DESCRIPTIO
MS8 Package
8-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1660)
MS Package
10-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1661)
MSOP (MS8) 0204
0.53 ± 0.152
(.021 ± .006)
SEATING
PLANE
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
0.18
(.007)
0.254
(.010)
1.10
(.043)
MAX
0.22 – 0.38
(.009 – .015)
TYP
0.127 ± 0.076
(.005 ± .003)
0.86
(.034)
REF
0.65
(.0256)
BSC
0° – 6° TYP
DETAIL “A”
DETAIL “A”
GAUGE PLANE
1234
4.90 ± 0.152
(.193 ± .006)
8765
3.00 ± 0.102
(.118 ± .004)
(NOTE 3)
3.00 ± 0.102
(.118 ± .004)
(NOTE 4)
0.52
(.0205)
REF
5.23
(.206)
MIN 3.20 – 3.45
(.126 – .136)
0.889 ± 0.127
(.035 ± .005)
RECOMMENDED SOLDER PAD LAYOUT
0.42 ± 0.038
(.0165 ± .0015)
TYP
0.65
(.0256)
BSC
MSOP (MS) 0603
0.53 ± 0.152
(.021 ± .006)
SEATING
PLANE
0.18
(.007)
1.10
(.043)
MAX
0.17 – 0.27
(.007 – .011)
TYP
0.127 ± 0.076
(.005 ± .003)
0.86
(.034)
REF
0.50
(.0197)
BSC
12345
4.90 ± 0.152
(.193 ± .006)
0.497 ± 0.076
(.0196 ± .003)
REF
8910 76
3.00 ± 0.102
(.118 ± .004)
(NOTE 3)
3.00 ± 0.102
(.118 ± .004)
(NOTE 4)
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
0.254
(.010) 0° – 6° TYP
DETAIL “A”
DETAIL “A”
GAUGE PLANE
5.23
(.206)
MIN 3.20 – 3.45
(.126 – .136)
0.889 ± 0.127
(.035 ± .005)
RECOMMENDED SOLDER PAD LAYOUT
0.305 ± 0.038
(.0120 ± .0015)
TYP
0.50
(.0197)
BSC
11
LTC2051/LTC2052
20512fd
U
PACKAGE DESCRIPTIO
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
S Package
14-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610)
1
N
234
.150 – .157
(3.810 – 3.988)
NOTE 3
14 13
.337 – .344
(8.560 – 8.738)
NOTE 3
.228 – .244
(5.791 – 6.197)
12 11 10 9
567
N/2
8
.016 – .050
(0.406 – 1.270)
.010 – .020
(0.254 – 0.508)× 45°
0° – 8° TYP
.008 – .010
(0.203 – 0.254)
S14 0502
.053 – .069
(1.346 – 1.752)
.014 – .019
(0.355 – 0.483)
TYP
.004 – .010
(0.101 – 0.254)
.050
(1.270)
BSC
.245
MIN
N
123 N/2
.160 ±.005
RECOMMENDED SOLDER PAD LAYOUT
.045 ±.005
.050 BSC
.030 ±.005
TYP
INCHES
(MILLIMETERS)
NOTE:
1. DIMENSIONS IN
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
GN Package
16-Lead Plastic SSOP (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1641)
GN16 (SSOP) 0204
12345678
.229 – .244
(5.817 – 6.198) .150 – .157**
(3.810 – 3.988)
16 15 14 13
.189 – .196*
(4.801 – 4.978)
12 11 10 9
.016 – .050
(0.406 – 1.270)
.015 ± .004
(0.38 ± 0.10) × 45°
0° – 8° TYP
.007 – .0098
(0.178 – 0.249)
.0532 – .0688
(1.35 – 1.75)
.008 – .012
(0.203 – 0.305)
TYP
.004 – .0098
(0.102 – 0.249)
.0250
(0.635)
BSC
.009
(0.229)
REF
.254 MIN
RECOMMENDED SOLDER PAD LAYOUT
.150 – .165
.0250 BSC.0165 ±.0015
.045 ±.005
* DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
INCHES
(MILLIMETERS)
NOTE:
1. CONTROLLING DIMENSION: INCHES
2. DIMENSIONS ARE IN
3. DRAWING NOT TO SCALE
S8 Package
8-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610)
.016 – .050
(0.406 – 1.270)
.010 – .020
(0.254 – 0.508)× 45°
0°– 8° TYP
.008 – .010
(0.203 – 0.254)
SO8 0303
.053 – .069
(1.346 – 1.752)
.014 – .019
(0.355 – 0.483)
TYP
.004 – .010
(0.101 – 0.254)
.050
(1.270)
BSC
1234
.150 – .157
(3.810 – 3.988)
NOTE 3
8765
.189 – .197
(4.801 – 5.004)
NOTE 3
.228 – .244
(5.791 – 6.197) .245
MIN .160 ±.005
RECOMMENDED SOLDER PAD LAYOUT
.045 ±.005
.050 BSC
.030 ±.005
TYP
INCHES
(MILLIMETERS)
NOTE:
1. DIMENSIONS IN
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
12
LTC2051/LTC2052
20512fd
© LINEAR TECHNOLOGY CORPORATION 2000
LT 0108 REV D • PRINTED IN USA
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
FAX: (408) 434-0507
www.linear.com
RELATED PARTS
PART NUMBER DESCRIPTION COMMENTS
LTC1051/LTC1053 Precision Zero-Drift Op Amp Dual/Quad
LTC1151 ±15V Zero-Drift Op Amp Dual High Voltage Operation ±18V
LTC1152 Rail-to-Rail Input and Output Zero-Drift Op Amp Single Zero-Drift Op Amp with Rail-to-Rail Input and Output and Shutdown
LTC2050 Zero-Drift Op Amp in SOT-23 Single Supply Operation 2.7V to ±5V, Shutdown
LTC2053 Zero-Drift Precision Instrumentation Amp MS8, 116dB CMRR, Two External Resistors Set Gain
LTC6800 Rail-to-Rail Input and Output Instrumentation Amp Low Cost, MS8, Two External Resistors Set Gain
+
R
R2
1/4 LTC2052
R1
1
3
2
+
R
R2
1/4 LTC2052
R1
74
11
14
5
6
VIN
+
R
1/4 LTC2052
12
13
0.1μF
5V
–5V
+
R
R2
1/4 LTC2052
R1
8
10
9
0.1μF
20512 F02
VOUT
VOUT
VIN = 3 ; INPUT DC – 10Hz NOISE 0.8μVP-P =
R2
R1 NOISE OF EACH PARALLEL OP AMP
3
Paralleling Amplifiers to Improve Noise
TYPICAL APPLICA TIO
U