0.145'' 10-Character 5x5 Dot Matrix Serial Input Dot Addressable Intelligent Display(R) Devices Lead (Pb) Free Product - RoHS Compliant Standard Red SCD55100A Yellow SCD55101A High Efficiency Red SCD55102A Green SCD55103A High Efficiency Green SCD55104A Slimline DESCRIPTION FEATURES * Low Profile Package: 60% Smaller than Industry Standard 10-Digit Display * Ten 3.68 mm (0.145") 5 x 5 Dot Matrix Characters in Red, Yellow, High Efficiency Red, Green, or High Efficiency Green * Optimum Display Surface Efficiency (display area to package ratio) * Low Power-30% Less Power Dissipation than 5 x 7 Format * High Speed Data Input Rate: 5.0 MHz * ROMless Serial Input, Dot Addressable Display--Ideal for User Defined Characters * Built-in Decoders, Multiplexers and LED Drivers * Readable from 1.8 meters (6 Feet) * Wide Viewing Angle, X Axis 55, Y Axis 65 * Attributes: - 250 bit RAM for User Defined Characters - Eight Dimming Levels - Power Down Mode (<250 W) - Hardware/Software Clear Function - Lamp Test * Internal or External Clock * End-Stackable Dual-in-line Plastic Package - 3.3 V Capability The SCD55100A (Red), SCD55101A (Yellow), SCD55102A (HER), SCD55103A (Green) and SCD55104A (HEG) are eight digit dot addressable 5 x 5 matrix, Serial Input, Intelligent Display devices. The ten 3.68 mm (0.145") high digits are packaged in a rugged, high quality optically transparent, standard 7.62 mm (0.3") pin spacing 28 pin plastic DIP. The on-board CMOS has a 250 bit RAM, one bit associated with one LED, each to generate User Defined Characters. Due to the reduced LED count, power requirement and heat dissipation are reduced by 30%. Additionally in Power Down Mode quiescent current is <50 A. The SCD5510XA is designed to work with the Serial port of most common microprocessors. The multiplex Clock I/O (CLK I/O) and multiplex Clock Select (CLKSEL) pins offer the user the capability to supply a high speed external multiplex clock. This feature can minimize audio in-band interference for portable communication equipment or eliminate the visual synchronization effects found in high vibration environments such as avionics equipment. 2008-07-22 1 SCD55100A, SCD55101A, SCD55102A, SCD55103A, SCD55104A Ordering Information Type Color of Emission Character Height mm (inch) Ordering Code SCD55104A standard red Q68100A0988 SCD55101A yellow Q68100A0989 SCD55102A high efficiency red SCD55103A green Q68100A0991 SCD55104A high efficiency green Q68100A0992 3.68 (0.145) Intensity Code EIA Date Code Part No SCD5510XA OSRAM YYWW Hue Code ZY Seating Plane 2.54 (0.100) typ. 33.02 (1.300) ref. 1 1.27 (0.050) typ. 0.25 (0.010) Tol. non accum. 1 5.08 (0.200) Color Code 0.25 (0.010) Dimensions in mm (inch) 4.06 (0.160) 0.51 (0.020) Package Outlines Q68100A0990 0.3 (0.012) typ. 7.62 (0.300) 0.51 (0.020) 1 38.1 (1.500) max. 3.81 (0.150) 3.68 (0.145) 10 (0.394) 0.15 (0.006) 2.03 (0.080) Pin Indicator 1. 2. 3. 4. 5. 2008-07-22 Dimension is at Seating Plane. Display matrix and pins centered on package outline. Display matrix centered to pin array. Tolerance: .XXX (0.010) Lead dim .018 wide x .012 THK 2 IDOD5211 SCD55100A, SCD55101A, SCD55102A, SCD55103A, SCD55104A Maximum Ratings Parameter Symbol Value Unit Operating temperature range Top - 40 ... + 85 C Storage temperature range Tstg - 40 ... + 100 C DC Supply Voltage VCC -0.5 to + 7.0 V -0.5 to VCC to 0.5 V 260 C 85 % 2.0 kV Input Current 100 mA Power Dissipation at 85C 1.7 W Maximum Number of LEDs on at 100% Brightness 160 IC Junction Temperature 125 Input Voltage Levels Relative to GND Solder Temperature 1.59 mm (0.063") below seating plane, t < 5.0 s TS Relative Humidity ESD (100 pF, 1.5 k) VZ C Optical Characteristics at 25C (VCC=5.0 V at 100% brightness level, viewing angle: X axis 55, Y axis 65) Green SCD55103A High Efficiency Green SCD55104A Dominant Wavelength 36 78 124 208 124 237 124 238 124 500 cd/dot cd/dot (typ.) peak 665 583 630 565 568 nm (typ.) dom 639 584 626 569 572 nm (min.) IV (typ.) Notes: 1. Dot to dot intensity matching at 100% brightness is 1.8:1. 2. Displays are binned for hue at 2.0 nm intervals. 3. Displays within a given intensity category have an intensity matching of 1.5:1 (max.). 2008-07-22 Unit High Efficiency Red SCD55102A Peak Wavelength Values Yellow SCD55101A Luminous Intensity Symbol Red SCD55100A Description 3 SCD55100A, SCD55101A, SCD55102A, SCD55103A, SCD55104A Data Write Cycle 3.5 V LOAD 1.5 V TLDS TLDH 3.5 V DATA 1.5 V TDS TDH 3.5 V SDCLK 1.5 V TSDCW TSDCW TSDCLK Period Instruction Cycle TWR TBL LOAD SDCLK DATA D0 D1 D2 D3 D4 D5 D6 D7 D0 D4 D5 D6 D7 D0 OR LOAD SDCLK DATA D0 D1 D2 D3 Maximum Power Dissipation vs. Temperature PD IDDG5332 4.0 W 3.5 3.0 2.5 2.0 JA = 31 C/W 1.5 1.0 0.5 0 -40 -20 0 20 40 60 C 100 TA 2008-07-22 4 SCD55100A, SCD55101A, SCD55102A, SCD55103A, SCD55104A Electrical Characteristics (over operating temperature) Parameter Min. Typ. Max. Units Conditions 4.5 5.0 5.5 V -- -- 50 -- A VCC=5.0 V, all inputs=0 V or VCC ICC 10 digits 16 dots/character -- 250 365 mA VCC=5.0 V, "#" displayed in all 10 digits at 100% brightness at 25C IIL Input current -- -- -10 A VCC=5.0 V, VIN=0 V (all inputs) IIH Input current -- -- 10 A VCC=VIN=5.0 V (all inputs) VIH 3.5 -- -- V VCC=4.5 V to 5.5 V VIL -- -- 1.5 V VCC=4.5 V to 5.5 V IOH (CLK I/O) -- -8.9 -- mA VCC=4.5 V, VOH=2.4 V IOL (CLK I/O) -- 1.6 -- mA VCC=4.5 V, VOL=0.4 V JA -- -- 31 C/W -- Fext External Clock Input Frequency 120 -- 347 kHz VCC=5.0 V, CLKSEL=0 Fosc Internal Clock Input Frequency 120 -- 347 kHz VCC=5.0 V, CLKSEL=1 Clock I/O Bus Loading -- -- 240 pF -- Clock Out Rise Time -- -- 500 ns VCC=4.5 V, VOH=2.4 V Clock Out Fall Time -- -- 500 ns VCC=4.5 V, VOH=0.4 V FM, Digit 375 768 1086 Hz -- VCC ICC (Pwr Dwn Mode) (4) Notes: 1) Peak current 5/3 x ICC. 2) Unused inputs must be tied high. 3) Contact Infineon for 3.3 V operation. 4) External oscillator must be stopped if being used to maintain an ICC <50 A. Input/Output Circuits Figures Inputs" and Clock I/O" show the input and output resistor/diode networks used for ESD protection and to eliminate substrate latch-up caused by input voltage over/under shoot. Top View 28 15 1 14 IDPA5117 Inputs Clock I/O VCC Input VCC 1 k GND GND IDCD5026 IDCD5021 2008-07-22 1 k Input/Output 5 SCD55100A, SCD55101A, SCD55102A, SCD55103A, SCD55104A Pin Assignment Pin Definitions Pin Function Pin Function Pin Function Definitions 1 SDCLK 28 GND 1 SDCLK 2 LOAD 27 DATA Loads data into the 8-bit serial data register on a low to high transition. 3 NP 26 NP 2 LOAD 4 NP 25 NP Low input enables data clocking into 8-bit serial shift register. When LOAD goes high, the contents of 8-bit serial Shift Register will be decoded. 5 NP 24 NP 3 NP No Pin 6 NP 23 NP 4 NP No Pin 7 NP 22 NP 5 NP No Pin 8 NP 21 NP 6 NP No Pin 9 NP 20 NP 7 NP No pin 10 NP 19 VCC 8 NP No pin 11 NP 18 NC 9 NP No Pin 12 NP 17 NP 10 NP No Pin 13 RST 16 CLKSEL 11 NP No Pin 14 GND 15 CLK I/O 12 NP No Pin 13 RST Asynchronous input, when low will clear the Multiplex Counter, User RAM and Data Register. Control Word Register is set to 100% brightness and the Address Register is set to select Digit 0. The display is blanked. Switching Specifications (over operating temperature range and VCC=4.5 V to 5.5 V) Symbol Description Min. Units TRC Reset Active Time 600 ns TLDS Load Setup Time 50 ns 14 GND Power supply ground TDS Data Setup Time 50 ns 15 CLK I/O Outputs master clock or inputs external clock. TSDCLK Clock Period 200 ns 16 CLKSEL H=internal clock, L=external clock TSDCW Clock Width 70 ns 17 NP No Pin TLDH Load Hold Time 0 ns 18 NC No connection TDH Data Hold Time 25 ns 19 VCC Power supply/heat sink TWR Total Write Time 2.2 s 20 NP No Pin TBL Time Between Loads 600 ns 21 NP No pin 22 NP No pin 23 NP No Pin 24 NP No Pin 25 NP No Pin R0 26 NP No Pin R1 27 DATA Serial data input 28 GND Power supply ground Note: TSDCW is the minimum time the SDCLK may be low or high. The SDCLK period must be a minimum of 200 ns. Dot Matrix Format mm (inch) C0 C1 C2 C3 C4 R3 R4 3.68 (0.145) 0.28 (0.011) typ. 0.84 (0.033) typ. 2.03 (0.080) R5 0.56 (0.022) typ. Tolerance: 0.25 (0.010) IDOD5212 2008-07-22 6 SCD55100A, SCD55101A, SCD55102A, SCD55103A, SCD55104A Operation of the SCD5510XA Display Column and Row Format C0 C1 C2 C3 C4 Row 0 1 1 1 1 1 Row 1 0 0 1 0 0 Row 2 0 0 1 0 0 Row 3 0 0 1 0 0 Row 4 0 0 1 0 0 The SCD5510XA display consists of a CMOS IC containing control logic and drivers for eight 5 x 5 characters. These components are assembled in a compact (38 mm x 10 mm) plastic package. Individual LED dot addressablity allows the user great freedom in creating special characters or mini-icons. The User Definable Character Set Examples illustrate 200 different character and symbol possibilities. The use of a serial data interface provides a highly efficient interconnection between the display and the mother board. The SCD5510XA requires only 4 lines as compared to 15 for an equivalent 8 character parallel input part. The on-board CMOS IC is the electronic heart of the display. The IC accepts decoded serial data, which is stored in the internal RAM. Asynchronously the RAM is read by the character multiplexer at a strobe rate that results in a flicker free display. Figure Row and Column Location" (page 9) shows the three functional areas of the IC. These include: the input serial data register and control logic, a 250 bits two port RAM, and an internal multiplexer/display driver. Column Data Ranges Row 0 00H to 1FH Row 1 20H to 3FH Row 2 40H to 5FH Row 3 60H to 7FH Row 4 80H to 9FH SCD5510XA Block Diagram 10 - 5 x 5 Characters Row Decoder & Driver 10 0 1 2 3 4 5 6 7 8 9 20 Column Logic & Driver MUX CLK I/O MUX Clock SEL RESET Counter Chain & Timing Logic Brightness & Lamp Test Power Down Oscillator Display Multiplexer LOAD 5 D4 D3 D2 D1 D0 DATA & 3 OPCODE Decode 5 Character Adddress Register Control Word Adddress Register 5 RAM 250 bits Write 50 x 5 Read 10 x 25 Column Output Serial Data Clock D7 D6 D5 OPCODE Write Character/ Row Address Decode Serial Data 4 Software Clear IDBD5069 2008-07-22 7 SCD55100A, SCD55101A, SCD55102A, SCD55103A, SCD55104A The following explains how to format the serial data to be loaded into the display. The user supplies a string of bit mapped decoded characters. The contents of this string is shown in Figure Loading Serial Character Data a" (page 8). Figure Loading Serial Character Data b" (page 8) shows that each character consist of six 8 bit words. The first word encodes the display character location and the succeeding five bytes are row data. The row data represents the status (On, Off) of individual column LEDs. Figure Loading Serial Character Data c" (page 8) shows that each 8 bit word is formatted to include a three bit Operational Code (OPCODE) defined by bits D7-D5 and five bits (D4-D0) representing Column Data, Character Address, or Control Word Data. Figure Loading Serial Character Data d" (page 8) shows the sequence for loading the bytes of data. Bringing the LOAD line low enables the serial register to accept data. The shift action occurs on the low to high transition of the serial data clock (SDCLK). The least significant bit (D0) is loaded first. After eight clock pulses the LOAD line is brought high. With this transition the OPCODE is decoded. The decoded OPCODE directs D4-D0 to be latched in the Character Address register, stored in the RAM as Column data, or latched in the Control Word register. The control IC requires a minimum 600 ns delay between successive byte loads. As indicated in Figure Loading Serial Character Data a" (page 8), a total of 660 clock cycles (60-8 bit words) are required to load all ten characters into the display. The Character Address Register bits, D4-D0 (Table Load Character Address" (page 9)) and Row Address Register bits, D7-D5 (Table Load Column Data" (page 9)) direct the Column Data bits, D4-D0 (Table Load Column Data" (page 9)) to specific RAM location. Table Character 'D'" (page 8) shows the Row Address for the example character "D." Column data is written and read asynchronously from the 250 bit RAM. Once loaded the internal oscillator and character multiplexer reads the data from the RAM. These characters are row strobed with column data as shown in Figures Row and Column Location" (page 9) and Row Strobing" (page 10). The character strobe rate is determined by the internal or user supplied external MUX Clock and the IC's / 320 counter. Character "D" Op code D7 D6 D5 Column Data D4 D3 D2 C0 C1 C2 D1 C3 D0 C4 Hex Row 0 0 0 0 1 1 1 1 0 1E Row 1 0 0 1 1 0 0 0 1 31 Row 2 0 1 0 1 0 0 0 1 51 Row 3 0 1 1 1 0 0 0 1 71 Row 4 1 0 0 1 1 1 1 0 9E Loading Serial Character Data Example: Serial Clock = 5 MHz, Clock Period = 200 ns 660 Clock Cycles, 132 s a. Character 0 Character 1 Character 2 Character 3 Character 4 Character 5 Character 6 Character 7 66 Clock Cycles, 13.2 s b. Character 0 Address Row 0 Column Data Row 1 Column Data Row 3 Column Data Row 4 Column Data 11 Clock Cycles, 2.2 s 11 Clock Cycles, 2.2 s c. Row 2 Column Data Column Data Character Address Time OPCODE Time OPCODE D0 D1 D2 D3 D4 D5 D6 D7 Between D0 D1 D2 D3 D4 D5 D6 D7 Between Loads Loads 0 0 0 0 0 1 0 0 600 ns(min.) C4 C3 C2 C1 C0 600 ns(min.) LOAD Serial Clock d. Clock Period DATA D0 D1 D2 D3 D4 D5 D6 t0 2008-07-22 8 D7 Time between LOADS Character 8 Character 9 SCD55100A, SCD55101A, SCD55102A, SCD55103A, SCD55104A Load Character Address Display Brightness Op code D7 D6 D5 Character Address D4 D3 D2 D1 D0 Hex Operation Load Op code D7 D6 D5 Control Word D4 D3 D2 D1 D0 1 0 1 1 0 0 0 0 1 0 1 1 0 0 0 1 0 1 1 0 0 1 0 1 1 0 1 0 1 1 1 0 1 1 0 1 Hex Operation Level B0 Character 0 1 1 1 1 0 0 0 0 F0 100% 1 B1 Character 1 1 1 1 1 0 0 0 1 F1 53% 1 0 B2 Character 2 1 1 1 1 0 0 1 0 F2 40% 0 1 1 B3 Character 3 1 1 1 1 0 0 1 1 F3 27% 0 1 0 0 B4 Character 4 1 1 1 1 0 1 0 0 F4 20% 1 0 1 0 1 B5 Character 5 1 1 1 1 0 1 0 1 F5 13% 1 1 0 1 1 0 B6 Character 6 1 1 1 1 0 1 1 0 F6 6.6% 0 1 1 0 1 1 1 B7 Character 7 1 0 1 1 1 0 0 0 B8 Character 8 1 0 1 1 1 0 0 1 B9 Character 9 The SCD5510XA offers a unique Display Power Down feature which reduces ICC to less than 50 A. When FFHEX is loaded, as shown in Table Power Down" (page 9), the display is set to 0% brightness and the internal multiplex clock is stopped. When in the Power Down mode data may still be written into the RAM. The display is reactivated by loading a new Brightness Level Control Word into the display. Load Column Data Op code D7 D6 D5 Column Data D4 D3 D2 D1 D0 Operation Load 0 0 0 C0 C1 C2 C3 C4 Row 0 0 0 1 C0 C1 C2 C3 C4 Row 1 Op code D7 D6 D5 Control Word D4 D3 D2 D1 D0 0 1 0 C0 C1 C2 C3 C4 Row 2 1 1 1 0 1 1 C0 C1 C2 C3 C4 Row 3 1 0 0 C0 C1 C2 C3 C4 Row 4 Power Down 1 1 1 1 1 Hex Operation Level FF 0% brightness The Lamp Test is enabled by loading F8 HEX, Table Lamp Test" (page 9), into the serial shift register. This Control Word sets all of the LEDs to a 53% brightness level. Operation of the Lamp Test has no affect on the RAM and is cleared by loading a Brightness Control Word. The user can activate four Control functions. These include: LED Brightness Level, Lamp Test, IC Power Down, or Display Clear. OPCODEs and five bit words are used to initiate these functions. The OPCODEs and Control Words for the Character Address and Loading Column Data are shown in Tables Load Character Address" (page 9) and Load Column Data" (page 9). The user can select seven specific LED brightness levels, Table Display Brightness" (page 9). These brightness levels (in percentages of full brightness of the display) include: 100% (F0 HEX), 53% (F1HEX), 40% (F2HEX), 27% (F3HEX), 20% (F4HEX), 13% (F5HEX), and 6.6% (F6HEX). The brightness levels are controlled by changing the duty factor of the row strobe pulse. Lamp Test Op code D7 D6 D5 Control Word D4 D3 D2 D1 D0 Hex 1 1 1 1 0 B B B 1 1 1 1 1 0 0 1 Operation Level Lamp Test (OFF) F8 Lamp Test (OFF) Row and Column Location Row 0 Off LED Row 1 On LED Row 2 Previously "on" LED The Software Clear (C0HEX), given in Table Software Clear" (page 9), clears the Address Register and the RAM. The display is blanked and the Character Address Register will be set to Character 0. The internal counter and the Control Word Register are unaffected. The Software Clear will remain active until the next data input cycle is initiated. Row 3 Software Clear Row 4 Op code D7 D6 D5 Control Word D4 D3 D2 D1 D0 1 0 0 0 1 2 3 Columns 4 IDXX5187 2008-07-22 9 1 0 0 0 0 Hex Operation Level C0 CLEAR SCD55100A, SCD55101A, SCD55102A, SCD55103A, SCD55104A Row Strobing Load Row 0 Row Load Load Row 3 Load Row 2 Load Row 1 Load Row 4 Row 0 Row 0 Row 0 Row 0 Row 0 Row 1 Row 1 Row 1 Row 1 Row 1 Row 2 Row 2 Row 2 Row 2 Row 2 Row 3 Row 3 Row 3 Row 3 Row 3 Row 4 Row 4 0 1 2 3 4 Columns Row 4 Row 4 0 1 2 3 4 Columns 0 1 2 3 4 Columns Row 4 0 1 2 3 4 Columns 0 1 2 3 4 Columns IDXX5188 Multiplexer and Display Driver The ten characters are row multiplexed with RAM resident column data. The strobe rate is established by the internal or external MUX Clock rate. The MUX Clock frequency is divided by a 320 counter chain. This results in a typical strobe rate of 750 Hz. By pulling the Clock SEL line low, the display can be operated from an external MUX Clock. The external clock is attached to the CLK I/O connection (pin 15). The maximum external MUX Clock frequency should be limited to 1.0 MHz. An asynchronous hardware Reset (pin 13) is also provided. Bringing this pin low will clear the Character Address Register, Control Word Register, RAM, and blanks the display. This action leaves the display set at Character Address 0, and the Brightness Level set at 100%. ESD Protection The input protection structure of the SCD55100A/1A/2A/3A/4A provides significant protection against ESD damage. It is capable of withstanding discharges greater than 2.0 kV. Take all the standard precautions, normal for CMOS components. These include properly grounding personnel, tools, tables, and transport carriers that come in contact with unshielded parts. If these conditions are not, or cannot be met, keep the leads of the device shorted together or the parts in anti-static packaging. Soldering Considerations The SCD55100A/1A/2A/3A/4A can be hand soldered with SN63 solder using a grounded iron set to 260C. Wave soldering is also possible following these conditions: Preheat that does not exceed 93C on the solder side of the PC board or a package surface temperature of 85C. Water soluble organic acid flux (except carboxylic acid) or rosin-based RMA flux without alcohol can be used. Electrical & Mechanical Considerations Interconnect Considerations Optimum product performance can be had when the following electrical and mechanical recommendations are adopted. The SCD5510XA's IC is constructed in a high speed CMOS process, consequently high speed noise on the SERIAL DATA, SERIAL DATA CLOCK, LOAD and RESET lines may cause incorrect data to be written into the serial shift register. Adhere to transmission line termination procedures when using fast line drivers and long cables (>10 cm). Good digital grounds (pins 14, 28) and power supply decoupling (pins 6, 9, 20, 23) will insure that ICC (<400 mA peak) switching currents do not generate localized ground bounce. Therefore it is recommended that each display package use a 0.1 F and 20 F capacitor between VCC and ground. Wave temperature of 245C 5C with a dwell between 1.5 sec. to 3.0 sec. Exposure to the wave should not exceed temperatures above 260C for five seconds at 1.59 mm (0.063") below the seating plane. The packages should not be immersed in the wave. Post Solder Cleaning Procedures The least offensive cleaning solution is hot D.I. water (60 C) for less than 15 minutes. Addition of mild saponifiers is acceptable. Do not use commercial dishwasher detergents. For faster cleaning, solvents may be used. Exercise care in choosing solvents as some may chemically attack the nylon package. Maximum exposure should not exceed two minutes at elevated temperatures. Acceptable solvents are TF (trichlorotrifluorethane), TA, 111 Trichloroethane, and unheated acetone.(1) When the internal MUX Clock is being used connect the CLKSEL pin to VCC. In those applications where RESET will not be connected to the system's reset control, it is recommended that this pin be connected to the center node of a series 0.1 F and 100 k RC network. Thus upon initial power up the RESET will be held low for 10 ms allowing adequate time for the system power supply to stabilize. Note: 1) Acceptable commercial solvents are: Basic TF, Arklone, P. Genesolv, D. Genesolv DA, Blaco-Tron TF and Blaco-Tron TA. Unacceptable solvents contain alcohol, methanol, methylene chloride, ethanol, TP35, TCM, TMC, TMS+, TE, or TES. Since many commercial mixtures exist, contact a solvent vendor for chemical composition information. Some major solvent manufacturers are: Allied Chemical Corporation, Specialty Chemical Division, Morristown, NJ; Baron-Blakeslee, Chicago, IL; Dow Chemical, Midland, MI; E.I. DuPont de Nemours & Co., Wilmington, DE. The SCD5510XA allows up to 1.7 W of power dissipation at 70 and 1.29 W power dissipation at a maximum operating temperature of 85C. Approximately 60% of this power is dissipated by the IC to the PC board via the VCC connection (pins 6, 9, 20, 23). Optimum thermal reliability is obtained by connecting all of the VCC pins to a common pad located on both sides of the PC board. This technique offers a low thermal resistance for IC to system ambient. 2008-07-22 10 SCD55100A, SCD55101A, SCD55102A, SCD55103A, SCD55104A For further information refer to Appnotes 18 and 19 at www.osram-os.com An alternative to soldering and cleaning the display modules is to use sockets. Naturally, 28 pin DIP sockets 7.62 mm (0.300") wide with 2.54 mm (0.100") centers work well for single displays. Multiple display assemblies are best handled by longer SIP sockets or DIP sockets when available for uniform package alignment. Socket manufacturers are Aries Electronics, Inc., Frenchtown, NJ; Garry Manufacturing, New Brunswick, NJ; Robinson-Nugent, New Albany, IN; and Samtec Electronic Hardward, New Albany, IN. For further information refer to Appnote 22 at www.osram-os.com Optical Considerations The 3.683 mm (0.145") high character of the SCD5510XA gives readability up to eight feet. Proper filter selection enhances readability over this distance. Using filters emphasizes the contrast ratio between a lit LED and the character background. This will increase the discrimination of different characters. The only limitation is cost. Take into consideration the ambient lighting environment for the best cost/benefit ratio for filters. Incandescent (with almost no green) or fluorescent (with almost no red) lights do not have the flat spectral response of sunlight. Plastic band-pass filters are an inexpensive and effective way to strengthen contrast ratios. The SCD5510A/2A are red/high efficiency red displays and should be matched with long wavelength pass filter in the 570 nm to 590 nm range. The SCD55103A/4A should be matched with a yellow-green band-pass filter that peaks at 565 nm. For displays of multiple colors, neutral density grey filters offer the best compromise. SCD Interface with Siemens/Intel 8031 Microprocessor (using serial port in mode 0) VCC 28 27 23 DATA 20 19 16 15 28 27 23 DATA 20 19 16 15 0.01 F VCC 18 19 VCC 9 XTAL2 RxD XTAL1 TxD U1 8031 RST SCD Slave SCD Master 40 P3.7 P3.3 P3.4 10 11 17 SD CLK LOAD 6 1 2 9 13 14 SD CLK LOAD 1 2 6 9 + 13 22 F TAN 14 VCC 13 14 IDCD5221 2008-07-22 11 SCD55100A, SCD55101A, SCD55102A, SCD55103A, SCD55104A Additional contrast enhancement is gained by shading the displays. Plastic band-pass filters with built-in louvers offer the next step up in contrast improvement. Plastic filters can be improved further with anti-reflective coatings to reduce glare. The trade-off is fuzzy characters. Mounting the filters close to the display reduces this effect. Take care not to overheat the plastic filter by allowing for proper air flow. Optimal filter enhancements are gained by using circular polarized, anti-reflective, band-pass filters. The circular polarizing further enhances contrast by reducing the light that travels through the filter and reflects back off the display to less than 1%. Several filter manufacturers supply quality filter materials. Some of them are: Panelgraphic Corporation, W. Caldwell, NJ; SGL Homalite, Wilmington, DE; 3M Company, Visual Products Division, St. Paul, MN; Polaroid Corporation, Polarizer Division, Cambridge, MA; Marks Polarized Corporation, Deer Park, NY, Hoya Optics, Inc., Fremont, CA. One last note on mounting filters: recessing displays and bezel assemblies is an inexpensive way to provide a shading effect in overhead lighting situations. Several Bezel manufacturers are: R.M.F. Products, Batavia, IL; Nobex Components, Griffith Plastic Corp., Burlingame, CA; Photo Chemical Products of California, Santa Monica, CA; I.E.E.-Atlas, Van Nuys, CA. Microprocessor Interface The microprocessor interface is through the serial port, SPI port or one out of eight data bits on the eight bit parallel port and also control lines SDCLK and LOAD. Power Up Sequence Upon power up display will come on at random. Thus the display should be reset at power-up. The reset will set the Address Register to Digit 0, User RAM is set to 0 (display blank) the Control Word is set to 0 (100% brightness with Lamp Test off) and the internal counters are reset. SCD5510XA Interface with Siemens/Intel 8031 Microprocessor VCC 28 40 19 XTAL2 U1 8031 VCC 1 9 P3.0 P3.1 XTAL1 20 19 16 15 28 27 23 DATA SCD Master VCC 18 27 23 DATA P3.6 P0.0 10 SD CLK LOAD 6 1 2 9 20 19 16 15 0.01 F SCD Slave 13 14 SD CLK LOAD 1 2 6 9 + 13 22 F TAN 14 11 16 39 VCC RST P1.0 20 IDCD5222 2008-07-22 12 SCD55100A, SCD55101A, SCD55102A, SCD55103A, SCD55104A SCD5510XA Interface with Motorola 68HC05C4 Microprocessor (using SPI port) VCC 28 SD CLK LOAD 1 2 6 40 39 OSC1 16 15 28 27 23 DATA 9 20 19 16 15 0.01 F SCD Slave 13 14 SD CLK LOAD 2 6 1 9 22 F TAN + 13 14 33 SCLK U1 68HC05C4 1 19 10 PA1 VCC 9 11 PA0 OSC2 20 SCD Master VCC 38 27 23 DATA 32 MOSI VCC RST PA2 20 IDCD5223 Cascading Multiple Displays Multiple displays can be cascaded using the CLKSEL and CLK I/O pins as shown below. The display designated as the Master Clock source should have its CLKSEL pin tied high and the slaves should have their CLKSEL pins tied low. All CLK I/O pins should be tied together. One display CLK I/O can drive 15 slave CLK I/Os. Use RST to synchronize all display counters. Cascading Multiple Displays RST VCC RST CLK I/O CLK SEL 14 more displays in between Intelligent Display DATA SDCLK RST CLK SEL Intelligent Display DATA LOAD CLK I/O SDCLK LOAD DATA SDCLK 0 A0 A1 A2 A3 Address Decoder Chip 15 LD CE 2008-07-22 Address Decode 1-14 IDCD5030 13 SCD55100A, SCD55101A, SCD55102A, SCD55103A, SCD55104A Loading Data Into the Display 3. 4. 5. If a different brightness is desired, load the proper brightness opcode into the Control Word Register. Load the Digit Address into the display. Load display row and column data for the selected digit. 6. Repeat steps 4 and 5 for all digits. Use following procedure to load data into the display: 1. Power up the display. 2. Bring RST low (600 ns duration minimum) to clear the Multiplex Counter, Address Register, Control Word Register, User Ram and Data Register. The display will be blank. Display brightness is set to 100%. Data Contents for the Word "Displays" Step D7 D6 D5 D4 D3 D2 D1 D0 Function A B (optional) 1 1 1 1 0 1 0 1 0 0 0 B 0 B 0 B CLEAR BRIGHTNESS SELECT 1 2 3 4 5 6 1 0 0 0 0 1 0 0 0 1 1 0 1 0 1 0 1 0 1 1 1 1 1 1 0 1 0 0 0 1 0 1 0 0 0 1 0 1 0 0 0 1 0 0 1 1 1 0 DIGIT D0 SELECT ROW 0 D0 (D) ROW 1 D0 (D) ROW 2 D0 (D) ROW 3 D0 (D) ROW 4 D0 (D) 7 8 9 10 11 12 1 0 0 0 0 1 0 0 0 1 1 0 1 0 1 0 1 0 1 0 0 0 0 0 0 1 0 0 0 1 0 1 1 1 1 1 0 1 0 0 0 1 1 0 0 0 0 0 DIGIT D1 SELECT ROW 0 D1 (I) ROW 1 D1 (I) ROW 2 D1 (I) ROW 3 D1 (I) ROW 4 D1 (I) 13 14 15 16 17 18 1 0 0 0 0 1 0 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 1 1 0 1 0 1 0 1 0 0 1 0 DIGIT D2 SELECT ROW 0 D2 (S) ROW 1 D2 (S) ROW 2 D2 (S) ROW 3 D2 (S) ROW 4 D2 (S) 19 20 21 22 23 24 1 0 0 0 0 1 0 0 0 1 1 0 1 0 1 0 1 0 1 1 1 1 1 1 0 1 0 1 0 0 0 1 0 1 0 0 1 1 0 1 0 0 1 0 1 0 0 0 DIGIT D3 SELECT ROW 0 D3 (P) ROW 1 D3 (P) ROW 2 D3 (P) ROW 3 D3 (P) ROW 4 D3 (P) 25 26 27 28 29 30 1 0 0 0 0 1 0 0 0 1 1 0 1 0 1 0 1 0 1 1 1 1 1 1 0 0 0 0 0 1 1 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 1 DIGIT D4 SELECT ROW 0 D4 (L) ROW 1 D4 (L) ROW 2 D4 (L) ROW 3 D4 (L) ROW 4 D4 (L) 31 32 33 34 35 36 1 0 0 0 0 1 0 0 0 1 1 0 1 0 1 0 1 0 1 0 0 1 1 1 0 0 1 1 0 0 1 1 0 1 0 0 0 0 1 1 0 0 1 0 0 1 1 1 DIGIT D5 SELECT ROW 0 D5 (A) ROW 1 D5 (A) ROW 2 D5 (A) ROW 3 D5 (A) ROW 4 D5 (A) 37 38 39 40 41 42 1 0 0 0 0 1 0 0 0 1 1 0 1 0 1 0 1 0 1 1 0 0 0 0 0 0 1 0 0 0 1 0 0 1 1 1 1 0 1 0 0 0 0 1 0 0 0 0 DIGIT D6 SELECT ROW 0 D6 (Y) ROW 1 D6 (Y) ROW 2 D6 (Y) ROW 3 D6 (Y) ROW 4 D6 (Y) 43 44 45 46 47 48 1 0 0 0 0 1 0 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 0 1 0 1 0 1 0 1 1 1 0 1 0 1 1 1 0 1 0 1 1 1 0 0 1 0 DIGIT D7 SELECT ROW 0 D7 (S) ROW 1 D7 (S) ROW 2 D7 (S) ROW 3 D7 (S) ROW 4 D7 (S) Note: If the display is already reset at Power Up, there is no need for Software Clear. 2008-07-22 14 SCD55100A, SCD55101A, SCD55102A, SCD55103A, SCD55104A User Definable Character Set Examples* Upper and Lower Case Alphabets HEX CODE HEX CODE HEX CODE HEX CODE HEX CODE HEX CODE HEX CODE 04 1E 1F HEX CODE HEX CODE 11 0E 1E 0F 1F 0F 2A 29 30 29 30 30 30 31 5F 4E 50 49 5E 5E 53 5F 44 71 69 70 69 70 70 71 71 64 91 9E 8F 9E 9F 90 8F 91 8E 01 13 10 11 11 0E 1E 0C 1E 21 30 3B 31 31 32 31 41 58 50 55 55 51 5E 56 5E 71 74 70 71 73 71 70 72 74 8E 93 9F 91 91 8E 90 8D 92 0F 1F 11 11 11 11 11 1F 2A 2A 30 34 24 31 31 39 24 31 22 4E 44 51 51 55 44 44 44 61 64 71 6A 7B 6A 64 68 9E 84 8E 84 91 91 84 9F 00 10 00 01 00 04 00 10 2E 30 2F 21 2E 2A 2F 30 20 52 5E 50 4F 5F 48 50 56 4C 04 72 71 70 71 70 7C 73 79 64 8D 9E 8F 8F 8E 88 8F 91 8E 00 10 0C 00 00 00 00 00 00 26 30 24 2A 36 2E 3E 2F 33 42 56 44 55 59 51 51 51 54 72 78 64 71 71 71 7E 6F 78 8C 96 8E 91 91 8E 90 81 90 00 08 00 00 00 00 00 00 23 3C 32 31 31 32 31 3E 44 48 52 51 55 4C 4A 44 62 6A 72 6A 7B 6C 64 68 8C 84 8D 84 91 92 98 9E IDCS5089 Numerals and Punctuation HEX CODE HEX CODE HEX CODE 0E 04 1E 33 2C 21 55 44 46 HEX CODE HEX CODE HEX CODE HEX CODE HEX CODE HEX CODE 1E 06 1F 06 1F 0E 21 2A 30 28 22 31 4E 5F 5E 5E 44 4E 79 64 68 61 62 61 71 68 71 8E 8E 9F 9E 82 9E 8E 88 8E 0E 0A 0F 06 19 08 0C 02 08 31 3F 34 29 3A 34 2C 24 24 4F 4A 4E 5C 44 4D 44 44 44 64 62 7F 65 68 6B 72 68 64 8C 8A 9E 9F 93 8D 80 82 88 0C 04 00 00 00 01 04 0A 07 2C 24 2C 20 20 22 24 2A 24 48 5F 4C 5F 40 44 44 40 44 64 64 64 60 6C 68 60 60 64 80 84 88 80 8C 90 84 80 87 10 1C 0E 00 0C 0C 02 00 08 28 24 35 20 2C 20 24 3F 24 44 44 57 40 40 4C 48 40 42 62 64 70 60 6C 64 64 7F 64 88 81 9C 8E 9F 8C 88 82 80 0E 06 0C 04 11 15 04 08 35 31 24 24 24 2A 2E 2A 42 48 42 40 44 5F 51 42 64 64 64 64 6E 6E 60 60 88 86 8C 84 84 95 80 80 IDCS5090 *CAUTION: No more than 128 LEDs "on" at one time at 100% brightness. 2008-07-22 15 SCD55100A, SCD55101A, SCD55102A, SCD55103A, SCD55104A User Definable Character Set Examples* (continued) Scientific Notations, etc. HEX CODE HEX CODE HEX CODE HEX CODE 1F HEX CODE HEX CODE HEX CODE HEX CODE 0C 0E HEX CODE 06 04 1F 0E 0D 2E 24 20 20 20 32 32 24 24 5E 48 59 56 4A 52 56 4E 4A 6E 71 75 79 64 72 71 71 71 86 8E 93 91 8A 8D 96 8E 9F 10 0E 10 00 09 01 04 0E 01 0F 3C 31 28 29 2E 2E 31 2E 32 52 5F 44 49 54 55 51 5A 52 72 71 6A 6E 64 6E 6A 6A 72 8C 81 8E 91 90 84 84 9B 8A 1F 18 1C 12 06 07 1C 0F 04 28 24 28 36 21 22 34 28 2E 44 48 44 5A 5A 59 5C 48 5F 6E 68 7C 78 67 67 66 60 78 9F 80 80 80 80 80 80 88 80 00 00 0E 04 04 0E 00 04 04 24 24 2E 3F 3E 2F 2E 3F 2E 4E 5F 4E 5F 5F 4E 5F 55 55 7F 6E 64 7E 6F 6E 7F 64 6E 8E 84 80 84 84 8E 80 84 84 04 04 1F 08 0A 15 1F 00 0E 22 28 31 2C 35 2A 35 3F 3F 5F 5F 51 4A 4A 55 5F 5F 5B 62 68 71 78 75 6A 75 7C 7F 84 84 9F 98 8A 95 9F 80 8E 00 00 00 00 00 0C 15 27 3C 20 20 23 3C 2E 4F 5F 5C 44 78 63 60 67 7F 7C 64 9C 87 83 9F 9F 9C 84 40 40 5F IDCS5091 Foreign Characters HEX CODE HEX CODE 1F 1F HEX CODE HEX CODE HEX CODE HEX CODE HEX CODE HEX CODE HEX CODE 01 04 00 02 08 1F 02 21 21 22 3F 3F 3F 3F 21 3F 5F 46 46 51 44 46 49 45 51 62 64 6A 61 64 6A 6A 67 62 8C 84 88 82 86 9F 92 88 8C 08 04 0F 08 0F 0A 19 0F 01 3F 3F 29 2F 21 3F 21 29 3E 49 44 51 52 41 4A 59 55 42 69 7F 62 62 61 62 62 63 7F 92 84 8C 82 9F 8C 9C 8C 86 15 0E 08 04 0E 1F 04 04 04 22 35 20 28 3F 20 21 3E 24 55 5F 4C 44 40 4A 44 44 51 62 64 6A 64 60 64 6E 68 71 8C 98 90 98 9F 9A 95 90 91 10 1F 0E 04 01 1F 1E 1F 0E 3F 21 20 28 21 28 22 21 20 50 41 4E 51 4A 5F 42 5F 5F 70 62 60 7F 64 68 62 61 61 8F 8C 8F 81 8A 87 9F 9F 8E 12 04 1E 0F 0F 0F 0F 00 32 34 25 34 30 33 34 2A 24 52 54 4F 5F 4F 55 57 5F 4E 08 64 75 74 74 64 79 74 74 72 88 96 8F 97 98 9E 8F 8B 8F 0A 02 04 0A 08 02 04 2E 24 2A 34 24 24 2A 51 4C 4E 52 51 51 51 7F 64 71 7A 71 71 71 91 8E 8E 96 8E 8E 8E IDCS5092 *CAUTION: No more than 128 LEDs "on" at one time at 100% brightness. 2008-07-22 16 SCD55100A, SCD55101A, SCD55102A, SCD55103A, SCD55104A Revision History: 2008-07-22 Previous Version: 2006-02-20 Page Subjects (major changes since last revision) Date of change all Lead free device 2006-01-23 6 Pin assignment corrected 2008-07-22 Published by OSRAM Opto Semiconductors GmbH Wernerwerkstrasse 2, D-93049 Regensburg www.osram-os.com (c) All Rights Reserved. Attention please! The information describes the type of component and shall not be considered as assured characteristics. Terms of delivery and rights to change design reserved. Due to technical requirements components may contain dangerous substances. For information on the types in question please contact our Sales Organization. If printed or downloaded, please find the latest version in the Internet. Packing Please use the recycling operators known to you. We can also help you - get in touch with your nearest sales office. By agreement we will take packing material back, if it is sorted. You must bear the costs of transport. For packing material that is returned to us unsorted or which we are not obliged to accept, we shall have to invoice you for any costs incurred. Components used in life-support devices or systems must be expressly authorized for such purpose! Critical components1) may only be used in life-support devices or systems2) with the express written approval of OSRAM OS. 1) 2) A critical component is a component used in a life-support device or system whose failure can reasonably be expected to cause the failure of that life-support device or system, or to affect its safety or the effectiveness of that device or system. Life support devices or systems are intended (a) to be implanted in the human body, or (b) to support and/or maintain and sustain human life. If they fail, it is reasonable to assume that the health and the life of the user may be endangered. 2008-07-22 17