8308AGI www.icst.com/products/hiperclocks.html REV. B JULY 25, 2005
1
Integrated
Circuit
Systems, Inc.
ICS8308I
LOW SKEW, 1-TO-8
DIFFERENTIAL/LVCMOS-TO-LVCMOS FANOUT BUFFER
BLOCK DIAGRAM PIN ASSIGNMENT
ICS8308I
24-Lead, 300-MIL TSSOP
4.4mm x 7.8mm x 0.92mm body package
G Package
Top View
Q0
GND
CLK_SEL
LVCMOS_CLK
CLK
nCLK
CLK_EN
OE
VDD
GND
Q1
VDDO
VDDO
Q2
GND
Q3
VDDO
Q4
GND
Q5
VDDO
Q6
GND
Q7
GENERAL DESCRIPTION
The ICS8308I is a low-skew, 1-to-8 Fanout Buffer
and a member of the HiPerClockS™ family of
High Performance Clock Solutions from ICS. The
ICS8308I has two selectable clock inputs. The
CLK, nCLK pair can accept most differential input
levels. The LVCMOS_CLK can accept LVCMOS or LVTTL
input levels. The low impedance LVCMOS/LVTTL outputs
are designed to drive 50Ω series or parallel terminated
transmission lines. The effective fanout can be increased
from 8 to 16 by utilizing the ability of the outputs to drive two
series terminated transmission lines.
The ICS8308I is characterized for 3.3V core/3.3V output,
3.3V core/2.5V output or 2.5V core/2.5V output operation.
Guaranteed output and part-part skew characteristics make
the 8308I ideal for those clock distribution applications requiring
well defined performance and repeatability.
FEATURES
•8 LVCMOS/LVTTL outputs (7Ω typical output impedance)
•Selectable LVCMOS_CLK or differential CLK, nCLK
inputs
•CLK, nCLK pair can accept the following differential
input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL
•Maximum Output Frequency: 350MHz
•Output Skew: (3.3V± 5%): 100ps (maximum)
•Part to Part Skew: (3.3V± 5%): 1ns (maximum)
•Supply Voltage Modes:
(Core/Output)
3.3V/3.3V
3.3V/2.5V
2.5V/2.5V
•-40°C to 85°C ambient operating temperature
•Available in both, Standard and RoHS/Lead-Free
compliant packages
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
LVCMOS_CLK
CLK
nCLK
CLK_SEL
CLK_EN
OE
D
LE
Q
1
0
Pullup
Pullup
Pullup
Pulldown
Pullup
Pullup
8308AGI www.icst.com/products/hiperclocks.html REV. B JULY 25, 2005
2
Integrated
Circuit
Systems, Inc.
ICS8308I
LOW SKEW, 1-TO-8
DIFFERENTIAL/LVCMOS-TO-LVCMOS FANOUT BUFFER
TABLE 1. PIN DESCRIPTIONS
rebmuNemaNepyTnoitpircseD
,51,31,11,1
32,12,91,71
,6Q,7Q,1Q,0Q
2Q,3Q,4Q,5Q tuptuO.slevelecafretniLTTVL/SOMCVL.
stuptuokcolC
22,81,41,01,2DNGrewoP.dnuorgylppusrewoP
3LES_KLCtupnIpulluP
tupnikcolcSOMCVLstceleS.tupnitceleskc
olC
.WOLnehwstupniKLCn,KLCstceleS.HGIHnehw
.slevelecafretniLTTVL/SOMCVL
4KLC_SOMCVLtupnIpulluP.slevelecafret
niLTTVL/SOMCVL.tupnikcolC
5KLCtupnIpulluP.tupnikcolclaitnereffidgnitrevni-noN
6KLCntupnInwodlluP.tupnikcolclait
nereffidgnitrevnI
7NE_KLCtupnIpulluP.slevelecafretniLTTVL/SOMCVL.elbanekcolC
8EOtupnIpulluP.slevelecafretniLTTV
L/SOMCVL.elbanetuptuO
9V
DD
rewoP.nipylppuseroC
42,02,61,21V
ODD
rewoP.snipylppustuptuO
:ETON
pulluP
dna
nwodlluP
.seulavlacipytrof,scitsiretcarahCniP,2elbaTeeS.srotsisertupnilanretniotrefer
TABLE 2. PIN CHARACTERISTICS
TABLE 3A. CLOCK SELECT FUNCTION TABLE
TABLE 3B. CLOCK INPUT FUNCTION TABLE
tupnIlortnoC tupnIkcolC
LES_KLC
0detcelessiKLCn,KLC
1detcelessiKLC_SOMCVL
stupnIstuptuO edoMtuptuOottupnIytiraloP
LES_KLCKLC_SOMCVLKLCKLCn7Q:0Q
0— 0 1 WOLdednEelgniSotlaitnereffiDgnitrevnInoN
0— 1 0 HG
IHdednEelgniSotlaitnereffiDgnitrevnInoN
0— 0 1ETON;desaiBWOLdednEelgniSotdednEelgniSgnitrevnInoN
0— 1 1ETON;desaiBHGIHde
dnEelgniSotdednEelgniSgnitrevnInoN
0— 1ETON;desaiB0HGIHdednEelgniSotdednEelgniSgnitrevnI
0— 1ETON;desaiB1WOLdednEelgn
iSotdednEelgniSgnitrevnI
10 — — WOLdednEelgniSotdednEelgniSgnitrevnInoN
11 — — HGIHdednEelgniSotdednEelgniSgnitrevnInoN
."s
leveLdednEelgniStpeccAottupnIlaitnereffiDehtgniriW",noitcesnoitamrofnInoitacilppAehtotreferesaelP:1ETON
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
C
NI
ecnaticapaCtupnI 4Fp
C
DP
ecnaticapaCnoitapissiDrewoP
)tuptuorep( 21Fp
R
PULLUP
rotsiseRpulluPtupnI 15kΩ
R
NWODLLUP
rotsiseRnwodlluPtupnI 15kΩ
R
TUO
ecnadepmItuptuO5721Ω
8308AGI www.icst.com/products/hiperclocks.html REV. B JULY 25, 2005
3
Integrated
Circuit
Systems, Inc.
ICS8308I
LOW SKEW, 1-TO-8
DIFFERENTIAL/LVCMOS-TO-LVCMOS FANOUT BUFFER
TABLE 4A. POWER SUPPLY DC CHARACTERISTICS, VDD = VDDO = 3.3V±5%, TA = -40° TO 85°
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, V
DD 4.6V
Inputs, VI-0.5V to VDD + 0.5 V
Outputs, V
O-0.5V to VDDO + 0.5V
Package Thermal Impedance, θ
JA 70°C/W (0 lfpm)
Storage Temperature, T
STG -65°C to 150°C
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifications only. Functional
operation of product at these conditions or any conditions be-
yond those listed in the
DC Characteristics
or
AC Character-
istics
is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect product reliability.
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
V
DD
egatloVylppuSeroC 531.33.3564.3V
V
ODD
egatloVylppuStuptuO 531.33.3564.3V
I
DD
tnerruCylppuSrewoP 64Am
I
ODD
tnerruCylppuStuptuO 11Am
TABLE 4B. POWER SUPPLY DC CHARACTERISTICS, VDD = 3.3V±5%, VDDO = 2.5V±5%, TA = -40° TO 85°
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
V
DD
egatloVylppuSeroC 531.33.3564.3V
V
ODD
egatloVylppuStuptuO 573.25.2526.2V
I
DD
tnerruCylppuSrewoP 64Am
I
ODD
tnerruCylppuStuptuO 01Am
TABLE 4C. POWER SUPPLY DC CHARACTERISTICS, VDD, VDDO = 2.5V±5%, TA = -40° TO 85°
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
V
DD
egatloVylppuSeroC 573.25.2526.2V
V
ODD
egatloVylppuStuptuO 573.25.2526.2V
I
DD
tnerruCylppuSrewoP 34Am
I
ODD
tnerruCylppuStuptuO 01Am
8308AGI www.icst.com/products/hiperclocks.html REV. B JULY 25, 2005
4
Integrated
Circuit
Systems, Inc.
ICS8308I
LOW SKEW, 1-TO-8
DIFFERENTIAL/LVCMOS-TO-LVCMOS FANOUT BUFFER
TABLE 4D. DC CHARACTERISTICS, VDD = VDDO = 3.3V±5%, TA = -40° TO 85°
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
V
HI
egatloVhgiHtupnISOMCVL2V
DD
3.0+V
V
LI
egatloVwoLtupnI KLC_SOMCVL3.0-3.1V
EO,NE_KLC8.08.0
I
NI
tnerruCtupnI V
NI
V=
DD
ro
V
NI
DNG= 003Aµ
V
HO
1ETON;egatloVhgiHtuptuOI
HO
Am42-=4.2V
V
LO
1ETON;egatloVwoLtuptuO I
LO
Am42=55.0V
I
LO
Am21=03.0V
V
PP
egatloVtupnIkaeP-ot-kaePKLCn,KLC51.03.1V
V
RMC
;egatloVedoMnommoCtupnI
3,2ETON KLCn,KLC5.0+DNGV
DD
58.0-V
05gnivirdfoelbapacstuptuO:1ETON Ω05htiwdetanimretsenilnoissimsnart ΩVot
ODD
.2/
."tiucriCtseTCAdaoLtuptuOV3.3",noitcestnemerusaeMretemaraPeeS
siKLCn,KLCrofegatlovtupnimumixameht,s
noitacilppadedneelgnisroF:2ETON V
DD
.V3.0+
sadenifedsiegatlovedomnommoC:3ETONV
HI
.
TABLE 4E. DC CHARACTERISTICS, VDD = 3.3V±5%, VDDO = 2.5V±5%, TA = -40° TO 85°
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
V
HI
egatloVhgiHtupnISOMCVL2V
DD
3.0+V
V
LI
egatloVwoLtupnI KLC_SOMCVL3.0-3.1V
EO,NE_KLC8.0V
I
NI
tnerruCtupnI V
NI
V=
DD
ro
V
NI
DNG= 003Aµ
V
HO
1ETON;egatloVhgiHtuptuOI
HO
Am51-=8.1V
V
LO
1ETON;egatloVwoLtuptuOI
LO
Am51=6.0V
V
PP
egatloVtupnIkaeP-ot-kaePKLCn,KLC51.03.1V
V
RMC
;egatloVedoMnommoCtupnI
3,2ETON KLCn,KLC5.0+DNGV
DD
58.0-V
05gnivirdfoelbapacstuptuO:1ETON Ω05htiwdetanimretsenilnoissimsnart ΩVot
ODD
.2/
."tiucriCtseTCAdaoLtuptuOV3.3",noitcestnemerusaeMretemaraPeeS
siKLCn,KLCrofegatlovtupnimumixameht,s
noitacilppadedneelgnisroF:2ETON V
DD
.V3.0+
sadenifedsiegatlovedomnommoC:3ETONV
HI
.
8308AGI www.icst.com/products/hiperclocks.html REV. B JULY 25, 2005
5
Integrated
Circuit
Systems, Inc.
ICS8308I
LOW SKEW, 1-TO-8
DIFFERENTIAL/LVCMOS-TO-LVCMOS FANOUT BUFFER
TABLE 4F. DC CHARACTERISTICS, VDD, VDDO = 2.5V±5%, TA = -40° TO 85°
TABLE 5A. AC CHARACTERISTICS, VDD = VDDO = 3.3V±5%, TA = -40° TO 85°
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
V
HI
egatloVhgiHtupnISOMCVL2V
DD
3.0+V
V
LI
egatloVwoLtupnI KLC_SOMCVL3.0-3.1V
EO,NE_KLC7.0V
I
NI
tnerruCtupnI V
NI
V=
DD
ro
V
NI
DNG= 003Aµ
V
HO
1ETON;egatloVhgiHtuptuOI
HO
Am51-=8.1V
V
LO
1ETON;egatloVwoLtuptuOI
LO
Am51=6.0V
V
PP
egatloVtupnIkaeP-ot-kaePKLCn,KLC51.03.1V
V
RMC
;egatloVedoMnommoCtupnI
3,2ETON KLCn,KLC5.0+DNGV
DD
58.0-V
05gnivirdfoelbapacstuptuO:1ETON Ω05htiwdetanimretsenilnoissimsnart ΩVot
ODD
.2/
."tiucriCtseTCAdaoLtuptuOV3.3",noitcestnemerusaeMretemaraPeeS
siKLCn,KLCrofegatlovtupnimumixameht,s
noitacilppadedneelgnisroF:2ETON V
DD
.V3.0+
sadenifedsiegatlovedomnommoC:3ETONV
HI
.
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
f
XAM
ycneuqerFtuptuO 053zHM
t
DP
noitagaporP
;yaleD
;KLCn,KLC
1ETON IJzHM05324sn
;KLC_SOMCVL
2ETON IJzHM05324sn
t
)o(ks7,3ETON;wekStuptuO noderusaeM
V@egdegnisir
ODD
2/ 001sp
t
)pp(ks7,4ETON;wekStraP-ot-traP noderusaeM
V@egdegnisir
ODD
2/ 1sn
t
R
t/
F
emiTllaF/esiRtuptuOV2otV8.02.01sn
cdoelcyCytuDtuptuOIJKLCn,KLC=feR,zHM0515455%
t
LZP
t,
HZP
5ETON;emiTelbanEtuptuO 5sn
t
ZLP
t,
ZHP
5ETON;emiTelbasiDtuptuO 5sn
t
S
elbanEkcolC
;emiTputeS
6ETON
otNE_KLC
KLCn,KLC 1sn
otNE_KLC
KLC_SOMCVL 0sn
t
H
elbanEkcolC
;emiTdloH
6ETON
otKLCn,KLC
NE_KLC 0sn
KLC_SOMCVL
NE_KLCot 1sn
ottniopgnissorctupnilaitnereffidehtmor
fderusaeM:1ETONV
ODD
2/.tuptuoehtfo
VmorfderusaeM:2ETON
DD
Vottupniehtfo2/
ODD
.tuptuoehtfo2/
.snoitidnocdaollauqehtiwdnaegatlovylppusemasehttastuptuoneewtebwekssadenifeD:3ETON
Vtade
rusaeM
ODD
.2/
htiwdnasegatlovylppusemasehttagnitareposecivedtnereffidnostuptuoneewtebwekssadenifeD:4ETON
Vtaderus
aemerastuptuoeht,ecivedhcaenostupnifoepytemasehtgnisU.snoitidnocdaollauqe
ODD
.2/
.noitcudorpnidetsettoN.noitaziretcarahcybdeetnaraugerasretemarapesehT:5ETON
.kcolctupniehtfoegdegni
sirehtotevitalererasemitdloHdnaputeS:6ETON
.56dradnatSCEDEJhtiwecnadroccanidenifedsiretemarapsihT:7ETO
N
8308AGI www.icst.com/products/hiperclocks.html REV. B JULY 25, 2005
6
Integrated
Circuit
Systems, Inc.
ICS8308I
LOW SKEW, 1-TO-8
DIFFERENTIAL/LVCMOS-TO-LVCMOS FANOUT BUFFER
TABLE 5B. AC CHARACTERISTICS, VDD = 3.3V±5%, VDDO = 2.5V±5%, TA = -40° TO 85°
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
f
XAM
ycneuqerFtuptuO 053zHM
t
DP
noitagaporP
;yaleD
;KLCn,KLC
1ETON IJzHM05324sn
;KLC_SOMCVL
2ETON IJzHM05324sn
t
)o(ks7,3ETON;wekStuptuO noderusaeM
V@egdegnisir
ODD
2/ 001sp
t
)pp(ks7,4ETON;wekStraP-ot-traP noderusaeM
V@egdegnisir
ODD
2/ 1sn
t
R
t/
F
emiTllaF/esiRtuptuOV8.1otV6.02.00.1sn
cdoelcyCytuDtuptuOIJKLCn,KLC=feR,zHM0515455%
t
LZP
t,
HZP
5ETON;emiTelbanEtuptuO 5sn
t
ZLP
t,
ZHP
5ETON;emiTelbasiDtuptuO 5sn
t
S
elbanEkcolC
;emiTputeS
6ETON
otNE_KLC
KLCn,KLC 1sn
otNE_KLC
KLC_SOMCVL 0sn
t
H
elbanEkcolC
;emiTdloH
6ETON
otKLCn,KLC
NE_KLC 0sn
KLC_SOMCVL
NE_KLCot 1sn
ottniopgnissorctupnilaitnereffidehtmor
fderusaeM:1ETONV
ODD
2/.tuptuoehtfo
VmorfderusaeM:2ETON
DD
Vottupniehtfo2/
ODD
.tuptuoehtfo2/
.snoitidnocdaollauqehtiwdnaegatlovylppusemasehttastuptuoneewtebwekssadenifeD:3ETON
Vtade
rusaeM
ODD
.2/
htiwdnasegatlovylppusemasehttagnitareposecivedtnereffidnostuptuoneewtebwekssadenifeD:4ETON
Vtaderus
aemerastuptuoeht,ecivedhcaenostupnifoepytemasehtgnisU.snoitidnocdaollauqe
ODD
.2/
.noitcudorpnidetsettoN.noitaziretcarahcybdeetnaraugerasretemarapesehT:5ETON
.kcolctupniehtfoegdegni
sirehtotevitalererasemitdloHdnaputeS:6ETON
.56dradnatSCEDEJhtiwecnadroccanidenifedsiretemarapsihT:7ETO
N
8308AGI www.icst.com/products/hiperclocks.html REV. B JULY 25, 2005
7
Integrated
Circuit
Systems, Inc.
ICS8308I
LOW SKEW, 1-TO-8
DIFFERENTIAL/LVCMOS-TO-LVCMOS FANOUT BUFFER
TABLE 5C. AC CHARACTERISTICS, VDD = VDDO = 2.5V±5%, TA = -40° TO 85°
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
f
XAM
ycneuqerFtuptuO 053zHM
t
DP
noitagaporP
;yaleD
;KLCn,KLC
1ETON IJzHM0535.12.4sn
;KLC_SOMCVL
2ETON IJzHM0537.14.4sn
t
)o(ks7,3ETON;wekStuptuO noderusaeM
V@egdegnisir
ODD
2/ 061sp
t
)pp(ks7,4ETON;wekStraP-ot-traP noderusaeM
V@egdegnisir
ODD
2/ 2sn
t
R
t/
F
emiTllaF/esiRtuptuOV8.1otV6.02.00.1sn
cdoelcyCytuDtuptuOIJKLCn,KLC=feR,zHM0510406%
t
LZP
t,
HZP
5ETON;emiTelbanEtuptuO 5sn
t
ZLP
t,
ZHP
5ETON;emiTelbasiDtuptuO 5sn
t
S
elbanEkcolC
;emiTputeS
6ETON
otNE_KLC
KLCn,KLC 1sn
otNE_KLC
KLC_SOMCVL 0sn
t
H
elbanEkcolC
;emiTdloH
6ETON
otKLCn,KLC
NE_KLC 0sn
KLC_SOMCVL
NE_KLCot 1sn
ottniopgnissorctupnilaitnereffidehtmor
fderusaeM:1ETONV
ODD
2/.tuptuoehtfo
VmorfderusaeM:2ETON
DD
Vottupniehtfo2/
ODD
.tuptuoehtfo2/
.snoitidnocdaollauqehtiwdnaegatlovylppusemasehttastuptuoneewtebwekssadenifeD:3ETON
Vtade
rusaeM
ODD
.2/
htiwdnasegatlovylppusemasehttagnitareposecivedtnereffidnostuptuoneewtebwekssadenifeD:4ETON
Vtaderus
aemerastuptuoeht,ecivedhcaenostupnifoepytemasehtgnisU.snoitidnocdaollauqe
ODD
.2/
.noitcudorpnidetsettoN.noitaziretcarahcybdeetnaraugerasretemarapesehT:5ETON
.kcolctupniehtfoegdegni
sirehtotevitalererasemitdloHdnaputeS:6ETON
.56dradnatSCEDEJhtiwecnadroccanidenifedsiretemarapsihT:7ETO
N
8308AGI www.icst.com/products/hiperclocks.html REV. B JULY 25, 2005
8
Integrated
Circuit
Systems, Inc.
ICS8308I
LOW SKEW, 1-TO-8
DIFFERENTIAL/LVCMOS-TO-LVCMOS FANOUT BUFFER
PARAMETER MEASUREMENT INFORMATION
V
CMR
Cross Points
V
PP
nCLK
CLK
GND
VDD
Qx
Qy
tsk(o)
V
DDO
2
V
DDO
2
Qx
Qy
PART 1
PART 2
tsk(pp)
V
DDO
2
V
DDO
2
2.5V CORE/2.5V OUTPUT LOAD AC TEST CIRCUIT
3.3V CORE/2.5V OUTPUT LOAD AC TEST CIRCUIT3.3V CORE/3.3V OUTPUT LOAD AC TEST CIRCUIT
SCOPE
Qx
LVCMOS
1.65V±5%
-1.65V±5%
DIFFERENTIAL INPUT LEVEL
OUTPUT SKEW PART-TO-PART SKEW
SCOPE
Qx
LVCMOS
V
DDO
2
2.05V±5%
-1.25V±5%
GND
VDD,
VDDO
GND
VDD
SCOPE
Qx
LVCMOS
1.25V±5%
-1.25V±5%
GND
VDD,
VDDO
VDDO
1.25V±5%
8308AGI www.icst.com/products/hiperclocks.html REV. B JULY 25, 2005
9
Integrated
Circuit
Systems, Inc.
ICS8308I
LOW SKEW, 1-TO-8
DIFFERENTIAL/LVCMOS-TO-LVCMOS FANOUT BUFFER
OUTPUT RISE/FALL TIME PROPAGATION DELAY
nCLK
CLK
Q0:Q7
t
PD
V
DDO
2
➤
➤
V
DDO
2
LVCMOS_
CLK
Clock
Outputs
0.8V
2V 2V
0.8V
tRtF
Clock
Outputs
0.6V
1.8V 1.8V
0.6V
t
R
t
F
VDD = VDDO = 3.3V
VDD = VDDO = 2.5V or
VDD = 3.3V, VDDO = 2.5V
OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
Q0:Q7
t
PERIOD
t
PW
t
PERIOD
odc =
V
DDO
2
x 100%
tPW
8308AGI www.icst.com/products/hiperclocks.html REV. B JULY 25, 2005
10
Integrated
Circuit
Systems, Inc.
ICS8308I
LOW SKEW, 1-TO-8
DIFFERENTIAL/LVCMOS-TO-LVCMOS FANOUT BUFFER
APPLICATION INFORMATION
Figure 1
shows how the differential input can be wired to accept
single ended levels. The reference voltage V_REF = VDD/2 is
generated by the bias resistors R1, R2 and C1. This bias circuit
should be located as close as possible to the input pin. The ratio
FIGURE 1. SINGLE ENDED SIGNAL DRIVING DIFFERENTIAL INPUT
of R1 and R2 might need to be adjusted to position the V_REF in
the center of the input voltage swing. For example, if the input
clock swing is only 2.5V and VDD = 3.3V, V_REF should be 1.25V
and R2/R1 = 0.609.
WIRING THE DIFFERENTIAL INPUT TO ACCEPT SINGLE ENDED LEVELS
V_REF
R1
1K
C1
0.1u R2
1K
Single Ended Clock Input CLK
nCLK
VDD
INPUTS:
CLK INPUT:
For applications not requiring the use of the test clock, it can
be left floating. Though not required, but for additional
protection, a 1kΩ resistor can be tied from the CLK input to
ground.
CLK/nCLK INPUT:
For applications not requiring the use of the differential input,
both CLK and nCLK can be left floating. Though not required,
but for additional protection, a 1kΩ resistor can be tied from
CLK to ground.
SELECT PINS:
All select pins have internal pull-ups and pull-downs;
additional resistance is not required but can be added for
additional protection. A 1kΩ resistor can be used.
RECOMMENDATIONS FOR UNUSED INPUT AND OUTPUT PINS
OUTPUTS:
LVCMOS OUTPUT:
All unused LVCMOS output can be left floating. We
recommend that there is no trace attached.
87004AGI www.icst.com/products/hiperclocks.html REV. B JULY 25, 2005
11
Integrated
Circuit
Systems, Inc.
ICS87004I
1:4, DIFFERENTIAL-TO-LVCMOS/LVTTL
ZERO DELAY CLOCK GENERATOR
FIGURE 3C. HIPERCLOCKS CLK/NCLK INPUT DRIVEN BY
3.3V LVPECL DRIVER
FIGURE 3B. HIPERCLOCKS CLK/NCLK INPUT DRIVEN BY
3.3V LVPECL DRIVER
FIGURE 3D. HIPERCLOCKS CLK/NCLK INPUT DRIVEN BY
3.3V LVDS DRIVER
3.3V
R1
50
R3
50
Zo = 50 Ohm
LVPECL
Zo = 50 Ohm
HiPerClockS
CLK
nCLK
3.3V
Input
R2
50
Zo = 50 Ohm
Input
HiPerClockS
CLK
nCLK
3.3V
R3
125
R2
84
Zo = 50 Ohm
3.3V
R4
125
LVPECL
R1
84
3.3V
DIFFERENTIAL CLOCK INPUT INTERFACE
The CLK /nCLK accepts LVDS, LVPECL, LVHSTL, SSTL, HCSL
and other differential signals. Both VSWING and VOH must meet the
VPP and VCMR input requirements. Figures 3A to 3D show inter-
face examples for the HiPerClockS CLK/nCLK input driven by
the most common driver types. The input interfaces suggested
FIGURE 3A. HIPERCLOCKS CLK/NCLK INPUT DRIVEN BY
ICS HIPERCLOCKS LVHSTL DRIVER
here are examples only. Please consult with the vendor of the
driver component to confirm the driver termination requirements.
For example in
Figure 3A,
the input termination applies for ICS
HiPerClockS LVHSTL drivers. If you are using an LVHSTL driver
from another vendor, use their termination recommendation.
1.8V
R2
50
Input
LVHSTL Driver
ICS
HiPerClockS R1
50
LVHSTL
3.3V
Zo = 50 Ohm
Zo = 50 Ohm
HiPerClockS
CLK
nCLK
Zo = 50 Ohm
R1
100
3.3V
LVDS_Driver
Zo = 50 Ohm
Receiver
CLK
nCLK
3.3V
8308AGI www.icst.com/products/hiperclocks.html REV. B JULY 25, 2005
12
Integrated
Circuit
Systems, Inc.
ICS8308I
LOW SKEW, 1-TO-8
DIFFERENTIAL/LVCMOS-TO-LVCMOS FANOUT BUFFER
SCHEMATIC EXAMPLE
Figure 3
shows a schematic example of the ICS8308I. In this
example, the LVCMOS_CLK input is selected. The decoupling
FIGURE 3. ICS8308I LVPECL BUFFER SCHEMATIC EXAMPLE
C4
0.1u
(U1,9)
R1 43
VDD
Zo = 50 Ohm
Zo = 50 Ohm
(U1,16)
R10
1K
R11 43
C2
0.1u C3
0.1u
VDD
(U1,20)
U1
ICS8308I
1
2
3
4
5
6
7
8
9
10
11
12 13
14
15
16
17
18
19
20
21
22
23
24
Q0
GND
CLK_SEL
LVCMOS_CLK
CLK
nCLK
CLK_EN
OE
VDD
GND
Q1
VDDO Q7
GND
Q6
VDDO
Q5
GND
Q4
VDDO
Q3
GND
Q2
VDDO
VDD=3.3V
R9
1K
(U1,12)
R8 43
Ro ~ 7 Ohm
3.3V_LVCMOS
3.3V LVCMOS/LVTTL
C5
0.1u
R12
1K
VDD
(U1,24)
Zo = 50 Ohm
VDD
VDD
3.3V LVCMOS/LVTTL
C1
0.1u
capacitors should be physically located near the power pin.
RELIABILITY INFORMATION
TRANSISTOR COUNT
The transistor count for ICS8308I is: 1040
TABLE 6. θJAVS. AIR FLOW TABLE FOR 24 LEAD TSSOP
θθ
θθ
θJA by Velocity (Linear Feet per Minute)
0 200 500
Multi-Layer PCB, JEDEC Standard Test Boards 70°C/W 63°C/W 60°C/W
8308AGI www.icst.com/products/hiperclocks.html REV. B JULY 25, 2005
13
Integrated
Circuit
Systems, Inc.
ICS8308I
LOW SKEW, 1-TO-8
DIFFERENTIAL/LVCMOS-TO-LVCMOS FANOUT BUFFER
PACKAGE OUTLINE - G SUFFIX FOR 24 LEAD TSSOP
TABLE 7. PACKAGE DIMENSIONS
REFERENCE DOCUMENT: JEDEC PUBLICATION 95, MO-153
LOBMYS sretemilliM
muminiMmumixaM
N42
A--02.1
1A50.051.0
2A08.050.1
b91.003.0
c90.002.0
D07.709.7
ECISAB04.6
1E03.405.4
eCISAB56.0
L5
4.057.0
α°0°8
aaa--01.0
8308AGI www.icst.com/products/hiperclocks.html REV. B JULY 25, 2005
14
Integrated
Circuit
Systems, Inc.
ICS8308I
LOW SKEW, 1-TO-8
DIFFERENTIAL/LVCMOS-TO-LVCMOS FANOUT BUFFER
TABLE 8. ORDERING INFORMATION
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use
or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use
in normal commercial and industrial applications. Any other applications such as those requiring high reliability, or other extraordinary environmental requirements are not
recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product
for use in life support devices or critical medical instruments.
The aforementioned trademark, HiPerClockS is a trademark of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries.
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8308AGI www.icst.com/products/hiperclocks.html REV. B JULY 25, 2005
15
Integrated
Circuit
Systems, Inc.
ICS8308I
LOW SKEW, 1-TO-8
DIFFERENTIAL/LVCMOS-TO-LVCMOS FANOUT BUFFER
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