© Semiconductor Components Industries, LLC, 2011
May, 2011 − Rev. 6
1Publication Order Number:
MC74VHCT257A/D
MC74VHCT257A
Quad 2-Channel Multiplexer
with 3-State Outputs
The MC74VHCT257A is an advanced high speed CMOS quad
2−channel multiplexer fabricated with silicon gate CMOS technology.
It achieves high speed operation similar to equivalent Bipolar
Schottky TTL while maintaining CMOS low power dissipation.
It consists of four 2−input digital multiplexers with common
select (S) and enable (OE) inputs. When (OE) is held High, selection
of data is inhibited and all the outputs go Low.
The select decoding determines whether the A or B inputs get routed
to the corresponding Y outputs.
The VHCT inputs are compatible with TTL levels. This device can
be used as a level converter for interfacing 3.3 V to 5.0 V because it
has full 5.0 V CMOS level output swings.
The VHCT257A input structures provide protection when voltages
between 0 V and 5.5 V are applied, regardless of the supply voltage.
The output structures also provide protection when VCC = 0 V. These
input and output structures help prevent device destruction caused by
supply voltage−input/output voltage mismatch, battery backup, hot
insertion, etc.
The internal circuit is composed of three stages, including a buffered
output which provides high noise immunity and stable output. The
inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V
systems to 3.0 V systems.
Features
•High Speed: tPD = 4.1 ns (Typ) at VCC = 5.0 V
•Low Power Dissipation: ICC = 4.0 mA (Max) at TA = 25°C
•TTL−Compatible Inputs: VIL = 0.8 V; VIH = 2.0 V
•Power Down Protection Provided on Inputs and Outputs
•Balanced Propagation Delays
•Designed for 2.0 V to 5.5 V Operating Range
•Low Noise: VOLP = 0.8 V (Max)
•Pin and Function Compatible with Other Standard Logic Families
•Latchup Performance Exceeds 300 mA
•ESD Performance:
Human Body Model > 2000 V;
Machine Model > 200 V
•These Devices are Pb−Free and are RoHS Compliant
MARKING
DIAGRAMS
TSSOP−16
DT SUFFIX
CASE 948F
SOIC−16
D SUFFIX
CASE 751B
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
ORDERING INFORMATION
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A = Assembly Location
WL, L = Wafer Lot
Y = Year
WW, W = Work Week
G or G= Pb−Free Package
VHCT257AG
AWLYWW
VHCT
257A
ALYWG
G
(Note: Microdot may be in either location)
1
1
16
1
1
16
1
SOEIAJ−16
M SUFFIX
CASE 966
74VHCT257
ALYWG
1
16
FUNCTION TABLE
OE S Y0 − Y3
A0 − A3, B0 − B3 = the levels of
the respective Data−Word Inputs.
H
L
L
X
L
H
Z
A0 −A3
B0 −B3
Inputs Outputs
MC74VHCT257A
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2
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high−impedance cir-
cuit. For proper operation, Vin and
Vout should be constrained to the
range GND v (Vin or Vout) v VCC.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
Figure 1. Pin Assignment
13
14
15
16
9
10
11
125
4
3
2
1
8
7
6
S
Y0
B0
A0
Y1
B1
A1
GND
Y3
B3
A3
OE
VCC
B2
A2
Y2
3
OE
S
A0
B0
A1
B1
A2
B2
2
5
6
11
10
14
13 12
9
7
4Y0
MUX
Y1
Y2
Y3
EN
1
15
A3
B3
G1
1
1
Figure 2. IEC Logic Symbol
Figure 3. Expanded Logic Diagram
OE I0a I1a I0b I1b I0c I1c I0d I1d S
ZaZbZcZd
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3
MAXIMUM RATINGS
Symbol Parameter Value Unit
VCC Positive DC Supply Voltage −0.5 to +7.0 V
VIN Digital Input Voltage −0.5 to +7.0 V
VOUT DC Output Voltage Output in 3−State
High or Low State
−0.5 to +7.0
−0.5 to VCC +0.5
V
IIK Input Diode Current −20 mA
IOK Output Diode Current $20 mA
IOUT DC Output Current, per Pin $25 mA
ICC DC Supply Current, VCC and GND Pins $75 mA
PDPower Dissipation in Still Air SOIC Package
TSSOP
200
180
mW
TSTG Storage Temperature Range −65 to +150 °C
VESD ESD Withstand Voltage Human Body Model (Note 1)
Machine Model (Note 2)
Charged Device Model (Note 3)
>2000
>200
>2000
V
ILATCHUP Latchup Performance Above VCC and Below GND at 125°C (Note 4) $300 mA
qJA Thermal Resistance, Junction−to−Ambient SOIC Package
TSSOP
143
164
°C/W
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Tested to EIA/JESD22−A114−A
2. Tested to EIA/JESD22−A115−A
3. Tested to JESD22−C101−A
4. Tested to EIA/JESD78
RECOMMENDED OPERATING CONDITIONS
Symbol Characteristics Min Max Unit
VCC DC Supply Voltage 4.5 5.5 V
VIN DC Input Voltage 0 5.5 V
VOUT DC Output Voltage 0 5.5 V
TAOperating Temperature Range, all Package Types −55 125 °C
tr, tfInput Rise or Fall Time VCC = 5.0 V + 0.5 V 0 20 ns/V
DEVICE JUNCTION TEMPERATURE VERSUS TIME TO
0.1% BOND FAILURES
Junction
Temperature °CTime, Hours Time, Years
80 1,032,200 117.8
90 419,300 47.9
100 178,700 20.4
110 79,600 9.4
120 37,000 4.2
130 17,800 2.0
140 8,900 1.0
1
1 10 100 1000
TIME, YEARS
NORMALIZED FAILURE RATE
TJ= 80 C°
TJ= 90 C°
TJ= 100 C°
TJ= 110 C°
TJ= 130 C°
TJ= 120 C°
FAILURE RATE OF PLASTIC = CERAMIC
UNTIL INTERMETALLICS OCCUR
Figure 4. Failure Rate vs. Time Junction Temperature
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4
DC CHARACTERISTICS (Voltages Referenced to GND)
VCC TA = 25°C TA ≤ 85°C−55°C ≤ TA ≤ 125°C
Symbol Parameter Condition (V) Min Typ Max Min Max Min Max Unit
VIH Minimum High−Level
Input Voltage
4.5 to 5.5 2 2 2 V
VIL Maximum Low−Level
Input Voltage
4.5 to 5.5 0.8 0.8 0.8 V
VOH Maximum High−Level
Output Voltage
VIN = VIH or VIL
IOH = −50 mA4.5 3.94 3.8 3.66
V
VIN = VIH or VIL
IOH = −8 mA 4.5 3.94 3.8 3.66
VOL Maximum Low−Level
Output Voltage
VIN = VIH or VIL
IOL = 50 mA4.5 0 0.1 0.1 0.1
V
VIN = VIH or VIL
IOH = 8 mA 4.5 0.36 0.44 0.52
IIN Input Leakage Current VIN = 5.5 V or GND 0 to 5.5 ±0.1 ±1.0 ±1.0 mA
IOZ Maximum 3−State
Leakage Current
VIN = VIH or VIL
VOUT = VCC or GND
5.5 ±0.2
5
±2.5 ±2.5 mA
ICCT Maximum Quiescent
Supply Current
VIN = VCC or GND 5.5 1.35 1.5 1.65 mA
ICC Additional Quiescent
Supply Current (per pin)
VIN = VCC or GND 5.5 4.0 40 40 mA
IOPD Output Leakage Current VOUT = 5.5 V 0 0.5 5 5 mA
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0ns)
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
Symbol
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
Parameter
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
Test Conditions
ÎÎÎÎÎÎ
ÎÎÎÎÎÎ
TA = 25°C
ÎÎÎÎÎ
ÎÎÎÎÎ
TA = ≤ 85°C
ÎÎÎÎÎÎ
ÎÎÎÎÎÎ
−55°C ≤ TA ≤ 125°C
ÎÎ
ÎÎ
ÎÎ
Unit
Min
Typ
Max
Min
Max
ÎÎÎ
ÎÎÎ
Min
ÎÎÎÎ
ÎÎÎÎ
Max
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
tPLH,
tPHL
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
Maximum Propagation
Delay, A or B to Y
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
VCC = 3.3 ± 0.3 V CL = 15 pF
CL = 50 pF
5.8
8.3
9.3
12.8
1.0
1.0
11.0
14.5
ÎÎÎ
ÎÎÎ
1.0
1.0
ÎÎÎÎ
ÎÎÎÎ
11.0
14.5
ÎÎ
ÎÎ
ÎÎ
ÎÎ
ns
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
VCC = 5.0 ± 0.5 V CL = 15 pF
CL = 50 pF
3.6
5.1
5.9
7.9
1.0
1.0
7.0
9.0
ÎÎÎ
ÎÎÎ
ÎÎÎ
1.0
1.0
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
7.0
9.0
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
tPLH,
tPHL
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
Maximum Propagation
Delay, S to Y
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
VCC = 3.3 ± 0.3 V CL = 15 pF
CL = 50 pF
7.0
9.5
11.0
14.5
1.0
1.0
13.0
16.5
ÎÎÎ
ÎÎÎ
1.0
1.0
ÎÎÎÎ
ÎÎÎÎ
13.0
16.5
ÎÎ
ÎÎ
ÎÎ
ÎÎ
ns
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
VCC = 5.0 ± 0.5 V CL = 15 pF
CL = 50 pF
4.0
5.5
6.8
8.8
1.0
1.0
8.0
10.0
ÎÎÎ
ÎÎÎ
ÎÎÎ
1.0
1.0
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
8.0
10.0
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
tPZL,
tPZH
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
Maximum Output Enable,
Time, OE to Y
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
VCC = 3.3 ± 0.3 V CL = 15 pF
RL = 1 kWCL = 50 pF
6.7
9.2
10.5
14.0
1.0
1.0
12.5
16.0
ÎÎÎ
ÎÎÎ
1.0
1.0
ÎÎÎÎ
ÎÎÎÎ
12.5
16.0
ÎÎ
ÎÎ
ÎÎ
ÎÎ
ns
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
VCC = 5.0 ± 0.5 V CL = 15 pF
RL = 1 kWCL = 50 pF
3.6
5.1
6.8
11.0
1.0
12.0
8.0
10.0
ÎÎÎ
ÎÎÎ
ÎÎÎ
1.0
1.0
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
8.0
12.0
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
tPLZ,
tPHZ
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
Maximum Output Disable,
Time, OE to Y
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
VCC = 3.3 ± 0.3 V CL = 50 pF
RL = 1 kW
10.5
14.0
1.0
15.0
ÎÎÎ
ÎÎÎ
1.0
ÎÎÎÎ
ÎÎÎÎ
15.0
ÎÎ
ÎÎ
ÎÎ
ÎÎ
ns
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
VCC = 5.0 ± 0.5 V CL = 50 pF
RL = 1 kW
9.5
12.0
1.0
13.0
ÎÎÎ
ÎÎÎ
ÎÎÎ
1.0
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
13.0
ÎÎÎÎ
ÎÎÎÎ
CIN
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
Maximum Input Capacitance
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
4
10
10
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
10
ÎÎ
ÎÎ
pF
CPD Power Dissipation Capacitance (Note 5)
Typical @ 25°C, VCC = 5.0 V
pF
20
5. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC. CPD is used to determine the no−load dynamic
power consumption; PD = CPD VCC2 fin + ICC VCC.
NOISE CHARACTERISTICS (Input tr = tf = 3.0 ns, CL = 50 pF, VCC = 5.0 V)
Symbol Characteristic
TA = 25°C
Unit
Typ Max
VOLP Quiet Output Maximum Dynamic VOL 0.3 0.8 V
VOLV Quiet Output Minimum Dynamic VOL − 0.3 − 0.8 V
VIHD Minimum High Level Dynamic Input Voltage 2.0 V
VILD Maximum Low Level Dynamic Input Voltage 0.8 V
MC74VHCT257A
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5
A, B or S
Figure 5. Switching Waveform Figure 6. Switching Waveform
Figure 7. Test Circuit
VCC
GND
Y
tPHL
tPLH
50%
50% VCC
Figure 8. Test Circuit
INPUT
*Includes all probe and jig capacitance
OUTPUT
TEST POINT
CL *
1 kWCONNECT TO VCC WHEN
TESTING tPLZ AND tPZL.
CONNECT TO GND WHEN
TESTING tPHZ AND tPZH.
DEVICE
UNDER
TEST
Figure 9. Input Equivalent Circuit
*Includes all probe and jig capacitance
CL*
TEST POINT
DEVICE
UNDER
TEST
OUTPUT
50%
50% VCC
50% VCC
VCC
GND
HIGH
IMPEDANCE
VOL + 0.3V
VOH - 0.3V
Y
Y
OE
tPZL tPLZ
tPZH tPHZ
HIGH
IMPEDANCE
ORDERING INFORMATION
Device Package Shipping†
MC74VHCT257ADG SOIC−16
(Pb−Free)
48 Units / Rail
MC74VHCT257ADR2G SOIC−16
(Pb−Free)
2500 Tape & Reel
MC74VHCT257ADTG TSSOP−16* 96 Units / Rail
M74VHCT257ADTR2G TSSOP−16* 2500 Tape & Reel
MC74VHCT257AMG SOEIAJ−16
(Pb−Free)
50 Units / Rail
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*This package is inherently Pb−Free.
MC74VHCT257A
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6
PACKAGE DIMENSIONS
SOIC−16
D SUFFIX
CASE 751B−05
ISSUE K
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
18
16 9
SEATING
PLANE
F
J
M
RX 45_
G
8 PLP
−B−
−A−
M
0.25 (0.010) B S
−T−
D
K
C
16 PL
S
B
M
0.25 (0.010) A S
T
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A9.80 10.00 0.386 0.393
B3.80 4.00 0.150 0.157
C1.35 1.75 0.054 0.068
D0.35 0.49 0.014 0.019
F0.40 1.25 0.016 0.049
G1.27 BSC 0.050 BSC
J0.19 0.25 0.008 0.009
K0.10 0.25 0.004 0.009
M0 7 0 7
P5.80 6.20 0.229 0.244
R0.25 0.50 0.010 0.019
____
6.40
16X
0.58
16X 1.12
1.27
DIMENSIONS: MILLIMETERS
1
PITCH
SOLDERING FOOTPRINT
16
89
8X
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7
PACKAGE DIMENSIONS
TSSOP−16
CASE 948F−01
ISSUE B
ÇÇÇ
ÇÇÇ
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A4.90 5.10 0.193 0.200
B4.30 4.50 0.169 0.177
C−−− 1.20 −−− 0.047
D0.05 0.15 0.002 0.006
F0.50 0.75 0.020 0.030
G0.65 BSC 0.026 BSC
H0.18 0.28 0.007 0.011
J0.09 0.20 0.004 0.008
J1 0.09 0.16 0.004 0.006
K0.19 0.30 0.007 0.012
K1 0.19 0.25 0.007 0.010
L6.40 BSC 0.252 BSC
M0 8 0 8
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH. PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08
(0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
____
SECTION N−N
SEATING
PLANE
IDENT.
PIN 1
18
16 9
DETAIL E
J
J1
B
C
D
A
K
K1
H
G
ÉÉÉ
ÉÉÉ
DETAIL E
F
M
L
2X L/2
−U−
S
U0.15 (0.006) T
S
U0.15 (0.006) T
S
U
M
0.10 (0.004) V S
T
0.10 (0.004)
−T−
−V−
−W−
0.25 (0.010)
16X REFK
N
N
7.06
16X
0.36 16X
1.26
0.65
DIMENSIONS: MILLIMETERS
1
PITCH
SOLDERING FOOTPRINT
MC74VHCT257A
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8
PACKAGE DIMENSIONS
SOEIAJ−16
CASE 966−01
ISSUE A
HE
A1
DIM MIN MAX MIN MAX
INCHES
--- 2.05 --- 0.081
MILLIMETERS
0.05 0.20 0.002 0.008
0.35 0.50 0.014 0.020
0.10 0.20 0.007 0.011
9.90 10.50 0.390 0.413
5.10 5.45 0.201 0.215
1.27 BSC 0.050 BSC
7.40 8.20 0.291 0.323
0.50 0.85 0.020 0.033
1.10 1.50 0.043 0.059
0
0.70 0.90 0.028 0.035
--- 0.78 --- 0.031
A1
HE
Q1
LE
_10 _0
_10 _
LE
Q1
_
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS D AND E DO NOT INCLUDE
MOLD FLASH OR PROTRUSIONS AND ARE
MEASURED AT THE PARTING LINE. MOLD FLASH
OR PROTRUSIONS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
M
L
DETAIL P
VIEW P
c
A
b
e
M
0.13 (0.005) 0.10 (0.004)
1
16 9
8
D
Z
E
A
b
c
D
E
e
L
M
Z
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to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
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MC74VHCT257A/D
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