TESDH5V0A
Ultra low capacitance ESD Protection Array
Small Signal Diode
Meet IEC61000-4-4 (EFT) rating. 40A (5/50ήs)
Meet IEC61000-4-5 (Lightning) rating. 1A (8/20μs)
Protects four high speed I/O lines
Low capacitance: 0.5pF typical (I/O to I/O)
Working Voltage : 5V
Case : 2510P10 (DSON10) standard package, molded plastic
Digital Visual Interface (DVI)
PCI Express
Serial ATA
USB 3.0 Super speed interface
Part No. Package Packing Marking
TESDH5V0A 2510P10 3K / 7" Reel P524 Note : Output line ( No internal connection)
Maximum Ratings and Electrical Characteristics
Maximum Ratings
Electrical Characteristics
1mA
5V
1A
Ordering Information
-
15
1
-
-
Units
pF
W
1 (Typ.)
°C
V
6V
uA
1A
Terminal: Matte tin plated, lead free, solderable
per MIL-STD-202, Method 202 guaranteed
Meet IEC61000-4-2 (ESD) ±15kV (air), ±8kV (contact)
Marking Code : P524
Molding Compound Flammability Rating : UL 94V-O
Features
Mechanical Data
Pb free version, RoHS compliant, and Halogen free
Peak Pulse Current (tp = 8/20μs) IPP
PPP
±15
±8
Type Number
Rating at 25°C ambient temperature unless otherwise specified.
Peak Pulse Power (tp=8/20μs waveform)
Symbol
Min Max
Junction and Storage Temperature Range
KVVESD
Vc
Reverse Breakdown Voltage
Reverse Leakage Current
Junction Capacitance
IPP=
VR=
IR=
VReverse Stand-Off Voltage
Units
Applications Pin Configutation
High Defi nition Multi-Media Interface (HDMI)
SymbolType Number
-
TJ, TSTG
Value
ESD per IEC 61000-4-2 (Air)
ESD per IEC 61000-4-2 (Contact)
2510P10 (DSON10)
5
150
High temperature soldering guaranteed: 260°C/10s
Weight :15 mg (approximately)
Packing Code
.-55 to + 150.
RDG
CJ
IR
V(BR)
VRWM
VR=0V, f=1.0MHz
Clamping Voltage
Version : C12
G
IH
A
B
E
F
CD
Min Max Min Max
2.40 2.60 0.094 0.102
0.90 1.10 0.035 0.043
0.30 0.43 0.01 0.02
0.45 0.55 0.02 0.02
0.50 0.65 0.020 0.026
0.15 0.25 0.006 0.010
0.35 0.45 0.014 0.018
Dimensions Unit (mm)
A
B
D
E
F
Unit (inch)
0.02 BSCC 0.5 BSC
0.63BSC 0.025 BSC
G
H
I
1
IN#1
2
IN#2
3
GND
4
IN#3
5
IN#4
8
GND
7
Output
10
Output
6
Output
9
Output
TESDH5V0A
Ultra low capacitance ESD Protection Array
Small Signal Diode
Rating and Sharacteristic Curves
0.01
0.1
1
10
0.1 1 10 100 1000
Peak Pulse Power Ppp (KW)
100
120
)
Pulse Duration (us) Time (us)
1.5
FIG 4 Typical Junction Capacitance
FIG 1 Non- Rep eti tive Peak Pulse Power vs. Pulse Time
0
20
40
60
80
0 20 40 60 80 100 120 140 160 180
Power Rating (%)
0
0.5
1
012345
Normalized Capacitance
0
5
10
15
20
25
30
0.1 1 10 100 1000
(dB)
3
f(Hz)
FIG 6 Insertion Loss
1:-0.073dB 900MHz
2:-0.065dB 1.8GHz
3:-0.107dB 2.5GHz
4: -0.6477dB 3.0GHz
5:-0.18073dB 4.3GHz
1.E+06 1.E+07 1.E+08 1.E+09 1.E+10
-15
-12
-9
-3
-6
0
1 2 4
5
3
FIG 2 Pulse Waveform
0
10
20
30
40
50
60
70
80
90
100
110
0 5 10 15 20 25 30
Percent of IPP
td=Ipp/2
Waveform Parameters:
tr = 8μs, td = 20μs
e-1
f = 1.0MHz
f = 1.0MHz
Ambient Tempeatature (oC) Reverse Voltage(V)
0
5
10
15
20
25
30
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6
Clamping Voltage (V)
FIG 5 Clamping Voltage vs. Peak Pulse Current
Peak Pulse Current (A)
FIG 3 Admissible Power Dissipation Curve
Waveform Parameters:
tr = 8μs, td = 20μs
Version : C12
TESDH5V0A
Ultra low capacitance ESD Protection Array
Small Signal Diode
Applications Information
Circui t Boar d Layout Recommendations for HDM I appl ication
Ultra low capacitance between the pairs while being rated to handle >±8kV ESD contact discharges and >±15kV air discharge
Designed for protection of high-speed interfaces such as HDMI
The PCB traces are used to connect the pin pairs for each line (pin 1 to pin 10, pin 2 to pin 9, pin 4 to pin 7, pin 5 to pin 6)
Signal line enters at pin 1 and exits at Pin 10 and the PCB trace connects pin 1 and 10 together. Ground is connected at pins 3 and 8.
One large ground pad should be used in lieu of two separate pads
Each device is in a leadless package that is less than 1.1mm wide
Designed such that the traces flow straight through the device, The narrow package and flow-through design reduces discontinuities
and minimizes impact on signal integrity
TESDH5V0A is ultra low capacitance ESD protection array designed to protect high speed data interfaces. This series has been
specifically designed to protect sensitive components which are connected to high-speed data and transmission lines from
overvoltage caused by ESD, CDE (Cable Discharge Events), and EFT (electrical fast transients)
The combination of small size, low capacitance, and high level of ESD protection makes them a flexible solution for applications of
high speed interface, ex HDMI, DisplayPortTM, MDDI, and eSATA interfaces.
TMDS_D2+
TMDS GND
TESDH5V0A
HDMI Connector
TMDS
_
GND
TMDS_D2-
TMDS_D1+
TMDS_GND
TMDS_D1-
TMDS_D0+
TMDS_GND
TMDS_D0-
TMDS_CLK+
TMDS_GND
TMDS_CLK-
CEC
N/C
DDC_CLK
DDC_DAT
GND
+5V
Hot Plug
Detection
TESDH5V0A
TESDS5V0A
Version : C12
TESDH5V0A
Ultra low capacitance ESD Protection Array
Small Signal Diode
Tape & Reel specification
Suggested PAD Layout
Note 1: A0, B0, and K0 are determined by component size. The clearance between the components and the cavity must be
within 0.05 mm min. to 0.5 mm max. The component cannot rote more than 10o within the determined cavity.
Note 2: If B1 exceeds 4.2 mm(0.165'') for 8 mm embossed tape, the tape may not feed through all tape feeders.
Note 3: The suggested land pattern dimensions have been provided for reference only, as actual pad layouts
may vary despending on application.
Item Symbol Dimension (mm)
Carrier depth K 1.22 Max.
Sprocket hole D 1.50 +0.10
Reel outside diameter A 180 ± 1
Reel inner diameter D1 50 Min.
Feed hole width D2 13.0 ± 0.5
Sprocke hole position E 1.75 ±0.10
Sprocke hole pitch P0 4.00 ±0.10
Embossment center P1 2.00 ±0.10
Overall tape thickness T 0.6 Max.
Tape width W 8.30 Max.
Reel width W1 14.4 Max.
Dimensions Unit (inch) Unit (mm)
A 0.034 0.88
B 0.008 0.20
C 0.020 0.50
D 0.039 1.00
E 0.008 0.20
F 0.016 0.40
H 0.061 1.55
0.027 0.68G
A
H
G
B
EF
C
D
Direction of Feed
W1
D1D2
A
Top Cover Tape
Carieer Tape
Any Additional Label (If Required)
TSC label
For Machine Reference
Only
Including Draft and RADLL
Concentric Around B0
T
Top
Cover Tape
See Note1
B0
K Center Lines
of Cavity
F
E
W
For Components
2.0mm X 1.2mm
and Larger
D'
DP1
10 Pitches Cumulative
Tolerance on Tape
±2.0mm ( ±0.008")
B0
Embossment
A0
K0
B1
P0
Version : C12
