VN5E050ASO-E Single channel high-side driver with analog current sense for automotive applications Datasheet - production data Features Max supply voltage VCC 41 V Operating voltage range VCC 4.5 to 28V Max on-state resistance RON 50 m Current limitation (typ) ILIMH 27 A Off-state supply current IS 2 A(1) SO-16L ("1($'5 - Overtemperature shutdown with auto restart (thermal shutdown) - Reverse battery protected - Electrostatic discharge protection 1. Typical value with all loads connected. Application General - Inrush current active management by power limitation - Very low standby current - 3.0 V CMOS compatible inputs - Optimized electromagnetic emissions - Very low electromagnetic susceptibility - Compliant with European directive 2002/95/EC - Very low current sense leakage - AEC-Q100 qualified Diagnostic functions - Proportional load current sense - High current sense precision for wide currents range - Current sense disable - Off-state open-load detection - Output short to VCC detection - Overload and short to ground (power limitation) indication - Thermal shutdown indication Protections - Undervoltage shutdown - Overvoltage clamp - Load current limitation - Self limiting of fast thermal transients - Protection against loss of ground and loss of VCC September 2013 This is information on a product in full production. All types of resistive, inductive and capacitive loads Suitable as LED driver Description The VN5E050ASO-E is a single channel highside driver manufactured using ST proprietary VIPower(R) M0-5 technology and housed in the SO-16L package. The device is designed to drive 12 V automotive grounded loads, and to provide protection and diagnostics. It also implements a 3 V and 5 V CMOS-compatible interface for the use with any microcontroller. The device integrates advanced protective functions such as load current limitation, inrush and overload active management by power limitation, overtemperature shut-off with autorestart and overvoltage active clamp. A dedicated analog current sense pin is associated with every output channel providing enhanced diagnostic functions including fast detection of overload and short-circuit to ground through power limitation indication, overtemperature indication, shortcircuit to VCC diagnosis and on-state and off-state open-load detection. The current sensing and diagnostic feedback of the whole device can be disabled by pulling the CS_DIS pin high to share the external sense resistor with similar devices. Doc ID 022449 Rev 5 1/37 www.st.com 1 Contents VN5E050ASO-E Contents 1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.4 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 2.5 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 24 3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 24 3.1.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . . 25 3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 3.3 MCU I/O protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 3.4 Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 3.4.1 3.5 4 Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 28 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 4.1 5 Short to VCC and off-state open-load detection . . . . . . . . . . . . . . . . . . 26 SO-16L thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 5.1 ECOPACK(R) packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 5.2 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 5.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 6 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 2/37 Doc ID 022449 Rev 5 VN5E050ASO-E List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Switching (VCC = 13 V; Tj = 25 C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Current sense (8 V < VCC < 18 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Open-load detection (8 V < VCC < 18 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Electrical transient requirements (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Electrical transient requirements (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Electrical transient requirements (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 SO-16L mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Doc ID 022449 Rev 5 3/37 List of figures VN5E050ASO-E List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36. Figure 37. Figure 38. Figure 39. Figure 40. Figure 41. 4/37 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Open-load off-state delay timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Delay response time between rising edge of output current and rising edge of current sense (CS enabled). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 IOUT/ISENSE vs IOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Maximum current sense ratio drift vs load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Intermittent overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Off-state open-load with external circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Short to VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Tj evolution in over load or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Input clamp level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 On-state resistance vs VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Turn-On voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 ILIMH vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Turn-Off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 CS_DIS high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Maximum turn-Off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 SO-16L PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . 29 SO-16L thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . 30 Thermal fitting model of a single channel HSD in SO-16L . . . . . . . . . . . . . . . . . . . . . . . . . 30 SO-16L package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 SO-16L tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 SO-16L tape and reel shipment (suffix "TR") . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Doc ID 022449 Rev 5 VN5E050ASO-E 1 Block diagram and pin description Block diagram and pin description Figure 1. Block diagram V CC Signal Clam p Control & Diagnostic U ndervoltage IN Power C lamp D R IVER V ON Limitation Over temp. C urrent Limitation OFF State Open load C S_ D IS V SENSEH CS C urrent Sense OU T OVE R LOAD P R OTEC TION (AC TIVE POW ER LIMITATION) LOGIC GN D Table 1. Pin function Name VCC OUTPUT GND INPUT CURRENT SENSE CS_DIS Function Battery connection. Power output. Ground connection. Must be reverse battery protected by an external diode/resistor network. Voltage controlled input pin with hysteresis, CMOS compatible; it controls output switch state. Analog current sense pin; it delivers a current proportional to the load current. Active high CMOS compatible pin, to disable the current sense pin. Doc ID 022449 Rev 5 5/37 Block diagram and pin description Figure 2. VN5E050ASO-E Configuration diagram (top view) 9FF 9FF *1' 1& 1& 1& ,1387 1& &6(16( 287387 1& 287387 &6',6 9FF 287387 9FF ("1($'5 Table 2. 6/37 Suggested connections for unused and not connected pins Connection / pin Current sense N.C. Output Input CS_DIS Floating Not allowed X X X X To ground Through 1 K resistor X Through 22 K resistor Through 10 K resistor Through 10 K resistor Doc ID 022449 Rev 5 VN5E050ASO-E 2 Electrical specifications Electrical specifications Figure 3. Current and voltage conventions IS VCC VCC IOUT ICSD OUTPUT CS_DIS VCSD VF VOUT ISENSE IIN CURRENT SENSE INPUT VIN VSENSE GND IGND Note: VF = VOUT - VCC during reverse battery condition. 2.1 Absolute maximum ratings Stressing the device above the rating listed in Table 3 may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Table 3. Absolute maximum ratings Symbol Parameter Value Unit VCC DC supply voltage 41 V -VCC Reverse DC supply voltage 0.3 V -IGND DC reverse ground pin current 200 mA IOUT DC output current Internally limited A -IOUT Reverse DC output current 20 A DC input current -1 to 10 mA DC current sense disable input current -1 to 10 mA 200 mA VCC - 41 to +VCC V 104 mJ IIN ICSD -ICSENSE DC reverse CS pin current VCSENSE Current sense maximum voltage EMAX Maximum switching energy (single pulse) L = 3 mH; RL = 0 ; Vbat = 13.5 V; Tjstart = 150C; IOUT = IlimL(Typ.) Doc ID 022449 Rev 5 7/37 Electrical specifications Table 3. VN5E050ASO-E Absolute maximum ratings (continued) Symbol Value Unit VESD Electrostatic discharge (Human Body Model: R = 1.5 K; C = 100 pF) - INPUT - CURRENT SENSE - CS_DIS - OUTPUT - VCC 4000 2000 4000 5000 5000 V V V V V VESD Charge device model (CDM-AEC-Q100-011) 750 V Junction operating temperature -40 to 150 C Storage temperature -55 to 150 C Tj Tstg 2.2 Parameter Thermal data Table 4. Thermal data Symbol Rthj-pcb Parameter Thermal resistance Typ. value Unit 18.5 C/W See Figure 36 C/W 34.5 C/W junction-pcb(1) Rthj-amb Thermal resistance junction - ambient on two layers pcb Rthj-amb Thermal resistance junction - ambient on two layers pcb(2) 1. The measure is done in accordance with the JESD 51-8. 2. Four Layers PCB characteristics: - Cu thickness: 70 um outer layers, 35 um inner layers - Board finish thickness 1.6 mm +/- 10% - Thermal vias separation 1.2 mm - Thermal via diameter 0.3 mm +/- 0.08 mm - Cu thickness on vias 0.025 mm - Device soldered at about 2 cm from the PCB edge with two sqcm of exposed copper. 2.3 Electrical characteristics Values specified in this section are for 8 V < VCC < 28 V; -40C < Tj < 150C, unless otherwise stated. 8/37 Table 5. Power section Symbol Parameter VCC Operating supply voltage VUSD VUSDhyst Test conditions Min. Typ. Max. Unit 4.5 13 28 V Undervoltage shutdown 3.5 4.5 V Undervoltage shutdown hysteresis 0.5 Doc ID 022449 Rev 5 V VN5E050ASO-E Electrical specifications Table 5. Power section (continued) Symbol Parameter Test conditions Min. Typ. Max. Unit IOUT = 2 A; Tj = 25C RON Vclamp IS IL(off1) VF On-state resistance Clamp voltage 50 IOUT = 2 A; Tj = 150C 100 m IOUT = 2 A; VCC = 5 V; Tj = 25C 65 m 46 52 V Off-state; VCC = 13 V; Tj = 25C; VIN = VOUT = VSENSE = VCSD = 0 V 2(1) 5(1) A On-state; VCC = 13 V; VIN = 5 V; IOUT = 0 A 1.5 3 mA 0.01 3 A 5 A 0.7 V IS = 20 mA Supply current Off-state output current Output - VCC diode voltage m 41 VIN = VOUT = 0 V; VCC = 13 V; Tj = 25C 0 VIN = VOUT = 0 V; VCC = 13 V; Tj = 125C 0 -IOUT = 2 A; Tj = 150C 1. PowerMOS leakage included. Table 6. Symbol Switching (VCC = 13 V; Tj = 25 C) Parameter Test conditions Min. Typ. Max. Unit td(on) Turn-on delay time RL = 6.5 (see Figure 6) -- 20 -- s td(off) Turn-off delay time RL = 6.5 (see Figure 6) -- 40 -- s (dVOUT/dt)on Turn-on voltage slope RL = 6.5 -- See Figure 26 -- V/s (dVOUT/dt)off Turn-off voltage slope RL = 6.5 -- See Figure 28 -- V/s WON Switching energy losses during ton RL = 6.5 (see Figure 6) -- 0.20 -- mJ WOFF Switching energy losses during toff RL = 6.5 (see Figure 6) -- 0.3 -- mJ Table 7. Symbol Logic inputs Parameter Test conditions VIL Input low level voltage IIL Low level input current VIH Input high level voltage IIH High level input current VI(hyst) Input hysteresis voltage VICL Input clamp voltage VIN = 0.9 V Min. Typ. Max. Unit 0.9 V 1 A 2.1 V VIN = 2.1 V 10 0.25 IIN = 1 mA IIN = -1 mA Doc ID 022449 Rev 5 A V 5.5 7 -0.7 V V 9/37 Electrical specifications Table 7. VN5E050ASO-E Logic inputs (continued) Symbol Parameter Test conditions VCSDL CS_DIS low level voltage ICSDL Low level CS_DIS current VCSDH CS_DIS high level voltage ICSDH High level CS_DIS current VCSD = 0.9 V CS_DIS clamp voltage Parameter 0.9 V A 2.1 V 10 0.25 ICSD = 1 mA Test conditions IlimH DC short circuit current IlimL Short circuit current during thermal cycling TTSD Shutdown temperature A V 5.5 7 -0.7 V V VCC = 13 V Min. Typ. Max. Unit 19 27 38 A 38 A 5 V < VCC < 28 V VCC = 13V; TR<Tj<TTSD TR Reset temperature TRS Thermal reset of status VON Unit Protections and diagnostics (1) Symbol VDEMAG Max. 1 ICSD = -1 mA Table 8. THYST Typ. VCSD = 2.1 V VCSD(hyst) CS_DIS hysteresis voltage VCSCL Min. 7 150 175 A 200 TRS + 1 TRS + 5 C C 135 C Thermal hysteresis (TTSD - TR) 7 C Turn- Off output voltage clamp IOUT = 2 A; VIN = 0; L = 6 mH VCC-41 VCC-46 VCC-52 V Output voltage drop limitation IOUT = 0.1 A; Tj = -40C to 150C (see Figure 8) 25 mV 1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles. Table 9. Symbol K0 K1 dK1/K1(1) 10/37 Current sense (8 V < VCC < 18 V) Parameter Test conditions Min. Typ. Max. Unit IOUT/ISENSE IOUT = 0.05 A; VSENSE = 0.5 V; 1170 2000 3090 VCSD = 0 V; Tj = -40C to 150C IOUT/ISENSE IOUT = 1 A; VSENSE = 4 V; VCSD = 0 V; Tj = -40C to 150C Tj = 25C to 150C Current sense ratio drift IOUT = 1 A; VSENSE = 4 V; VCSD = 0 V; TJ = -40 C to 150 C Doc ID 022449 Rev 5 1575 2000 2750 1575 2000 2465 -10 10 % VN5E050ASO-E Electrical specifications Table 9. Symbol Current sense (8 V < VCC < 18 V) (continued) Parameter Test conditions Min. Typ. Max. Unit IOUT/ISENSE IOUT = 2 A; VSENSE = 4 V; VCSD = 0 V; Tj = -40C to 150C Tj = 25C to 150C Current sense ratio drift IOUT = 2 A; VSENSE = 4 V; VCSD = 0 V; TJ = -40 C to 150 C IOUT/ISENSE IOUT = 4 A; VSENSE = 4 V; VCSD = 0 V; Tj = -40C to 150C Tj = 25C to 150C Current sense ratio drift IOUT = 4 A; VSENSE = 4 V; VCSD = 0 V; TJ = -40 C to 150 C -4 4 % IOUT = 0 A; VSENSE = 0 V; VCSD = 5 V; VIN = 0 V; Tj = -40C to 150C 0 1 A VCSD = 0 V; VIN = 5 V; Tj = -40C to 150C 0 2 A IOUT = 2 A; VSENSE = 0 V; VCSD = 5 V; VIN = 5 V; Tj = -40C to 150C 0 1 A Open-load on-state current detection threshold VIN = 5 V; 8 V < VCC < 18 V; ISENSE = 5 A 4 20 mA VSENSE Max analog sense output voltage IOUT = 4 A; VCSD = 0 V 5 VSENSEH Analog sense output V = 13 V; RSENSE = 3.9 K voltage in fault condition(2) CC 8 V ISENSEH Analog sense output V = 13 V; VSENSE = 5 V current in fault condition(2) CC 9 mA K2 dK2/K2(1) K3 dK3/K3(1) ISENSE0 IOL Analog sense leakage current 1765 2000 2315 1765 2000 2155 -7 7 % 1840 2000 2135 1840 2000 2080 V VSENSE < 4 V; Delay response time from 0.5 A < IOUT < 4 A; tDSENSE1H falling edge of CS_DIS pin ISENSE = 90% of ISENSE max (see Figure 4) 50 100 s VSENSE < 4 V; Delay response time from 0.5 A < IOUT < 4 A; rising edge of CS_DIS pin ISENSE = 10% of ISENSE max (see Figure 4) 5 20 s VSENSE < 4 V; Delay response time from 0.5 A < IOUT < 4 A; tDSENSE2H rising edge of INPUT pin ISENSE = 90% of ISENSE max (see Figure 4) 80 250 s tDSENSE1L Doc ID 022449 Rev 5 11/37 Electrical specifications Table 9. VN5E050ASO-E Current sense (8 V < VCC < 18 V) (continued) Symbol Parameter Test conditions Delay response time between rising edge of tDSENSE2H output current and rising edge of current sense tDSENSE2L Min. Typ. Max. Unit VSENSE < 4 V; ISENSE = 90% of ISENSEMAX; IOUT = 90% of IOUTMAX; IOUTMAX = 2 A (see Figure 7) 40 VSENSE < 4 V; Delay response time from 0.5 A < IOUT < 4 A; falling edge of INPUT pin ISENSE = 10% of ISENSE max (see Figure 4) 100 s 250 s 1. Parameter guaranteed by design; it is not tested. 2. Fault condition includes: power limitation, overtemperature and open-load off-state detection. Table 10. Open-load detection (8 V < VCC < 18 V) Symbol Parameter VOL Open-load off-state voltage detection threshold VIN = 0 V tDSTKON Output short circuit to VCC detection delay at turn Off See Figure 5 IL(off2)r Off-state output current at VOUT = 4 V IL(off2)f Off-state output current at VOUT = 2 V td_vol Test conditions Min. Typ. Max. Unit 2 See Figure 5 4 V 180 1200 s VIN = 0 V; VSENSE = 0 V; VOUT rising from 0 V to 4 V -120 0 A VIN = 0 V; VSENSE = VSENSEH; VOUT falling from VCC to 2 V -50 90 A 20 s Delay response from output VOUT = 4 V; VIN = 0 V; rising edge to VSENSE rising VSENSE = 90% of VSENSEH edge in open-load Figure 4. Current sense delay characteristics INPUT CS_DIS LOAD CURRENT SENSE CURRENT tDSENSE2H 12/37 tDSENSE1L Doc ID 022449 Rev 5 tDSENSE1H tDSENSE2L VN5E050ASO-E Electrical specifications Figure 5. Open-load off-state delay timing 287387678&.$79&& 9,1 9287!92/ 96(16(+ 9&6 W'67.21 $*9 Figure 6. Switching characteristics 9287 W:RQ W:RII G9287GW RII G9287GW RQ WU WI W ,1387 WG RQ WG RII W *$3*&)7 Doc ID 022449 Rev 5 13/37 Electrical specifications Figure 7. VN5E050ASO-E Delay response time between rising edge of output current and rising edge of current sense (CS enabled) 9,1 W'6(16(+ W ,287 ,2870$; ,2870$; W ,6(16( ,6(16(0$; ,6(16(0$; W *$3*&)7 Figure 8. Output voltage drop limitation 9&&9287 7M & 7M & 7M & 921 ,287 921521 7 $*9 14/37 Doc ID 022449 Rev 5 VN5E050ASO-E Electrical specifications Figure 9. IOUT/ISENSE vs IOUT ,287,6(16( $ % & ' ( ,287 $ *$3*&)7 A = max Tj = -40 C to 150 C D = min Tj = 25 C to 150 C B = max Tj = 25 C to 150 C E = min Tj = -40 C to 150 C C = typical value Figure 10. Maximum current sense ratio drift vs load current E,L Note: ,287 $ '!0'#&4 Parameter guaranteed by design; it is not tested. Doc ID 022449 Rev 5 15/37 Electrical specifications Table 11. VN5E050ASO-E Truth table Input Output Sense (VCSD = 0 V)(1) Normal operation L H L H 0 Nominal Overtemperature L H L L 0 VSENSEH Undervoltage L H L L 0 0 H X (no power limitation) Cycling (power limitation) Nominal Conditions Overload H VSENSEH Short circuit to GND (power limitation) L H L L 0 VSENSEH Open-load off-state (with external pull-up) L H VSENSEH Short circuit to VCC (external pull-up disconnected) L H H H VSENSEH < Nominal Negative output voltage clamp L L 0 1. If the VCSD is high, the SENSE output is at a high impedance, its potential depends on leakage currents and external circuit. 16/37 Doc ID 022449 Rev 5 VN5E050ASO-E Electrical specifications Table 12. ISO 7637-2: 2004(E) Test pulse Electrical transient requirements (part 1) Test levels(1) III IV 1 -75V -100V 2a +37V 3a Number of pulses or test times Burst cycle/pulse repetition time Delays and Impedance Min. Max. 5000 pulses 0.5s 5s 2 ms, 10 +50V 5000 pulses 0.2s 5s 50s, 2 -100V -150V 1h 90ms 100ms 0.1s, 50 3b +75V +100V 1h 90ms 100ms 0.1s, 50 4 -6V -7V 1 pulse 100ms, 0.01 +65V +87V 1 pulse 400ms, 2 (2) 5b 1. The above test levels must be considered referred to VCC = 13.5 V except for pulse 5b. 2. Valid in case of external load dump clamp: 40 V maximum referred to ground. Table 13. Electrical transient requirements (part 2) ISO 7637-2: 2004E Test pulse Test level results III VI 1 C C 2a C C 3a C C 3b C C 4 C C 5b(1) C C 1. Valid in case of external load dump clamp: 40V maximum referred to ground. Table 14. Electrical transient requirements (part 3) Class Contents C All functions of the device performed as designed after exposure to disturbance. E One or more functions of the device did not perform as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device. Doc ID 022449 Rev 5 17/37 Electrical specifications 2.4 VN5E050ASO-E Waveforms Figure 11. Normal operation 1RUPDORSHUDWLRQ ,1387 1RPLQDOORDG 1RPLQDOORDG ,287 96(16( 9&6B',6 $*9 Figure 12. Overload or short to GND 2YHUORDGRU6KRUWWR*1' ,1387 3RZHU/LPLWDWLRQ , /LP+! 7KHUPDOF\FOLQJ , /LP/! ,287 96(16( 9&6B',6 $*9 18/37 Doc ID 022449 Rev 5 VN5E050ASO-E Electrical specifications Figure 13. Intermittent overload ,QWHUPLWWHQW2YHUORDG ,1387 2YHUORDG ,/LP+ ! ,/LP/ ! 1RPLQDOORDG ,287 96(16(+ ! 96(16( 9&6B',6 $*9 Figure 14. Off-state open-load with external circuitry 2)) 6WDWH2SHQ/RDG ZLWKH[WHUQDOFLUFXWU\ ,1387 9287!92/ 9287 92/ ,287 96(16(+ ! W'67. RQ 96(16( 9&6B',6 $*9 Doc ID 022449 Rev 5 19/37 Electrical specifications VN5E050ASO-E Figure 15. Short to VCC 6KRUWWR9&& 9287 5HVLVWLYH 6KRUWWR9&& +DUG 6KRUWWR9&& 92/ 9287!92/ ,287 W'67. RQ W'67. RQ 9&6B',6 $*9 Figure 16. Tj evolution in over load or short to GND 7- HYROXWLRQLQ 2YHUORDGRU6KRUWWR*1' ,1387 6HOIOLPLWDWLRQRIIDVWWKHUPDOWUDQVLHQWV 776' 7+<67 75 7-B67$57 7,/LP+! 3RZHU/LPLWDWLRQ ,/LP/ ,287 $*9 20/37 Doc ID 022449 Rev 5 VN5E050ASO-E 2.5 Electrical specifications Electrical characteristics curves Figure 17. Off-state output current Figure 18. High level input current ,LK $ ,ORII Q$ 9LQ 9 2II6WDWH 9FF 9 9LQ 9RXW 9 7F & 7F & *$3*&)7 Figure 19. Input clamp level *$3*&)7 Figure 20. Input low level 9LO 9 9LFO 9 OLQ P$ 7F & 7F & *$3*&)7 *$3*&)7 Figure 21. Input high level Figure 22. Input hysteresis voltage 9LK\VW 9 9LK 9 7F & 7F & *$3*&)7 Doc ID 022449 Rev 5 *$3*&)7 21/37 Electrical specifications VN5E050ASO-E Figure 23. On-state resistance vs Tcase Figure 24. On-state resistance vs VCC 5RQ P2KP 5RQ P2KP )O U T ! 6C C 6 4C # 4C # 4C # 4C # 7F & Figure 25. Undervoltage shutdown 9FF 9 *$3*&)7 *$3*&)7 Figure 26. Turn-On voltage slope G9RXWGW 2Q 9PV 9XVG 9 6CC 6 2) /H M 7F & 7F & *$3*&)7 Figure 27. ILIMH vs Tcase *$3*&)7 Figure 28. Turn-Off voltage slope ,OLPK $ G9RXWGW 2II 9PV 6C C 6 6C C 6 2) /HM 7F & 22/37 *$3*&)7 Doc ID 022449 Rev 5 7F & *$3*&)7 VN5E050ASO-E Electrical specifications Figure 29. CS_DIS high level voltage Figure 30. CS_DIS clamp voltage 9FVGFO 9 9FVGK 9 )IN M ! 7F & *$3*&)7 7F & '!0'#&4 Figure 31. CS_DIS low level voltage 9FVGO 9 7F & *$3*&)7 Doc ID 022449 Rev 5 23/37 Application information 3 VN5E050ASO-E Application information Figure 32. Application schematic +5V VCC Rprot CS_DIS Dld CU Rprot IINPUT OUTPUT Rprot CURRENT SENSE GND RGND RSENSE VGND Cext 3.1 DGND GND protection network against reverse battery This section provides two solutions to implement a ground protection network against reverse battery. 3.1.1 Solution 1: resistor in the ground line (RGND only) This can be used with any type of load. The following description shows how to select the RGND resistor: 1. RGND 600 mV / (IS(on)max) 2. RGND (-VCC) / (-IGND) where -IGND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device datasheet. Power dissipation in RGND (when VCC < 0 during reverse battery situations) is: PD = (-VCC)2/RGND This resistor can be shared amongst several different HSDs. Please note that the value of this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the maximum on-state currents of the different devices. Please note that, if the microprocessor ground is not shared by the device ground, then the RGND produces a shift (IS(on)max * RGND) in the input thresholds and in the status output 24/37 Doc ID 022449 Rev 5 VN5E050ASO-E Application information values. This shift varies depending on how many devices are ON in case of several high side drivers sharing the same RGND. If the calculated power dissipation requires the use of a large resistor, or several devices have to share the same resistor, then ST suggests to utilize Section 3.1.2: Solution 2: diode (DGND) in the ground line. 3.1.2 Solution 2: diode (DGND) in the ground line Note that a resistor (RGND = 1 k) should be inserted in parallel to DGND if the device drives an inductive load. This small signal diode can be safely shared amongst several different HSDs. Also in this case, the presence of the ground network will produce a shift (600 mV) in the input threshold and in the status output values if the microprocessor ground is not common to the device ground. This shift will not vary if more than one HSD shares the same diode/resistor network. 3.2 Load dump protection Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds the VCC maximum DC rating. The same applies if the device is subject to transients on the VCC line which are greater than the ones shown in the ISO 7637-2: 2004(E) table. 3.3 MCU I/O protection If a ground protection network is used and negative transients are present on the VCC line, the control pins are pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent the microcontroller I/O pins from latching up. The value of these resistors is a compromise between the leakage current of microcontroller and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of microcontroller I/Os: -VCCpeak/Ilatchup Rprot (VOHC-VIH-VGND) / IIHmax Calculation example: For VCCpeak = -100 V and Ilatchup 20 mA; VOHC 4.5 V 5 k Rprot 180 k Recommended values: Rprot = 10 k, CEXT = 10 nF. 3.4 Current sense and diagnostic The current sense pin performs a double function (see Figure 33: Current sense and diagnostic): Current mirror of the load current in normal operation, delivering a current proportional to the load current according to a known ratio KX. The current ISENSE can be easily converted to a voltage VSENSE by means of an external resistor RSENSE. Linearity between IOUT and VSENSE is ensured up to 5V minimum (see parameter VSENSE in Table 9: Current sense (8 V < VCC < 18 V)). The Doc ID 022449 Rev 5 25/37 Application information VN5E050ASO-E current sense accuracy depends on the output current (refer to current sense electrical characteristics Table 9: Current sense (8 V < VCC < 18 V)). Diagnostic flag in fault conditions, delivering a fixed voltage VSENSEH up to a maximum current ISENSEH in case of the following fault conditions (refer to Table 11: Truth table): - Power limitation activation - Overtemperature - Short to VCC in off-state - Open-load in off-state with additional external components. A logic level high the CS_DIS pin simultaneously sets all the current sense pins of the device in a high impedance state, thus disabling the current monitoring and diagnostic detection. This feature allows multiplexing of the microcontroller analog inputs by sharing the sense resistance and ADC line among different devices. Figure 33. Current sense and diagnostic 938 9%$7 9&& 0DLQ026Q 9 38B&0' 2YHUWHPSHUDWXUH ,287.; 538 2/2)) ,6(16(+ 92/ 3ZUB/LP &6B',6 287Q ,/RIIU ,/RIII ,1387Q 96(16(+ &855(17 6(16(Q *1' 53527 7RX&$'& 56(16( /RDG 53' 96(16( '!0'#&4 3.4.1 Short to VCC and off-state open-load detection Short to VCC A short circuit between VCC and output is indicated by the relevant current sense pin set to VSENSEH during the device off-state. Little or no current is delivered by the current sense during the on-state depending on the nature of the short circuit. 26/37 Doc ID 022449 Rev 5 VN5E050ASO-E Application information Off-state open-load with external circuitry Detection of an open-load in off mode requires an external pull-up resistor (RPU) connecting the output to a positive supply voltage (VPU). It is preferable that VPU is switched off during the module standby mode to avoid an increase in overall standby current consumption in normal conditions, that is, when the load is connected. An external pull-down resistor (RPD) connected between output and GND is mandatory to avoid misdetection in case of floating outputs in off-state (see Figure 33: Current sense and diagnostic). RPD must be selected in order to ensure VOUT < VOLmin unless pulled up by the external circuitry: VOUT Pull - up _ OFF = RPD I L ( off 2) f < VOL min = 2V RPD 22 K is recommended. For proper open-load detection in off-state, the external pull-up resistor must be selected according to the following formula: VOUT Pull - up _ ON = RPD VPU - RPU RPD I L ( off 2) r RPU + RPD > VOL max = 4V For the values of VOLmin,VOLmax, IL(off2)r and IL(off2)f see Table 10: Open-load detection (8 V < VCC < 18 V). Doc ID 022449 Rev 5 27/37 Application information 3.5 VN5E050ASO-E Maximum demagnetization energy (VCC = 13.5V) Figure 34. Maximum turn-Off current versus inductance 100 A B C I (A) 10 1 0,1 1 L (mH) 10 100 A: Tjstart = 150C single pulse B: Tjstart = 100C repetitive pulse C: Tjstart = 125C repetitive pulse VIN, IL Demagnetization Demagnetization Demagnetization t Note: 28/37 Values are generated with RL = 0 . In case of repetitive pulses, Tjstart (at the beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves A and B. Doc ID 022449 Rev 5 VN5E050ASO-E Package and PCB thermal data 4 Package and PCB thermal data 4.1 SO-16L thermal data Figure 35. SO-16L PC board ("1($'5 Note: Layout condition of Rth and Zth measurements (PCB: Double layer, Thermal Vias, FR4 area = 77 mm x 86 mm, PCB thickness = 1.6 mm, Cu thickness = 70 m (front and back side), Copper areas: from minimum pad lay-out to 8 cm2). Figure 36. Rthj-amb vs PCB copper area in open box free air condition 57+MDPE 57+MDPE '!0'2) Doc ID 022449 Rev 5 29/37 Package and PCB thermal data VN5E050ASO-E Figure 37. SO-16L thermal impedance junction ambient single pulse =7+ &: &X FP &X FP &X IRRWSULQW 7LPH V '!0'2) Equation 1: pulse calculation formula Z TH = R TH +Z THtp (1 - ) where = tP/T Figure 38. Thermal fitting model of a single channel HSD in SO-16L (a) '!0'2) a. The fitting model is a simplified thermal tool and is valid for transient evolutions where the embedded protections (power limitation or thermal cycling during thermal shutdown) are not triggered. 30/37 Doc ID 022449 Rev 5 VN5E050ASO-E Package and PCB thermal data Table 15. Thermal parameter Area/island (cm2) Footprint R1 (C/W) 0.7 R2 (C/W) 2.3 R3 (C/W) 4 R4 (C/W) 2 8 8 6 6 R5 (C/W) 14 13 13 R6 (C/W) 28 20 14.5 C1 (W.s/C) 0.001 C2 (W.s/C) 0.01 C3 (W.s/C) 0.1 C4 (W.s/C) 0.5 C5 (W.s/C) 1 1.5 1.5 C6 (W.s/C) 3 9 12 Doc ID 022449 Rev 5 31/37 Package information VN5E050ASO-E 5 Package information 5.1 ECOPACK(R) packages In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK(R) packages, depending on their level of environmental compliance. ECOPACK(R) specifications, grade definitions and product status are available at: www.st.com. ECOPACK(R) is an ST trademark. 5.2 Package mechanical data Figure 39. SO-16L package dimensions ("1($'5 32/37 Doc ID 022449 Rev 5 VN5E050ASO-E Package information Table 16. SO-16L mechanical data Millimeters Symbol Min Typ Max A 2.35 2.65 A1 0.10 0.30 B 0.33 0.51 C 0.23 0.32 D 10.10 10.50 E 7.40 7.60 e 1.27 H 10.00 10.65 h 0.25 0.75 L 0.40 1.27 k 0 8 ddd 0.10 Doc ID 022449 Rev 5 33/37 Package information 5.3 VN5E050ASO-E Packing information Figure 40. SO-16L tube shipment (no suffix) "ASE 1TY "UL K 1 TY 4U BE LE N G TH ! " # # " !LL DIMENSIO NS ARE IN MM ! ("1($'5 Figure 41. SO-16L tape and reel shipment (suffix "TR") 34/37 Doc ID 022449 Rev 5 VN5E050ASO-E 6 Order codes Order codes Table 17. Device summary Order codes Package SO-16L Tube Tape and reel VN5E050ASO-E VN5E050ASOTR-E Doc ID 022449 Rev 5 35/37 Revision history 7 VN5E050ASO-E Revision history Table 18. 36/37 Document revision history Date Revision Changes 14-Dec-2011 1 Initial release 16-Mar-2012 2 Added Section 4: Package and PCB thermal data and update Table 5. 25-June-2012 3 Update Table 4. 18-Sep-2012 4 Update Table 4. 18-Sep-2013 5 Updated disclaimer. Doc ID 022449 Rev 5 VN5E050ASO-E Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST's terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. 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