This is information on a product in full production.
September 2013 Doc ID 022449 Rev 5 1/37
1
VN5E050ASO-E
Single channel high-side driver with analog current sense
for automotive applications
Datasheet
−
production data
Features
■
General
– Inrush current active management by
power limitation
– Very low standby current
– 3.0 V CMOS compatible inputs
– Optimized electromagnetic emissions
– Very low electromagnetic susceptibility
– Compliant with European directive
2002/95/EC
– Very low current sense leakage
– AEC-Q100 qualified
■
Diagnostic functions
– Proportional load current sense
– High current sense precision for wide
currents range
– Current sense disable
– Off-state open-load detection
– Output short to V
CC
detection
– Overload and short to ground (power
limitation) indication
– Therm al sh utdow n indica tion
■
Protections
– Undervoltage shutdown
– Overvoltage clamp
– Load current limitation
– Self limiting of fast thermal transients
– Protection against loss of ground and loss
of V
CC
– Overtemperature shutdown with auto
restart (thermal shutdown)
– Reverse battery protected
– Electros tatic disc harge protection
Application
■
All types of resistive, inductive and capacitive
loads
■
Suitable as LED driver
Description
The VN5E050ASO-E is a single channel high-
side driver manufactured using ST proprietary
VIPower
®
M0-5 technology and housed in the
SO-16L package. The device is designed to drive
12 V automotive grounded loads, and to provide
protection and diagnostics. It also implements a
3 V and 5 V CMOS-compatible interface for the
use with any microcontroller.
The device integrates advanced protective
functions such as load current limitation, inrush
and overload active management by power
limitation, overtemperature shut-off with auto-
restart and overvoltage active clamp. A dedicated
analog current sense pin is associated with every
output channel providing enhanced diagnostic
functions including fast detection of overload and
short-circuit to ground through power limitation
indication, overtemperature indication, short-
circuit to V
CC
diagnosis and on-state and off-state
open-load detection.
The current sensing and diagnostic feedback of
the whole device can be disabled by pulling the
CS_DIS pin high to share the external sense
resistor with similar devices.
Max supply voltage V
CC
41 V
Operati ng vol tage range V
CC
4.5 to 28V
Max on-state resistance R
ON
50 mΩ
Current lim itation (typ) I
LIMH
27 A
Off-st a te sup ply current I
S
2 µA
(1)
1. Typical value with all loads connected.
SO-16L
("1($'5
www.st.com
Contents VN5E050ASO-E
2/37 Doc ID 022449 Rev 5
Contents
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3 Elect rical char acteristi c s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.4 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.5 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 24
3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 24
3.1.2 Solution 2: diode (D
GND
) in the ground line . . . . . . . . . . . . . . . . . . . . . . 25
3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.3 MCU I/O protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.4 Curre nt sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.4.1 Short to VCC and off-state open-load detection . . . . . . . . . . . . . . . . . . 26
3.5 Maximum demagneti zation energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 28
4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
4.1 SO-16L thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.1 ECOPACK
®
packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.2 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
6 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
VN5E050ASO-E List of tables
Doc ID 022449 Rev 5 3/37
List of tables
Table 1. Pin function. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 5. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 6. Switching (V
CC
=13V; T
j
= 25 °C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 7. Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 8. Protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 9. Current sense (8 V < VCC < 18 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 10. Open-load detection (8 V < VCC < 18 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 11. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 12. Electrical transient requirements (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 13. Electrical transient requirements (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 14. Electrical transient requirements (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 15. Thermal parameter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Table 16. SO-16L mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Table 17. Device summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Table 18. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
List of figures VN5E050ASO-E
4/37 Doc ID 022449 Rev 5
List of figures
Figure 1. Block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 5. Open-load off-state delay timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 6. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 7. Delay response time between rising edge of output current and rising edge of current sense
(CS enabled). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 8. Output voltage drop limitation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 9. I
OUT
/I
SENSE
vs I
OUT
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 10. Maximum current sense ratio drift vs load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 11. Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 12. Overload or short to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 13. Intermittent overload. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 14. Off-state open-load with external circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 15. Short to V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 16. T
j
evolution in over load or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 17. Off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 18. High level input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 19. Input clamp level. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 20. Input low level. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 21. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 22. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 23. On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 24. On-state resistance vs VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 25. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 26. Turn-On voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 27. ILIMH vs Tcase. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 28. Turn-Off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 29. CS_DIS high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 30. CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 31. CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 32. Application schematic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 33. Current sense and diagnostic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 34. Maximum turn-Off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 35. SO-16L PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 36. Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . 29
Figure 37. SO-16L thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 38. Thermal fitting model of a single channel HSD in SO-16L . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 39. SO-16L package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 40. SO-16L tube shipment (no suffix). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 41. SO-16L tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
VN5E050ASO-E Block diagram and pin description
Doc ID 022449 Rev 5 5/37
1 Block diagram and pin description
Figure 1. Block diagram
Table 1. Pin function
Name Function
V
CC
Battery connection.
OUTPUT Power output.
GND Ground connection. Must be reverse battery protected by an external
diode/res is tor netwo rk.
INPUT Voltage control led input pin wi th hyster esis, CMOS co mpatible; i t controls
output switch state.
CURRENT SENSE Analog current sense pin; it delivers a current proportional to the load
current.
CS_DIS Active high CMOS compatible pin, to disable the current sense pin.
V
CC
C ontrol & D iagnostic
LOGIC
DRIVER
V
ON
Limitation
Current
Limitation
Power
Clamp
OFF State
Open load
Over
temp.
Undervoltage
V
SENSEH
Current
Sense
OVERLOAD PROTECTION
(ACTIVE POWER LIMITATION)
IN
CS
CS_
DIS
GND
OUT
Signal Clamp
Block diagram and pin description VN5E050ASO-E
6/37 Doc ID 022449 Rev 5
Figure 2. Configuration diagram (top view)
Table 2. Suggested connections for unused and not connected pin s
Connection / pin Current sense N.C. Output Input CS_DIS
Floating Not allowed X X X X
To ground Through 1 KΩ
resistor XThrough
22 KΩ resistor Through 10 KΩ
resistor Through 10 KΩ
resistor
 9FF9FF
9FF9FF
1&
1&
1&
287387
287387
287387
*1'
,1387
&6(16(
1&
&6',6
1&
("1($'5
VN5E050ASO-E Electrical specifications
Doc ID 022449 Rev 5 7/37
2 Electrical specifications
Figure 3. Current and voltage conventions
Note: V
F
=V
OUT
- V
CC
during reverse battery condition.
2.1 Absolute maximum ratings
S tressing the device above the rating listed in Table 3 may cause permanent damage to the
device. These are stress ratings only and operation of the device at these or any other
conditions above those indicated in the Operating sections of this specification is not
implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect
device reliability.
V
F
I
S
I
GND
V
CC
V
CC
OUTPUT
INPUT
V
IN
V
SENSE
GND
CS_DIS
I
CSD
V
CSD
I
IN
CURRENT
SENSE
V
OUT
I
OUT
I
SENSE
Table 3. Absolute maximum ratings
Symbol Parameter Value Unit
V
CC
DC supply voltage 41 V
-V
CC
Reverse DC supply voltage 0.3 V
-I
GND
DC reverse ground pin current 200 mA
I
OUT
DC output current Internally
limited A
-I
OUT
Reverse DC output current 20 A
I
IN
DC input current -1 to 10 mA
I
CSD
DC current sense disable input cu rren t -1 to 10 mA
-I
CSENSE
DC reverse CS pin current 200 mA
V
CSENSE
Current sense maximum voltage V
CC
- 41 to
+V
CC
V
E
MAX
Maximum switching energy (single pulse)
L=3mH; R
L
=0
Ω
; V
bat
=13.5V; T
jstart
=150°C; I
OUT
=I
limL
(Typ.)
104 mJ
Electrical specifications VN5E050ASO-E
8/37 Doc ID 022449 Rev 5
2.2 Thermal data
2.3 Electrical characteristics
Values specified in this section are for 8 V < V
CC
< 28 V; -40°C < T
j
< 150°C, unless
otherwise stated.
Symbol Parameter Value Unit
V
ESD
Electrostatic discharge
(Human Body Model: R = 1.5 K
Ω;
C=100pF)
– INPUT
– CURRENT SENSE
–CS_DIS
–OUTPUT
–V
CC
4000
2000
4000
5000
5000
V
V
V
V
V
V
ESD
Charge device model (CDM-AEC-Q100-011) 750 V
T
j
Juncti on ope rati ng tem pera ture -40 to 150 °C
T
stg
Storage temperature -55 to 150 °C
Table 3. Absolute maximum ratings (continued)
Table 4. Thermal data
Symbol Parameter Typ. value Unit
R
thj-pcb
Thermal resistance junction-pcb
(1)
1. The measure is done in accordance with the JESD 51-8.
18.5 °C/W
R
thj-amb
Thermal resistance junction - ambient on two layers pcb See
Figure 36
°C/W
R
thj-amb
Thermal resistance junction - ambient on two layers pcb
(2)
2. Four Layers PCB character istics:
- Cu thickness: 70 um outer layers, 35 um inner layers
- Board finish thickness 1.6 mm +/- 10%
- Thermal vias separation 1.2 mm
- Thermal via diameter 0.3 mm +/- 0.08 mm
- Cu thickness on vias 0.025 mm
- Device soldered at about 2 cm from the PCB edge with two sqcm of exposed copper.
34.5 °C/W
Table 5. Power section
Symbol Parameter Test co ndit ions Mi n. Typ. Max. U nit
V
CC
Operating supply
voltage 4.5 13 28 V
V
USD
Undervoltage shutdown 3.5 4.5 V
V
USDhyst
Undervoltage shutdo wn
hysteresis 0.5 V
VN5E050ASO-E Electrical specifications
Doc ID 022449 Rev 5 9/37
R
ON
On-state resistance
I
OUT
=2 A; T
j
=25°C 50 m
Ω
I
OUT
=2 A; T
j
= 150°C 100 m
Ω
I
OUT
=2 A; V
CC
=5V; T
j
=25°C 65 m
Ω
V
clamp
Clamp vol tage I
S
=20mA 41 46 52 V
I
S
Supply current
Off-state; V
CC
=13V; T
j
= 25°C;
V
IN
=V
OUT
=V
SENSE
=V
CSD
=0V 2
(1)
5
(1)
µA
On-st a te; V
CC
=13V; V
IN
=5V;
I
OUT
=0A 1.5 3 mA
I
L(off1)
Off-state output current
V
IN
=V
OUT
=0V; V
CC
=13V;
T
j
=25°C 00.013 µA
V
IN
=V
OUT
=0V; V
CC
=13V;
T
j
=125°C 05µA
V
F
Output - V
CC
diode
voltage -I
OUT
=2A; T
j
= 150°C 0.7 V
1. PowerMOS leakage included.
Table 6. Switching (V
CC
=13V; T
j
=25°C)
Symbol Parameter Test conditions Min. Ty p. Max. Unit
t
d(on)
Turn-on delay time R
L
=6.5
Ω
(see
Figure 6
)— 20 — µs
t
d(off)
Turn-of f del ay time R
L
=6.5
Ω
(see
Figure 6
)— 40 — µs
(dV
OUT
/dt)
on
Turn-on voltage slope R
L
=6.5
Ω
—See
Figure 26
—V
/
µs
(dV
OUT
/dt)
off
Turn-of f vo lt a ge slo pe R
L
=6.5
Ω
—See
Figure 28
—V
/
µs
W
ON
Switching energy losses
during t
on
R
L
=6.5
Ω
(see
Figure 6
)—0.20 —mJ
W
OFF
Switching energy losses
during t
off
R
L
=6.5
Ω
(see
Figure 6
)—0.3 —mJ
Table 7. Logic inputs
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
IL
Input low level voltage 0.9 V
I
IL
Low level input current V
IN
=0.9V 1 µA
V
IH
Input high level voltage 2.1 V
I
IH
High level input current V
IN
=2.1V 10 µA
V
I(hyst)
Input hysteresis voltage 0.25 V
V
ICL
Input clamp voltage I
IN
=1mA 5.5 7 V
I
IN
=-1mA -0.7 V
Table 5. Power section (continued)
Symbol Parameter Test co ndit ions Mi n. Typ. Max. U nit
Electrical specifications VN5E050ASO-E
10/37 Doc ID 022449 Rev 5
V
CSDL
CS_DIS low level voltage 0.9 V
I
CSDL
Low level CS_DI S current V
CSD
=0.9V 1 µA
V
CSDH
CS_DIS high level voltage 2.1 V
I
CSDH
High level CS_DIS current V
CSD
=2.1V 10 µA
V
CSD(hyst)
CS_DIS hysteresis voltage 0.25 V
V
CSCL
CS_DIS clamp voltage I
CSD
=1mA 5.5 7 V
I
CSD
=-1mA -0.7 V
Table 8. Protections and diagnostics
(1)
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper soft ware strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
limH
DC short circuit current V
CC
= 13 V 19 27 38 A
5V<V
CC
<28V 38 A
I
limL
Short circuit current
during thermal cycling V
CC
=13V; T
R
<T
j
<T
TSD
7A
T
TSD
Shutdown temperature 150 175 200 °C
T
R
Reset temper ature T
RS
+ 1 T
RS
+ 5 °C
T
RS
Thermal reset of status 135 °C
T
HYST
Thermal hy ste res is
(T
TSD
-T
R
)7°C
V
DEMAG
Turn- Off output voltage
clamp I
OUT
=2A; V
IN
=0;
L=6mH V
CC
-41 V
CC
-46 V
CC
-52 V
V
ON
Output voltage drop
limitation
I
OUT
=0.1A;
T
j
= -40°C to 150°C
(see
Figure 8
)25 mV
Table 9. Current sense (8 V < V
CC
<18V)
Symbol Parameter Test conditions Min. Typ. Max. Unit
K
0
I
OUT
/I
SENSE
I
OUT
=0.05A; V
SENSE
=0.5V;
V
CSD
=0V; T
j
= -40°C to 15 0°C 1170 2000 3090
K
1
I
OUT
/I
SENSE
I
OUT
=1A; V
SENSE
=4V;
V
CSD
=0V;
T
j
= -40°C to 150°C
T
j
= 25°C to 150°C 1575
1575 2000
2000 2750
2465
dK
1
/K
1(1)
Current sense ratio dr ift I
OUT
=1A; V
SENSE
=4 V;
V
CSD
=0V;
T
J
= -40 °C to 150 °C -10 10 %
Table 7. Logic inputs (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
VN5E050ASO-E Electrical specifications
Doc ID 022449 Rev 5 11/37
K
2
I
OUT
/I
SENSE
I
OUT
=2A; V
SENSE
=4V;
V
CSD
=0V;
T
j
= -40°C to 150°C
T
j
= 25°C to 150°C 1765
1765 2000
2000 2315
2155
dK
2
/K
2(1)
Current sense ratio dr ift I
OUT
=2A; V
SENSE
=4V;
V
CSD
=0V;
T
J
= -40 °C to 150 °C -7 7 %
K
3
I
OUT
/I
SENSE
I
OUT
=4A; V
SENSE
=4V;
V
CSD
=0V;
T
j
= -40°C to 150°C
T
j
= 25°C to 150°C 1840
1840 2000
2000 2135
2080
dK
3
/K
3(1)
Current sense ratio dr ift I
OUT
=4A; V
SENSE
=4V;
V
CSD
=0V;
T
J
= -40 °C to 150 °C -4 4 %
I
SENSE0
Analog sense leakage
current
I
OUT
=0A; V
SENSE
=0V;
V
CSD
=5V; V
IN
=0V;
T
j
= -40°C to 150°C 01µA
V
CSD
=0V; V
IN
=5V;
T
j
= -40°C to 150°C 02µA
I
OUT
=2A; V
SENSE
=0V;
V
CSD
=5V; V
IN
=5V;
T
j
= -40°C to 150°C 01µA
I
OL
Open-lo ad on-s t ate
curr ent detection
threshold
V
IN
=5V; 8V<V
CC
<18V;
I
SENSE
=5µA 420mA
V
SENSE
Max analog sense output
voltage I
OUT
=4A; V
CSD
=0V 5 V
V
SENSEH
Analog sense output
volt age in fau lt co nditio n
(2)
V
CC
=13V; R
SENSE
=3.9K
Ω
8V
I
SENSEH
Analog sense output
current in fault condition
(2)
V
CC
=13V; V
SENSE
=5V 9 mA
t
DSENSE1H
Delay response time from
falling ed ge of CS_DIS pin
V
SENSE
<4V;
0.5 A < I
OUT
<4A;
I
SENSE
= 90% of I
SENSE
max
(see
Figure 4
)
50 100 µs
t
DSENSE1L
Delay response time from
rising edge of CS_DIS pin
V
SENSE
< 4 V;
0.5 A < I
OUT
<4A;
I
SENSE
= 10% of I
SENSE
max
(see
Figure 4
)
520µs
t
DSENSE2H
Delay response time from
rising edge of INPUT pin
V
SENSE
<4V;
0.5 A < I
OUT
<4A;
I
SENSE
= 90% of I
SENSE
max
(see
Figure 4
)
80 250 µs
Table 9. Current sense (8 V < V
CC
< 18 V) (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
Electrical specifications VN5E050ASO-E
12/37 Doc ID 022449 Rev 5
Figure 4. Current sense delay characteristics
Δ
t
DSENSE2H
Dela y response time
between rising edge of
output current and rising
edge of current sense
V
SENSE
<4V;
I
SENSE
= 90% of I
SENSEMAX
;
I
OUT
= 90% of I
OUTMAX
;
I
OUTMAX
=2A
(see
Figure 7
)
40

µs
t
DSENSE2L
Delay response time from
falling edge of INPUT pin
V
SENSE
< 4 V;
0.5 A < I
OUT
<4A;
I
SENSE
= 10% of I
SENSE
max
(see
Figure 4
)
100 250 µs
1. Parameter guaranteed by design; it is not tested.
2. Fault condition includes: power limitation, overtemperature and open-load off-state detection.
Table 10. Open-load detection (8 V < V
CC
<18V)
Symbol Parameter Test conditions Min. Ty p. Max. Unit
V
OL
Open-load off-state voltage
detection threshold V
IN
=0V 2 See
Figure 5
4V
t
DSTKON
Output short circuit to V
CC
detection delay at turn Off See
Figure 5
180 1200 µs
I
L(off2)r
Off-state output current at
V
OUT
=4V V
IN
=0V; V
SENSE
=0V;
V
OUT
rising from 0 V to 4 V -120 0 µA
I
L(off2)f
Off-state output current at
V
OUT
=2V
V
IN
=0V;
V
SENSE
=V
SENSEH
; V
OUT
falling from V
CC
to 2 V -50 90 µA
t
d_vol
Delay respon se from output
rising edg e to V
SENSE
rising
edge in open-load
V
OUT
=4V; V
IN
=0V;
V
SENSE
= 90% of V
SENSEH
20 µs
Table 9. Current sense (8 V < V
CC
< 18 V) (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
SENSE CURREN T
INPUT
LOAD CURRENT
CS_DIS
t
DSENSE2H
t
DSENSE2L
t
DSENSE1L
t
DSENSE1H
VN5E050ASO-E Electrical specifications
Doc ID 022449 Rev 5 13/37
Figure 5. Open-load off-state delay timing
Figure 6. Switching characteristics
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Electrical specifications VN5E050ASO-E
14/37 Doc ID 022449 Rev 5
Figure 7. Delay response time between rising edge of output current and rising
edge of current sense (CS enabled)
Figure 8. Output voltage drop limitation
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Figure 9. I
OUT
/I
SENSE
vs I
OUT
Figure 10. Maximum current sense ratio drift vs load current
Note: Parameter guaranteed by design; it is not tested.
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Table 11. Truth table
Conditions Input Output Sense (V
CSD
=0V)
(1)
1. If the V
CSD
is high, the SENSE output is at a high impedance, its potential depends on leakage currents
and external circuit.
Normal operati on L
HL
H0
Nominal
Overtemperature L
HL
L0
V
SENSEH
Undervoltage L
HL
L0
0
Overload
H
H
X
(no power limitation)
Cycling
(power limitation)
Nominal
V
SENSEH
Short circuit to GND
(power lim itation) L
HL
L0
V
SENSEH
Open-load off-state
(with external pull-up) LHV
SENSEH
Short circuit to V
CC
(external pul l-up
disconnected)
L
HH
HV
SENSEH
< Nominal
Negative output voltage
clamp LL 0
VN5E050ASO-E Electrical specifications
Doc ID 022449 Rev 5 17/37
Table 12. Electrical transient requirements (part 1)
ISO 7637 -2:
2004(E)
Test pulse
Test levels
(1)
1. The above test levels must be considered referred to V
CC
= 13.5 V except for pulse 5b.
Number of
pulses or
test times
Burst cycle/p ulse
repetition time Delays and
Impedance
III IV Min. Max.
1 -75V -100V 5000 pulses 0.5s 5s 2 ms, 10
Ω
2a +37V +50V 5000 pulses 0.2s 5s 50µs, 2
Ω
3a -100V -150V 1h 90ms 100ms 0.1µs, 50
Ω
3b +75V +100V 1h 90ms 100ms 0.1µs, 50
Ω
4 -6V -7V 1 pulse 100ms, 0.01
Ω
5b
(2)
2. Valid in case of external load dump clamp: 40 V maximum referred to ground.
+65V +87V 1 pulse 400ms, 2
Ω
Table 13. Electrical transient requirements (part 2)
ISO 763 7-2:
2004E
Test pulse
Test level results
III VI
1C C
2a C C
3a C C
3b C C
4C C
5b
(1)
1. Valid in case of external load dump clamp: 40V maximum referred to ground.
CC
Table 14. Electrical transient requirements (part 3)
Class Contents
C All functions of the device performed as designed after exposure to disturbance.
EOne or more functions of the device did not perform as designed after exposure to
disturbance and cannot be returned to proper operation without replacing the device.
Electrical specifications VN5E050ASO-E
18/37 Doc ID 022449 Rev 5
2.4 Waveforms
Figure 11. Normal operation
Figure 12. Overload or short to GND
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Figure 13. Intermittent overload
Figure 14. Off-state open-load with external circuitry
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Figure 15. Short to V
CC
Figure 16. T
j
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2.5 Electrical characteristics curves
Figure 17. Off-state output current Figure 18. High level input current
Figure 19. Input clamp level Figure 20. Input low level
Figure 21. Input high level Figure 22. Input hysteresis voltage
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22/37 Doc ID 022449 Rev 5
Figure 23. On-state resistance vs T
case
Figure 24. On-state resistance vs V
CC
Figure 25. Undervoltage shutdown Figure 26. Turn-On voltage slope
Figure 27. I
LIMH
vs T
case
Figure 28. Turn-Off voltage slope
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VN5E050ASO-E Electrical specifications
Doc ID 022449 Rev 5 23/37
Figure 29. CS_DIS high level voltage Figure 30. CS_DIS clamp voltage
Figure 31. CS_DIS low level voltage
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Application information VN5E050ASO-E
24/37 Doc ID 022449 Rev 5
3 Application information
Figure 32. Application schematic
3.1 GND protection network against reverse battery
This section provides two solutions to implement a ground protection network against
reverse battery.
3.1.1 Solution 1: resistor in the ground line (R
GND
only)
This can be used with any type of load.
The following description shows how to select the R
GND
resistor:
1. R
GND
≤ 600 mV / (I
S(on)max
)
2. R
GND
≥ (-V
CC
) / (-I
GND
)
where -I
GND
is the DC reverse ground pin current and can be found in the absolute
maximum rating section of the device datasheet.
Power dissipation in R
GND
(when V
CC
< 0 during reverse battery situations) is:
P
D
= (-V
CC
)
2
/R
GND
This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where I
S(on)max
becomes the sum of the
maximum on-state currents of the different devices.
Please note that, if the microprocessor ground is not shared by the device ground, then the
R
GND
produces a shift (I
S(on)max
* R
GND
) in the input thresholds and in the status output
V
CC
GND
OUTPUT
D
GND
R
GND
D
ld
Μ
CU
+5V
V
GND
CS_DIS
IINPUT
R
prot
R
prot
CURRENT SENSE
R
prot
R
SENSE
C
ext
VN5E050ASO-E Application information
Doc ID 022449 Rev 5 25/37
values. This shift varies depending on how many devices are ON in case of several high
side drivers sharing the same R
GND
.
If the calculated power dissipation requires the use of a large resistor, or several devices
have t o sh ar e t h e same re si st or, then S T su gge sts to u til i ze Section 3.1.2: Solution 2: diode
(D
GND
) in the ground line.
3.1.2 Sol ution 2: diode (D
GND
) in the ground line
Note that a resistor (R
GND
=1kΩ) should be inserted in parallel to D
GND
if the devi ce dr ives
an inductive load.
This small signal diode can be safely shared amongst several different HSDs. Also in this
case, the presence of the ground network will produce a shift (≈600 mV) in the input
threshold and in the status output values if the microprocessor ground is not common to the
device ground. This shift will not vary if more than one HSD shares the same diode/resistor
network.
3.2 Load dump protection
D
ld
is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds the
V
CC
maximum DC rating. The same applies if the device is subject to transients on the V
CC
line which are greater than the ones shown in the ISO 7637-2: 2004(E) table.
3.3 MCU I/O protection
If a ground protection network is used and negative transients are present on the V
CC
line,
the control pins are pulled negative. ST suggests to insert a resistor (R
prot
) in li ne to prev ent
the microcontroller I/O pins from latching up.
The value of these resistors is a compromise between the leakage current of microcontroller
and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of
microcontroller I/Os:
-V
CCpeak
/I
latchup
≤ R
prot
≤ (V
OH
μ
C
-V
IH
-V
GND
) / I
IHmax
Calculation example:
For V
CCpeak
= -100 V and I
latchup
≥ 20 m A; V
OHµC
≥ 4.5 V
5kΩ ≤ R
prot
≤ 180 kΩ
Recommended values: R
prot
=10kΩ, C
EXT
=10nF.
3.4 Current sense and diagnostic
The current sense pin performs a double function (see Figure 33: Current sense and
diagnostic):
●
Current mirror of the load current in normal operation, deliveri ng a curre nt
proportional to the load current according to a known ratio K
X
.
The current I
SENSE
can be easily converted to a voltage V
SENSE
by means of an
external resistor R
SENSE
. Linearity between I
OUT
and V
SENSE
is ensured up to 5V
minimum (see parameter V
SENSE
in Table 9: Current sense (8 V < VCC < 18 V)). The
Application information VN5E050ASO-E
26/37 Doc ID 022449 Rev 5
current sense accuracy depends on the output current (refer to current sense electrical
characteristics Table 9: Current sense (8 V < VCC < 18 V)).
●
Diagnostic flag in fault conditions, delivering a fixed voltage V
SENSEH
up to a
maximum current I
SENSEH
in case of the following fault conditions (refer to
Table 11: Truth table):
– Power limitation activation
– Overtemperature
– Short to V
CC
in off-state
– Open-load in off-state with additional external components.
A logic level high the CS_DIS pin simultaneously sets all the current sense pins of the
device in a high impedance state, thus disabling the current monitoring and diagnostic
detection. This feature allows multiplexing of the microcontroller analog inputs by sharing
the sense resistance and ADC line among different devices.
Figure 33. Current sense and diagnost ic
3.4. 1 Short to V
CC
and off-state open-load detection
Short to V
CC
A short circuit between V
CC
and output is indicated by the relevant current sense pin set to
V
SENSEH
during the device off-state. Little or no current is delivered by the current sense
during the on-state depending on the nature of the short circuit.
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VN5E050ASO-E Application information
Doc ID 022449 Rev 5 27/37
Off-state open-load with external circuitry
Detection of an open-load in off mode requires an external pull-up resistor (R
PU
) connecting
the output to a positive supply voltage (V
PU
).
It is preferable that V
PU
is switched off during the module standby mode to avoid an increase
in overall standby current consumption in normal conditions, that is, when the load is
connected.
An external pull-down resistor (R
PD
) connected between output and GND is mandatory to
avoid misdetection in case of floating outputs in off-state (see Figure 33: Current sense and
diagnostic).
R
PD
must be selected in order to ensure V
OUT
<
V
OLmin
unless pulled up by the external
circuitry:
R
PD
≤ 22 K
Ω
is reco mme nde d.
For proper open-load detection in off-state, the external pull-up resistor must be selected
according to the following formula:
For the values of V
OLmin
,V
OLmax
,
I
L(off2)r
and I
L(off2)f
see Table 10: Open-load detection
(8 V < VCC < 18 V).
VVIRV
OLfoffLPD
OFFupPull
OUT
2
min)2(
_
=<⋅=
−
VV
RR
IRRVR
V
OL
PDPU
roffLPDPUPUPD
ONupPull
OUT
4
max
)2(
_
=>
+
⋅⋅−⋅
=
−
Application information VN5E050ASO-E
28/37 Doc ID 022449 Rev 5
3.5 Maximum demagnetization energy (V
CC
= 13.5V)
Figure 34. Maximum turn-Off current versus inductance
Note: Values are generated with R
L
=0 Ω. In case of repetitive pulses, T
jstart
(at the beginning of
each demagnetization) of every pulse must not exceed the temperature specified above for
curves A and B.
C: T
jstart
= 125°C repe titi ve pulse
A: T
jstart
= 150 °C singl e puls e
B: T
jstart
= 100°C repetit ive puls e
Demagnetization Demagnetization Demagnetization
t
V
IN
, I
L
1
10
100
0,1 1 10 100L (mH)
I (A)
AB
C
VN5E050ASO-E Package and PCB thermal data
Doc ID 022449 Rev 5 29/37
4 Package and PCB thermal data
4.1 SO-16L thermal data
Figure 35. SO-16L PC board
Note: Layout condition of R
th
and Z
th
measurements (PCB: Double layer, Thermal Vias,
FR4 area = 77 mm x 86 mm, PCB thickness = 1.6 mm, Cu thickness = 70 µm (front and
back side), Copper areas: from minimum pad lay-out to 8 cm
2
).
Figure 36. R
thj-amb
vs PCB copper area in open box free air condition
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Package and PCB thermal data VN5E050ASO-E
30/37 Doc ID 022449 Rev 5
Figure 37. SO-16L thermal impedance junction ambient single pulse
Equation 1: pulse calculation formula
where δ=t
P
/T
Figure 38. Thermal fitting model of a single channel HSD in SO-16L
(a)
a. The fitting model is a simplified thermal tool and is valid for transient evolutions where the embedded
protections (power limitation or thermal cycling during thermal shutdown) are not triggered.
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VN5E050ASO-E Package and PCB thermal data
Doc ID 022449 Rev 5 31/37
Table 15. Thermal parameter
Area/island (cm
2
)Footprint28
R1 (°C/W) 0.7
R2 (°C/W) 2.3
R3 (°C/W) 4
R4 (°C/W) 8 6 6
R5 (°C/W) 14 13 13
R6 (°C/W) 28 20 14.5
C1 (W.s/°C) 0.001
C2 (W.s/°C) 0.01
C3 (W.s/°C) 0.1
C4 (W.s/°C) 0.5
C5 (W.s/°C) 1 1.5 1.5
C6 (W.s/°C) 3 9 12
Package information VN5E050ASO-E
32/37 Doc ID 022449 Rev 5
5 Package information
5.1 ECOPACK
®
packages
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK
®
is an ST trademark.
5.2 Package mechanical data
Figure 39. SO-16L package dimensions
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VN5E050ASO-E Package information
Doc ID 022449 Rev 5 33/37
Table 16. SO-16L mechanical data
Symbol Millimeters
Min Typ Max
A 2.35 2.65
A1 0.10 0.30
B 0.33 0.51
C 0.23 0.32
D 10.10 10.50
E 7.40 7.60
e1.27
H 10.00 10.65
h 0.25 0.75
L 0.40 1.27
k0° 8°
ddd 0.10
Package information VN5E050ASO-E
34/37 Doc ID 022449 Rev 5
5.3 Packing information
Figure 40. SO-16L tube shipment (no suffix)
Figure 41. SO-16L tape and reel shipment (suffix “TR”)
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VN5E050ASO-E Order codes
Doc ID 022449 Rev 5 35/37
6 Order codes
Table 17. Device summary
Package Order codes
Tube Tape and reel
SO-16L VN5E050ASO-E VN5E050ASOTR-E
Revision history VN5E050ASO-E
36/37 Doc ID 022449 Rev 5
7 Revision history
Table 18. Document revision history
Date Revision Changes
14-Dec-2011 1 Initial release
16-Mar-2012 2 Added
Section 4 : Package and PCB thermal data
and update
Table 5
.
25-June-2012 3 Update
Table 4
.
18-Sep-2012 4 Update
Table 4
.
18-Sep-20 13 5 Updated disclai mer.
VN5E050ASO-E
Doc ID 022449 Rev 5 37/37
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