1. General description
The 74LVC162244A; 74LVCH162244A are 16-bit non-inverting buffer/line drivers with
3-state bus compatible outputs. The device can be used as four 4-bit buffers, two 8-bit
buffers or one 16-bit buffer. It features four output enable inputs, (1OE to 4OE) each
controlling four of the 3-state outputs. A HIGH on nOE causes the outputs to assume a
high-impedance OFF- st ate. The device is designed with 30 series termination resistors
in both HIGH and LOW output stages to reduce line noise.
Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be
applied to the outputs. These features allow the use of these devices in mixed
3.3 Vand 5 V applications.
The 74LVCH162244A bus hold on data inputs eliminates the need for external pull-up
resistors to hold unused inputs.
2. Features and benefits
5 V tolerant inputs/outputs for interfacing with 5 V logic
Wide supply voltage range from 1.2 V to 3.6 V
CMOS low power consumption
Multibyte flow-through standard pin-out architecture
Low inductance multiple power and ground pins for minimum noise an d ground
bounce
Direct interface with TTL levels
High-impedance when VCC =0V
All data inputs have bus hold. (74LVCH162244A only)
Complies with JEDEC standard:
JESD8-7A (1.65 V to 1.95 V)
JESD8-5A (2.3 V to 2.7 V)
JESD8-C/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-B exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Specified from 40 Cto+85C and 40 Cto+125C
74LVC162244A; 74LVCH162244A
16-bit buffer/line driver; 30 series termination resistors; 5 V
tolerant input/output; 3-state
Rev. 6 — 16 December 2011 Product data sheet
74LVC_LVCH162244A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 6 — 16 December 2011 2 of 15
NXP Semiconductors 74LVC162244A; 74LVCH162244A
16-bit buffer/line driver; 30 resistors; 5 V tolerance; 3-state
3. Ordering information
4. Functional diagram
Tabl e 1. Ordering information
Type number Temperature range Package
Name Description Version
74LVC162244ADL 40 C to +125 C SSOP48 plastic shrink small outline package; 48 leads;
body width 7.5 mm SOT370-1
74LVCH162244ADL
74LVC162244ADGG 40 Cto+125C TSSOP48 plastic thin shrink small outline package;
48 leads; body width 6.1 mm SOT362-1
74LVCH162244ADGG
Fig 1. Logic symbol Fig 2. IEC logic symbol
001aae506
47
46
44
43
2
3
5
6
1A0
1A1
1A2
1A3
1Y0
1Y1
1Y2
1Y3
11OE
36
35
33
32
13
14
16
17
3A0
3A1
3A2
3A3
3Y0
3Y1
3Y2
3Y3
25 3OE
30
29
27
26
19
20
22
23
4A0
4A1
4A2
4A3
4Y0
4Y1
4Y2
4Y3
24 4OE
41
40
38
37
8
9
11
12
2A0
2A1
2A2
2A3
2Y0
2Y1
2Y2
2Y3
48 2OE
11
1
1
1
3
2
4
001aae231
33
32
30
29
27
26
16
17
19
20
22
23
47
46
44
43
41
40
38
37
36
35
2
3
5
6
8
9
11
12
13
14
24
25
1A0
1A1
1A2
1A3
2A0
2A1
2A2
2A3
3A0
3A1
3A2
3A3
4A0
4A1
4A2
4A3
1Y0
1Y1
1Y2
1Y3
2Y0
2Y1
2Y2
2Y3
3Y0
3Y1
3Y2
3Y3
4Y0
4Y1
4Y2
4Y3
48
1
4OE
1OE
2OE
3OE
EN1
EN2
EN3
EN4
Fig 3. Bus hold circuit
to internal circuit
mna705
VCC
data input
74LVC_LVCH162244A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 6 — 16 December 2011 3 of 15
NXP Semiconductors 74LVC162244A; 74LVCH162244A
16-bit buffer/line driver; 30 resistors; 5 V tolerance; 3-state
5. Pinning information
5.1 Pinning
5.2 Pin description
Fig 4. Pin configuration SOT370-1 (SSOP48) and SOT362-1 (TSSOP48)
162244A
001aaa252
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1Y0
1Y1
GND
1A0
1A1
GND
1OE 2OE
1Y2
1Y3
V
CC
2Y0
2Y1
GND
2Y2
2Y3
3Y0
3Y1
GND
3Y2
3Y3
V
CC
4Y0
4Y1
GND
4Y2
4Y3
4OE
1A2
1A3
V
CC
2A0
2A1
GND
2A2
2A3
3A0
3A1
GND
3A2
3A3
V
CC
4A0
4A1
GND
4A2
4A3
3OE
Table 2. Pin description
Symbol Pin Description
1OE 1 output enable input (active LOW)
2OE 48 output enable input (active LOW)
3OE 25 output enable input (active LOW)
4OE 24 output enable input (active LOW)
GND 4, 10, 15, 21, 28, 34, 39, 45 ground (0 V)
VCC 7, 18, 31, 42 supply voltage
1A[0:3] 47, 46, 44, 43 data input
2A[0:3] 41, 40, 38, 37 data input
3A[0:3] 36, 35, 33, 32 data input
4A[0:3] 30, 29, 27, 26 data input
1Y[0:3] 2, 3, 5, 6 data output
74LVC_LVCH162244A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 6 — 16 December 2011 4 of 15
NXP Semiconductors 74LVC162244A; 74LVCH162244A
16-bit buffer/line driver; 30 resistors; 5 V tolerance; 3-state
6. Functional description
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
7. Limiting values
[1] The minimum input voltage ratings may be exceeded if the input current ratings are observed.
[2] The output voltage ratings may be exceeded if the output current ratings are observed.
[3] Above 60 C the value of Ptot derates linearly with 5.5 mW/K.
2Y[0:3] 8, 9, 11, 12 data output
3Y[0:3] 13, 14, 16, 17 data output
4Y[0:3] 19, 20, 22, 23 dataoutput
Table 2. Pin description …continued
Symbol Pin Description
Table 3. Function table[1]
Control Input Output
nOE nAn nYn
LLL
LHH
HXZ
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
VCC supply voltage 0.5 +6.5 V
IIK input clam pi n g cu rre nt VI<0V 50 - mA
VIinput voltage [1] 0.5 +6.5 V
IOK output clamping current VO>V
CC or VO<0V - 50 mA
VOoutput voltage output HIGH or LOW [2] 0.5 VCC +0.5 V
output 3-state [2] 0.5 +6.5 V
IOoutput current VO=0V to V
CC -50 mA
ICC supply current - 100 mA
IGND ground current 100 - mA
Tstg storage temperature 65 +150 C
Ptot total power dissipation Tamb =40 C to +125 C; [3] -500mW
74LVC_LVCH162244A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 6 — 16 December 2011 5 of 15
NXP Semiconductors 74LVC162244A; 74LVCH162244A
16-bit buffer/line driver; 30 resistors; 5 V tolerance; 3-state
8. Recommended operating conditions
9. Static characteristics
Table 5. Recommended operating conditions
Symbol Parameter Conditions Min Typ Max Unit
VCC supply voltage 1.65 - 3.6 V
functional 1.2 - 3.6 V
VIinput voltage 0 - 5.5 V
VOoutput voltage output HIGH or LOW 0 - VCC V
output 3-state 0 - 5.5 V
Tamb ambient temperature in free air 40 - +125 C
t/V input transition rise and fall rate VCC = 1.65 V to 2.7 V 0 - 20 ns/V
VCC = 2.7 V to 3.6 V 0 - 10 ns/V
Table 6. Static characteristics
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 40 C to +85 C40 C to +125 CUnit
Min Typ[1] Max Min Max
VIH HIGH-level
input voltage VCC = 1.2 V 1.08 - - 1.08 - V
VCC = 1.65 V to 1.95 V 0.65 VCC - - 0.65 VCC -V
VCC = 2.3 V to 2.7 V 1.7 - - 1.7 - V
VCC = 2.7 V to 3.6 V 2.0 - - 2.0 - V
VIL LOW-level
input voltage VCC = 1.2 V - - 0.12 - 0.12 V
VCC = 1.65 V to 1.95 V - - 0.35 VCC -0.35 VCC V
VCC = 2.3 V to 2.7 V - - 0.7 - 0.7 V
VCC = 2.7 V to 3.6 V - - 0.8 - 0.8 V
VOH HIGH-level
output
voltage
VI=V
IH or VIL
IO=100 A;
VCC =1.65Vto3.6V VCC 0.2 - - VCC 0.3 - V
IO=2 mA; VCC = 1.65 V 1.2 - - 1.05 - V
IO=4mA; V
CC = 2.3 V 1.7 - - 1.55 - V
IO=6mA; V
CC = 2.7 V 2.2 - - 2.05 - V
IO=12 mA; VCC = 3.0 V 2.2 - - 2.0 - V
VOL LOW-level
output
voltage
VI=V
IH or VIL
IO= 100 A;
VCC = 1.65 V to 3.6 V - -0.2- 0.3V
IO=2mA; V
CC = 1.65 V - - 0.45 - 0.65 V
IO=4mA; V
CC = 2.3 V - - 0.6 - 0.8 V
IO=6mA; V
CC = 2.7 V - - 0.4 - 0.6 V
IO=12mA; V
CC = 3.0 V - - 0.55 - 0.8 V
IIinput
leakage
current
VCC = 3.6 V;
VI=5.5VorGND -0.1 5- 20 A
74LVC_LVCH162244A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 6 — 16 December 2011 6 of 15
NXP Semiconductors 74LVC162244A; 74LVCH162244A
16-bit buffer/line driver; 30 resistors; 5 V tolerance; 3-state
[1] All typical values are measured at VCC = 3.3 V and Tamb =25C.
[2] The bus hold circuit is switched off when VI>V
CC allowing 5.5 V on the input terminal.
[3] Valid for data inputs only. Control inputs do not have a bus hold circuit.
[4] The specified sustaining current at the data input holds the input below the specified VI level.
[5] The specified overdrive current at the data input forces the data input to the opposite logic input state.
IOZ OFF-state
output
current
VI=V
IH or VIL; VCC = 3.6 V;
VO=5.5VorGND; [2] -0.1 5- 20 A
IOFF power-off
leakage
current
VCC = 0 V; VIor VO= 5.5 V - 0.1 10 - 20 A
ICC supply
current VCC = 3.6 V;
VI=V
CC or GND; IO=0A -0.120-80A
ICC additional
supply
current
per input pin;
VCC = 2.7 V to 3.6 V;
VI=V
CC 0.6 V; IO=0A
- 5 500 - 5000 A
CIinput
capacitance VCC = 0 V to 3.6 V;
VI=GNDtoV
CC
-5.0---pF
IBHL bus hold
LOW current VCC = 1.65; VI = 0.58 V [3][4] 10 - - 10 - A
VCC = 2.3; VI = 0.7 V 30 - - 25 - A
VCC = 3.0; VI = 0.8 V 75 - - 60 - A
IBHH bus hold
HIGH current VCC = 1.65; VI = 1.07 V [3][4] 10 - - 10 - A
VCC = 2.3; VI = 1.7 V 30 - - 25 - A
VCC = 3.0; VI = 2.0 V 75 - - 60 - A
IBHLO bus hold
LOW
overdrive
current
VCC = 1.95 V [3][5] 200 - - 200 - A
VCC = 2.7 V 300 - - 300 - A
VCC = 3.6 V 500 - - 500 - A
IBHHO bus hold
HIGH
overdrive
current
VCC = 1.95 V [3][5] 200 - - 200 - A
VCC = 2.7 V 300 - - 300 - A
VCC = 3.6 V 500 - - 500 - A
Table 6. Static characteristics …continued
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 40 C to +85 C40 C to +125 CUnit
Min Typ[1] Max Min Max
74LVC_LVCH162244A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 6 — 16 December 2011 7 of 15
NXP Semiconductors 74LVC162244A; 74LVCH162244A
16-bit buffer/line driver; 30 resistors; 5 V tolerance; 3-state
10. Dynamic characteristics
[1] tpd is the same as tPLH and tPHL.
ten is the same as tPZL and tPZH.
tdis is the same as tPLZ and tPHZ.
[2] Typical values are measured at Tamb =25C and VCC = 1.2 V, 1.8 V, 2 .5 V, 2.7 V and 3.3 V respectively.
[3] CPD is used to determine the dynamic power dissipation (PDin W).
PD=C
PD VCC2fiN+(CLVCC2fo) where:
fi= input frequency in MHz; fo= output frequency in MHz
CL= output load capacitance in pF
VCC = supply voltage in Volts
N = number of inputs switching
(CLVCC2fo) = sum of the outputs.
Table 7. Dynamic characteristics
Vo ltages are referenced to GND (ground = 0 V). For test circuit see Figure 7.
Symbol Parameter Conditions 40 C to +85 C40 C to +125 CUnit
Min Typ[2] Max Min Max
tpd propagation
delay nAntonYn; see Figure 5 [1]
VCC = 1.2 V - 11.0 - - - ns
VCC = 1.65 V to 1.95 V 1.5 6.0 15.0 1.5 17.2 ns
VCC = 2.3 V to 2.7 V 1.0 3.2 7.4 1.0 8.2 ns
VCC = 2.7 V 1.0 3.3 6.7 1.0 8.5 ns
VCC = 3.0 V to 3.6 V 1.0 2.7 5.8 1.0 7.5 ns
ten enable time nOE to nYn; see Figure 6 [1]
VCC = 1.2 V - 15.0 - - - ns
VCC = 1.65 V to 1.95 V 1.7 6.8 15.3 1.7 17.7 ns
VCC = 2.3 V to 2.7 V 1.5 3.8 8.0 1.5 8.9 ns
VCC = 2.7 V 1.5 4.2 7.6 1.5 9.5 ns
VCC = 3.0 V to 3.6 V 1.0 3.1 6.0 1.0 7.5 ns
tdis disable time nOE to nYn ; see Figure 6 [1]
VCC = 1.2 V - 10.0 - - - ns
VCC = 1.65 V to 1.95 V 2.2 3.9 8.2 2.2 9.5 ns
VCC = 2.3 V to 2.7 V 0.5 2.1 4.4 0.5 5.0 ns
VCC = 2.7 V 1.5 3.1 4.7 1.5 6.0 ns
VCC = 3.0 V to 3.6 V 1.5 2.8 4.5 1.5 6.0 ns
CPD power
dissipation
capacitance
per input; VI=GNDtoV
CC [3]
VCC = 1.65 V to 1.95 V - 4.8 - - - pF
VCC = 2.3 V to 2.7 V - 8.3 - - - pF
VCC = 3.0 V to 3.6 V - 11.4 - - - pF
74LVC_LVCH162244A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 6 — 16 December 2011 8 of 15
NXP Semiconductors 74LVC162244A; 74LVCH162244A
16-bit buffer/line driver; 30 resistors; 5 V tolerance; 3-state
11. Waveforms
Measurement points are given in Table 8.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig 5. The input (nAn) to output (nYn) propagation delays
mna171
nAn input
nYn output
tPLH tPHL
GND
VI
VM
VM
VM
VM
VOH
VOL
Measurement points are given in Table 8.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig 6. 3-state enable and disabl e tim e s.
mna362
tPLZ
tPHZ
outputs
disabled outputs
enabled
VY
VX
outputs
enabled
output
LOW-to-OFF
OFF-to-LOW
output
HIGH-to-OFF
OFF-to-HIGH
nOE input
VI
VOL
VOH
VCC
VM
GND
GND
tPZL
tPZH
VM
VM
Table 8. Measurement points
Supply voltage VMInput Output
VCC VItr=t
fVXVY
1.2 V 0.5 VCC VCC 2.5 ns VOL + 0.15 V VOH 0.15 V
1.65 V to 1.95 V 0.5 VCC VCC 2.5 ns VOL + 0.15 V VOH 0.15 V
2.3 V to 2.7 V 0.5 VCC VCC 2.5 ns VOL + 0.15 V VOH 0.15 V
2.7V 1.5V 2.7V 2.5 ns VOL + 0.3 V VOH 0.3 V
3.0V to 3.6V 1.5V 2.7V 2.5 ns VOL + 0.3 V VOH 0.3 V
74LVC_LVCH162244A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 6 — 16 December 2011 9 of 15
NXP Semiconductors 74LVC162244A; 74LVCH162244A
16-bit buffer/line driver; 30 resistors; 5 V tolerance; 3-state
Test data is given in Table 9.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Fig 7. Test circuit for measuring switching times
V
M
V
M
t
W
t
W
10 %
90 %
0 V
V
I
V
I
negative
pulse
positive
pulse
0 V
V
M
V
M
90 %
10 %
t
f
t
r
t
r
t
f
001aae331
V
EXT
V
CC
V
I
V
O
DUT
CL
RT
RL
RL
G
Table 9. Test data
Supply voltage Input Load VEXT
VItr, tfCLRLtPLH, tPHL tPLZ, tPZL tPHZ, tPZH
1.2 V VCC 2 ns 30 pF 1 kopen 2 VCC GND
1.65 V to 1.95 V VCC 2 ns 30 pF 1 kopen 2 VCC GND
2.3 V to 2.7 V VCC 2 ns 30 pF 500 open 2 VCC GND
2.7V 2.7V 2.5 ns 50 pF 500 open 2 VCC GND
3.0Vto3.6V 2.7V 2.5 ns 50 pF 500 open 2 VCC GND
74LVC_LVCH162244A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 6 — 16 December 2011 10 of 15
NXP Semiconductors 74LVC162244A; 74LVCH162244A
16-bit buffer/line driver; 30 resistors; 5 V tolerance; 3-state
12. Package outline
Fig 8. Package outline SOT370-1 (SSOP48)
UNIT A1A2A3bpcD
(1) E(1) eH
ELL
pQZywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 0.4
0.2 2.35
2.20 0.25 0.3
0.2 0.22
0.13 16.00
15.75 7.6
7.4 0.635 1.4 0.25
10.4
10.1 1.0
0.6 1.2
1.0 0.85
0.40 8
0
o
o
0.18 0.1
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
SOT370-1 99-12-27
03-02-19
(1)
wM
bp
D
HE
E
Z
e
c
vMA
X
A
y
48 25
MO-118
24
1
θ
A
A1
A2
Lp
Q
detail X
L
(A )
3
pin 1 index
0 5 10 mm
scale
SSOP48: plastic shrink small outline package; 48 leads; body width 7.5 mm SOT370-1
A
max.
2.8
74LVC_LVCH162244A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 6 — 16 December 2011 11 of 15
NXP Semiconductors 74LVC162244A; 74LVCH162244A
16-bit buffer/line driver; 30 resistors; 5 V tolerance; 3-state
Fig 9. Package outline SOT362-1 (TSSOP48)
UNIT A1A2A3bpcD
(1) E(2) eH
ELL
pQZywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 0.15
0.05 0.2
0.1 8
0
o
o
0.1
DIMENSIONS (mm are the original dimensions).
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
SOT362-1 99-12-27
03-02-19
wM
θ
A
A1
A2
D
Lp
Q
detail X
E
Z
e
c
L
X
(A )
3
0.25
124
48 25
y
pin 1 index
b
H
1.05
0.85 0.28
0.17 0.2
0.1 12.6
12.4 6.2
6.0 0.5 1 0.25
8.3
7.9 0.50
0.35 0.8
0.4
0.08
0.8
0.4
p
EvMA
A
TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1 mm SOT362-1
A
max.
1.2
0
2.5
5 mm
scale
MO-153
74LVC_LVCH162244A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 6 — 16 December 2011 12 of 15
NXP Semiconductors 74LVC162244A; 74LVCH162244A
16-bit buffer/line driver; 30 resistors; 5 V tolerance; 3-state
13. Abbreviations
14. Revision history
Table 10. Abbreviations
Acronym Description
CDM Charged Device Mo del
CMOS Complementary Metal Oxide Semiconductor
DUT Device Under Test
ESD ElectroStatic Discharge
HBM Human Body Model
MM Machine Model
TTL Transistor-Trans istor Logic
Table 11. Revision history
Document ID Release date Data sheet status Change
notice Supersedes
74LVC_LVCH162244A v.6 20111216 Product data sheet - 74LVC_LVCH162244A v.5
Modifications: •Maximum propagation delay value for VCC = 1.65 V to 1.95 V at +125 C changed
from 15.7 ns to 17.2 ns
•Maximum enable time value for VCC = 1.65 V to 1.95 V at +125 C changed from
16.1 ns to 17.7 ns
•Maximum disable time value for VCC = 1.65 V to 1.95 V at +125 C changed fro m
8.7 ns to 9.5 ns
74LVC_LVCH162244A v.5 20111108 Product data sheet - 74LVC_LVCH1622 44A v.4
Modifications: •The format of this document has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
•Legal texts have been adapted to the new company name where appropriate.
•Table 5, Table 6, Table 7 and Table 9: values added for lower voltage ranges.
74LVC_ LVCH162244A v.4 20031212 Product specificati on - 74LVC_H162244A v. 3
74LVC_ H162244A v.3 19980217 Product specification - 74LVC162244A_LVCH162244A v.3
74LVC162244A_LVCH162244A v.3 19980217 Product specification - 74LVC162244A v.2
74LVC1 62244A v.2 19970801 Product specification - 74LVC162244A v.1
74LVC_LVCH162244A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 6 — 16 December 2011 13 of 15
NXP Semiconductors 74LVC162244A; 74LVCH162244A
16-bit buffer/line driver; 30 resistors; 5 V tolerance; 3-state
15. Legal information
15.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device (s) descr ibed in th is document m ay have cha nged since this docume nt was publis hed and ma y dif fer in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
15.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liab ility for the consequences of
use of such information.
Short data sheet — A short dat a sheet is an extract from a full data sheet
with the same product type number(s) and tit le. A short data sh eet is intended
for quick reference only and shou ld not be rel ied u pon to cont ain det ailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall pre vail.
Product specificatio n — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to off er functions and qualities beyond those described in the
Product data sheet.
15.3 Disclaimers
Limited warr a nty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors doe s not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information.
In no event shall NXP Semiconductors be liable for any indirect , incidental,
punitive, special or consequ ential damages (including - wit hout limitatio n - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconduct ors’ aggregate and cumulati ve liability toward s
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descripti ons, at any time and without
notice. This document supersedes and replaces all informa tion supplied prior
to the publication hereof .
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suit able for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in perso nal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liab ility for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for il lustrative purposes only. NXP Semiconductors makes no
representation or warranty tha t such application s will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and ope ration of their applications
and products using NXP Semiconductors product s, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suit able and fit for the custome r’s applications and
products planned, as well as fo r the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associate d with t heir
applications and products.
NXP Semiconductors does not accept any liabil ity related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for th e customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by cu stomer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress rating s only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanent ly and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individua l agreement. In case an individual
agreement is concluded only the ter ms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
No offer to sell or license — Not hing in this document may be interpret ed or
construed as an of fer t o sell product s that is open for accept ance or t he grant,
conveyance or implication of any license under any copyri ghts, patents or
other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulatio ns. Export might require a prior
authorization from competent authorities.
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contain s data from the objective specification for product development.
Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specificat ion.
Product [short] dat a sheet Production This document contains the product specification.
74LVC_LVCH162244A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 6 — 16 December 2011 14 of 15
NXP Semiconductors 74LVC162244A; 74LVCH162244A
16-bit buffer/line driver; 30 resistors; 5 V tolerance; 3-state
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors prod uct is automotive qualified,
the product is not suitable for automotive use. It i s neit her qua lified nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automot ive specifications and standard s, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications, and (b)
whenever cust omer uses the product for automotive applications beyond
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from custome r design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
15.4 Trademarks
Notice: All refe renced brands, produc t names, service names and trademarks
are the property of their respect i ve ow ners.
16. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
NXP Semiconductors 74LVC162244A; 74LVCH162244A
16-bit buffer/line driver; 30 resistors; 5 V tolerance; 3-state
© NXP B.V. 2011. All rights reserved.
For more information, please visit: http://www.nxp.co m
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 16 December 2011
Document identifier: 74LVC_LVCH162244A
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
17. Contents
1 General description. . . . . . . . . . . . . . . . . . . . . . 1
2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
4 Functional di agram . . . . . . . . . . . . . . . . . . . . . . 2
5 Pinning information. . . . . . . . . . . . . . . . . . . . . . 3
5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
6 Functional de scription . . . . . . . . . . . . . . . . . . . 4
7 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4
8 Recommended operating conditions. . . . . . . . 5
9 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5
10 Dynamic characteristics . . . . . . . . . . . . . . . . . . 7
11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10
13 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 12
14 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 12
15 Legal information. . . . . . . . . . . . . . . . . . . . . . . 13
15.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13
15.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
15.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 13
15.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 14
16 Contact information. . . . . . . . . . . . . . . . . . . . . 14
17 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
