S-8242B Series
www.ablicinc.com
BATTERY PROTECTION IC
FOR 2-SERIAL-CELL PACK
© ABLIC Inc., 2006-2013 Rev.2.3_02
1
The S-8242B Series are protection ICs for 2-serial-cell lithium-ion/lithium polymer rechargeable batteries and include high-
accuracy voltage detectors and delay circuits.
These ICs are suitable for protecting 2-cell lithium-ion / lithium polymer rechargeable battery packs from overcharge,
overdischarge, and overcurrent.
Features
(1) High-accuracy voltage detection for each cell
Overcharge detection voltage n (n 1, 2) 3.9 V to 4.5 V (50 mV steps) Accuracy 25 mV
Overcharge release voltage n (n 1, 2) 3.8 V to 4.5 V*1 Accuracy 50 mV
Overdischarge detection voltage n (n 1, 2) 2.0 V to 3.0 V (100 mV steps) Accuracy 50 mV
Overdischarge release voltage n (n 1, 2) 2.0 V to 3.4 V*2 Accuracy 100 mV
(2) Two-level overcurrent detection (overcurrent 1, overcurrent 2)
Overcurrent detection voltage 1 0.05 V, 0.08 V to 0.30 V (10 mV steps) Accuracy 15 mV
Overcurrent detection voltage 2 1.2 V (fixed) Accuracy 300 mV
(3) Delay times (overcharge, overdischarge, overcurrent) are generated by an internal circuit (external capacitors are
unnecessary).
(4) 0 V battery charge function available/unavailable are selectable.
(5) Charger detection function
The overdischarge hysteresis is released by detecting negative voltage at the VM pin (0.7 V typ.) (Charger
detection function).
(6) High-withstand voltage devices Absolute maximum rating: 28 V
(7) Wide operating temperature range 40°C to 85C
(8) Low current consumption
Operation mode 10 A max. (25C)
Power-down mode 0.1 A max. (25C)
(9) Lead-free, Sn 100%, halogen-free*3
*1. Overcharge release voltage Overcharge detection voltage Overcharge hysteresis voltage
(Overcharge hysteresis voltage n (n 1, 2) can be selected as 0 V or from a range of 0.1 V to 0.4 V in 50 mV
steps.)
*2. Overdischarge release voltage Overdischarge detection voltage Overdischarge hysteresis voltage
(Overdischarge hysteresis voltage n (n 1, 2) can be selected as 0 V or from a range of 0.1 V to 0.7 V in 100 mV
steps.)
*3. Refer to “ Product Name Structure” for details.
Applications
Lithium-ion rechargeable battery packs
Lithium polymer rechargeable battery packs
Packages
SNT-8A
8-Pin TSSOP
NOT RECOMMENDED FOR NEW DESIGN
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S-8242B Series Rev.2.3_02
2
Block Diagram
CO
VDD
DO
VM
300 k
10 k
Delay circuit, controller,
0 V battery charge/
charge inhibition circuit
VC
VSS
Charger
detector
Remark All the diodes in the figure are parasitic diodes.
Figure 1
NOT RECOMMENDED FOR NEW DESIGN
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
Rev.2.3_02 S-8242B Series
3
Product Name Structure
1. Product Name
Serial code
Sequentially set from AA to ZZ
S
-8242B xx - xxxx x
Environmental code
U : Lead-free (Sn 100%), halogen-free
S : Lead-free, halogen-free
G : Lead-free (for details, please contact our sales office)
Package name (abbreviation) and IC packing specifications
*1
I8T1 : SNT-8A, Tape
T8T1: 8-Pin TSSOP, Tape
*1. Refer to the tape specifications.
2. Package
Package Name Drawing Code
Package Tape Reel Land
SNT-8A PH008-A-P-SD PH008-A-C-SD PH008-A-R-SD PH008-A-L-SD
8-Pin TSSOP Environmental code = G, S FT008-A-P-SD FT008-E-C-SD FT008-E-R-SD
Environmental code = U FT008-A-P-SD FT008-E-C-SD FT008-E-R-S1
NOT RECOMMENDED FOR NEW DESIGN
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S-8242B Series Rev.2.3_02
4
3. Product Name List
(1) SNT-8A Package
Table 1
Product Name
Overcharge
Detection
Voltage
[VCU]
Overcharge
Release
Voltage
[VCL]
Overdischarge
Detection
Voltage
[VDL]
Overdischarge
Release
Voltage
[VDU]
Overcurrent
Detection
Voltage 1
[VIOV1]
0 V Battery
Charge
S-8242BAB-I8T1x 4.325 V 4.075 V 2.2 V 2.9 V 0.21 V Unavailable
S-8242BAC-I8T1x 4.350 V 4.150 V 2.3 V 3.0 V 0.30 V Available
S-8242BAD-I8T1x 4.350 V 4.350 V 2.3 V 2.9 V 0.08 V Available
S-8242BAE-I8T1x 4.430 V 4.200 V 2.3 V 2.9 V 0.08 V Available
S-8242BAF-I8T1x 4.300 V 4.100 V 2.0 V 2.0 V 0.20 V Available
S-8242BAG-I8T1x 4.300 V 4.100 V 2.0 V 2.0 V 0.16 V Available
S-8242BAH-I8T1x 4.300 V 4.100 V 2.4 V 3.0 V 0.20 V Unavailable
S-8242BAI-I8T1x 4.250 V 4.050 V 2.4 V 3.0 V 0.15 V Available
S-8242BAM-I8T1x 4.300 V 4.100 V 2.6 V 3.0 V 0.28 V Unavailable
S-8242BAN-I8T1x 4.350 V 4.150 V 2.3 V 2.9 V 0.25 V Unavailable
S-8242BAO-I8T1x 4.350 V 4.150 V 2.3 V 2.9 V 0.10 V Available
S-8242BAQ-I8T1x 4.350 V 4.150 V 2.3 V 2.9 V 0.20 V Unavailable
S-8242BAR-I8T1x 4.300 V 4.100 V 2.6 V 3.0 V 0.21 V Unavailable
S-8242BAU-I8T1x 4.300 V 4.100 V 2.4 V 3.0 V 0.28 V Unavailable
S-8242BAV-I8T1x 4.350 V 4.150 V 2.2 V 2.9 V 0.20 V Unavailable
S-8242BAW-I8T1x 4.350 V 4.150 V 2.2 V 2.9 V 0.25 V Unavailable
S-8242BAX-I8T1x 4.300 V 4.100 V 2.4 V 3.0 V 0.21 V Unavailable
S-8242BAY-I8T1x 4.210 V 4.210 V 2.0 V 2.0 V 0.20 V Unavailable
S-8242BAZ-I8T1x 4.190 V 4.190 V 2.3 V 2.9 V 0.10 V Available
S-8242BBA-I8T1x 4.350 V 4.150 V 3.0 V 3.4 V 0.25 V Unavailable
S-8242BBB-I8T1x 4.270 V 4.070 V 2.3 V 2.3 V 0.20 V Available
S-8242BBC-I8T1x 4.250 V 4.050 V 2.4 V 3.0 V 0.10 V Available
S-8242BBD-I8T1x 4.310 V 4.110 V 2.0 V 2.0 V 0.20 V Available
S-8242BBF-I8T1x 4.350 V 4.150 V 2.0 V 2.4 V 0.25 V Unavailable
S-8242BBH-I8T1x 4.400 V 4.200 V 2.0 V 2.7 V 0.25 V Available
S-8242BBI-I8T1x 4.300 V 4.150 V 3.175 V 3.275 V 0.15 V Unavailable
S-8242BBJ-I8T1x 4.275 V 4.275 V 2.4 V 2.6 V 0.10 V Unavailable
S-8242BBK-I8T1x 4.250 V 4.050 V 2.8 V 3.0 V 0.12 V Unavailable
S-8242BBQ-I8T1x 4.150 V 4.050 V 2.35 V 2.65 V 0.10 V Available
S-8242BBR-I8T1x 4.275 V 3.925 V 2.8 V 3.3 V 0.05 V Unavailable
S-8242BBW-I8T1x 4.250 V 4.050 V 2.4 V 3.0 V 0.15 V Unavailable
S-8242BBZ-I8T1U 4.200 V 4.100 V 2.7 V 3.0 V 0.10 V Available
Remark 1. Please contact our sales office for the products with detection voltage value other than those specified above.
2. x: G or U
3. Please select products of environmental code = U for Sn 100%, halogen-free products.
NOT RECOMMENDED FOR NEW DESIGN
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
Rev.2.3_02 S-8242B Series
5
(2) 8-Pin TSSOP Package
Table 2
Product Name
Overcharge
Detection
Voltage
[VCU]
Overcharge
Release
Voltage
[VCL]
Overdischarge
Detection
Voltage
[VDL]
Overdischarge
Release
Voltage
[VDU]
Overcurrent
Detection
Voltage 1
[VIOV1]
0 V Battery
Charge
S-8242BAC-T8T1x 4.350 V 4.150 V 2.3 V 3.0 V 0.30 V Available
S-8242BAD-T8T1U 4.350 V 4.350 V 2.3 V 2.9 V 0.08 V Available
S-8242BAH-T8T1x 4.300 V 4.100 V 2.4 V 3.0 V 0.20 V Unavailable
S-8242BAI-T8T1x 4.250 V 4.050 V 2.4 V 3.0 V 0.15 V Available
S-8242BAP-T8T1x 4.100 V 3.800 V 2.2 V 2.4 V 0.30 V Unavailable
S-8242BAR-T8T1x 4.300 V 4.100 V 2.6 V 3.0 V 0.21 V Unavailable
S-8242BAU-T8T1x 4.300 V 4.100 V 2.4 V 3.0 V 0.28 V Unavailable
S-8242BAV-T8T1x 4.350 V 4.150 V 2.2 V 2.9 V 0.20 V Unavailable
S-8242BAW-T8T1x 4.350 V 4.150 V 2.2 V 2.9 V 0.25 V Unavailable
S-8242BAX-T8T1x 4.300 V 4.100 V 2.4 V 3.0 V 0.21 V Unavailable
S-8242BBD-T8T1U 4.310 V 4.110 V 2.0 V 2.0 V 0.20 V Available
S-8242BBE-T8T1x 4.350 V 4.150 V 2.0 V 2.4 V 0.20 V Unavailable
S-8242BBF-T8T1x 4.350 V 4.150 V 2.0 V 2.4 V 0.25 V Unavailable
S-8242BBG-T8T1x 4.200 V 4.000 V 2.6 V 3.0 V 0.10 V Available
S-8242BBL-T8T1y 4.200 V 4.000 V 2.0 V 2.7 V 0.37 V Unavailable
S-8242BBM-T8T1x 4.150 V 4.050 V 2.5 V 3.0 V 0.20 V Unavailable
S-8242BBO-T8T1y 4.300 V 4.100 V 2.2 V 2.9 V 0.08 V Unavailable
S-8242BBP-T8T1y 4.300 V 4.100 V 2.2 V 2.9 V 0.10 V Unavailable
S-8242BBS-T8T1y 4.300 V 4.100 V 2.4 V 3.0 V 0.18 V Unavailable
S-8242BBU-T8T1y 4.200 V 4.000 V 2.6 V 3.0 V 0.30 V Unavailable
S-8242BBV-T8T1y 4.250 V 4.050 V 2.2 V 2.6 V 0.30 V Unavailable
S-8242BBX-T8T1y 4.250 V 4.150 V 2.5 V 3.0 V 0.10 V Available
S-8242BCA-T8T1U 4.150 V 3.950 V 2.2 V 2.6 V 0.30 V Unavailable
S-8242BCB-T8T1U 4.250 V 4.100 V 3.0 V 3.0 V 0.20 V Available
S-8242BCC-T8T1U 4.400 V 4.100 V 2.4 V 3.0 V 0.28 V Unavailable
S-8242BCD-T8T1U 4.450 V 4.150 V 2.0 V 2.4 V 0.25 V Unavailable
S-8242BCE-T8T1U 4.450 V 4.250 V 2.3 V 2.7 V 0.28 V Unavailable
S-8242BCF-T8T1U 4.500 V 4.300 V 2.2 V 2.4 V 0.25 V Unavailable
S-8242BCG-T8T1U 4.450 V 4.350 V 2.3 V 2.7 V 0.28 V Unavailable
S-8242BCH-T8T1U 4.500 V 4.400 V 2.2 V 2.4 V 0.25 V Unavailable
Remark 1. Please contact our sales office for the products with detection voltage value other than those specified above.
2. x: G or U
3. y: S or U
4. Please select products of environmental code = U for Sn 100%, halogen-free products.
NOT RECOMMENDED FOR NEW DESIGN
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S-8242B Series Rev.2.3_02
6
Pin Configurations
1
2
3
4
SNT-8A
Top view
8
7
6
5
Figure 2
Table 3
Pin No. Symbol Description
1 CO
Connection of charge control FET gate
(CMOS output)
2 DO
Connection of discharge control FET gate
(CMOS output)
3 NC*1 No connection
4 VSS
Connection for negative power supply input
and negative voltage of battery 2
5 VC
Connection for negative voltage of battery 1
and positive voltage of battery 2
6 VDD
Connection for positive power supply input
and positive voltage of battery 1
7 NC*1 No connection
8 VM
Voltage detection between VM and VSS
(overcurrent/charger detection pin)
*1. The NC pin is electrically open.
The NC pin can be connected to VDD or VSS.
Remark For the external views, refer to the package drawings.
8-Pin TSSOP
Top view
1
2
3
4
8
7
6
5
Figure 3
Table 4
Pin No. Symbol Description
1 CO
Connection of charge control FET gate
(CMOS output)
2 DO
Connection of discharge control FET gate
(CMOS output)
3 NC*1 No connection
4 VSS
Connection for negative power supply input
and negative voltage of battery 2
5 VC
Connection for negative voltage of battery 1
and positive voltage of battery 2
6 VDD
Connection for positive power supply input
and positive voltage of battery 1
7 NC*1 No connection
8 VM
Voltage detection between VM and VSS
(overcurrent/charger detection pin)
*1. The NC pin is electrically open.
The NC pin can be connected to VDD or VSS.
Remark For the external views, refer to the package drawings.
NOT RECOMMENDED FOR NEW DESIGN
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
Rev.2.3_02 S-8242B Series
7
Absolute Maximum Ratings
Table 5
(Ta 25C unless otherwise specified)
Item Symbol Applied pin Absolute Maximum Ratings Unit
Input voltage between VDD and VSS VDS VDD
VSS0.3 to VSS12 V
VC input pin voltage VVC VC
VSS0.3 to VDD0.3 V
VM pin input voltage VVM VM VDD28 to VDD0.3 V
DO pin output voltage VDO DO VSS0.3 to VDD0.3 V
CO pin output voltage VCO CO VVM0.3 to VDD0.3 V
Power dissipation SNT-8A PD 450*1 mW
8-Pin TSSOP 700*1 mW
Operating ambient temperature Topr 40 to 85 °C
Storage temperature Tstg 55 to 125 °C
*1. When mounted on board
[Mounted board]
(1) Board size: 114.3 mm × 76.2 mm × t1.6 mm
(2) Board name: JEDEC STANDARD51-7
Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical
damage. These values must therefore not be exceeded under any conditions.
050 100 150
800
400
0
Power Dissi
p
ation
(
P
D
)
[
mW
]
Ambient Temperature (Ta) [C]
8-Pin TSSOP
200
600
SNT-8
A
Figure 4 Power Dissipation of Package (When mounted on board)
NOT RECOMMENDED FOR NEW DESIGN
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S-8242B Series Rev.2.3_02
8
Electrical Characteristics
Table 6
(Ta
25
C unless otherwise specified)
Item Symbol Condition Min. Typ. Max. Unit
Test
condition
Test
circuit
[DETECTION VOLTAGE]
Overcharge detection voltage n V
CUn
3.90 V to 4.50 V, Adjustable
V
CUn
–0.025 V
CUn
V
CUn
+0.025 V 1 1
Overcharge release voltage n V
CLn
3.80 V to 4.50 V, Adjustable
V
CLn
–0.05 V
CLn
V
CLn
+0.05 V 1 1
Overdischarge detection voltage n V
DLn
2.0 V to 3.0 V, Adjustable
V
DLn
–0.05 V
DLn
V
DLn
+0.05 V 2 2
Overdischarge release voltage n V
DUn
2.0 V to 3.40 V, Adjustable
V
DUn
–0.10 V
DUn
V
DUn
+0.10 V 2 2
Overcurrent detection voltage 1 V
IOV1
0.05 V to 0.30 V, Adjustable
V
IOV1
–0.015 V
IOV1
V
IOV1
+0.015 V 3 2
Overcurrent detection voltage 2 V
IOV2
0.9 1.2 1.5 V 3 2
Charger detection voltage V
CHA
–1.0 –0.7 –0.4 V 4 2
Temperature coefficient 1
*1
T
COE1
Ta = 0°C to 50°C
*3
–1.0 0 1.0 mV/°C
Temperature coefficient 2
*2
T
COE2
Ta = 0°C to 50°C
*3
–0.5 0 0.5 mV/°C
[DELAY TIME]
Overcharge detection delay time t
CU
0.92 1.15 1.38 s 9 2
Overdischarge detection delay time t
DL
115 144 173 ms 9 2
Overcurrent detection delay time 1 t
IOV1
7.2 9 11 ms 10 2
Overcurrent detection delay time 2 t
IOV2
FET gate capacitance
2000 pF
220 300 380
s 10 2
[0 V BATTERY CHARGE FUNCTION]
0 V charge starting charger voltage
V
0CHA
0 V charge available
1.2
V 11 2
0 V battery charge inhibition battery voltage
V
0INH
0 V charge unavailable
0.5 V 12 2
[INTERNAL RESISTANCE]
Resistance between VM and VDD R
VMD
V1 = V2 = 1.5 V, V
VM
= 0 V
100 300 900 k
6 3
Resistance between VM and VSS R
VMS
V1 = V2 = 3.5 V, V
VM
= 1.0 V
5 10 20 k
6 3
[INPUT VOLTAGE]
Operating voltage between VDD and VSS
V
DSOP1
Internal circuit operating voltage
1.5
10 V
Operating voltage between VDD and VM
V
DSOP2
Internal circuit operating voltage
1.5
28 V
[INPUT CURRENT]
Current consumption during operation I
OPE
V1 = V2 = 3.5 V, V
VM
= 0 V
5 10
A 5 3
Current consumption at power down I
PDN
V1 = V2 = 1.5 V, V
VM
= 3.0 V
0.1
A 5 3
VC pin current I
VC
V1 = V2 = 3.5 V, V
VM
= 0 V
–0.3 0 0.3
A 5 3
[OUTPUT RESISTANCE]
CO pin H resistance R
COH
V
CO
= V
DD
–0.5 V
2 4 8 k
7 4
CO pin L resistance R
COL
V
CO
= V
VM
+0.5 V
2 4 8 k
7 4
DO pin H resistance R
DOH
V
DO
= V
DD
–0.5 V
2 4 8 k
8 4
DO pin L resistance R
DOL
V
DO
= V
SS
+0.5 V
2 4 8 k
8 4
*1. Voltage temperature coefficient 1: Overcharge detection voltage
*2. Voltage temperature coefficient 2: Overcurrent detection voltage 1
*3. Since products are not screened at high and low temperature, the specification for this temperature range is guaranteed
by design, not tested in production.
NOT RECOMMENDED FOR NEW DESIGN
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
Rev.2.3_02 S-8242B Series
9
Test Circuits
Caution Unless otherwise specified, the output voltage levels “H” and “L” at CO pin (VCO) and DO pin (VDO) are
judged by the threshold voltage (1.0 V) of the N-channel FET. Judge the CO pin level with respect to
VVM and the DO pin level with respect to VSS.
1. Overcharge Detection Voltage, Overcharge Release Voltage
(Test Condition 1, Test Circuit 1)
Overcharge detection voltage 1 (VCU1) is defined as the voltage between the VDD pin and VC pin at which VCO goes
from “H” to “L” when the voltage V1 is gradually increased from the starting condition of V1 V2 VCU
–
0.05 V, V3 0
V. Overcharge release voltage 1 (VCL1) is defined as the voltage between the VDD and VC pins at which VCO goes
from “L” to “H” when setting V2 3.5 V and the voltage V1 is then gradually decreased. Overcharge hysteresis
voltage 1 (VHC1) is defined as the difference between overcharge detection voltage 1 (VCU1) and overcharge release
voltage 1 (VCL1).
Overcharge detection voltage 2 (VCU2) is defined as the voltage between the VC pin and VSS pin at which VCO goes
from “H” to “L” when the voltage V2 is gradually increased from the starting condition of V1 V2 VCU
–
0.05 V, V3 0
V. Overcharge release voltage 2 (VCL2) is defined as the voltage between the VC and VSS pins at which VCO goes
from “L” to “H” when setting V1 3.5 V and the voltage V2 is then gradually decreased. Overcharge hysteresis
voltage 2 (VHC2) is defined as the difference between overcharge detection voltage 2 (VCU2) and overcharge release
voltage 2 (VCL2).
2. Overdischarge Detection Voltage, Overdischarge Release Voltage
(Test Condition 2, Test Circuit 2)
Overdischarge detection voltage 1 (VDL1) is defined as the voltage between the VDD pin and VC pin at which VDO
goes from “H” to “L” when the voltage V1 is gradually decreased from the starting condition of V1 V2 3.5 V, V3 0
V. Overdischarge release voltage 1 (VDU1) is defined as the voltage between the VDD pin and VC pin at which VDO
goes from “L” to “H” when setting V2 = 3.5 V and the voltage V1 is then gradually increased. Overdischarge
hysteresis voltage 1 (VHD1) is defined as the difference between overdischarge release voltage 1 (VDU1) and
overdischarge detection voltage 1 (VDL1).
Overdischarge detection voltage 2 (VDL2) is defined as the voltage between the VC pin and VSS pin at which VDO
goes from “H” to “L” when the voltage V2 is gradually decreased from the starting condition of V1 V2 3.5 V, V3 0
V. Overdischarge release voltage 2 (VDU2) is defined as the voltage between the VC pin and VSS pin at which VDO
goes from “L” to “H” when setting V1 = 3.5 V and the voltage V2 is then gradually increased. Overdischarge
hysteresis voltage 2 (VHD2) is defined as the difference between overdischarge release voltage 2 (VDU2) and
overdischarge detection voltage 2 (VDL2).
3. Overcurrent Detection Voltage 1, Overcurrent Detection Voltage 2
(Test Condition 3, Test Circuit 2)
Overcurrent detection voltage 1 (VIOV1) is defined as the voltage between the VM pin and VSS pin whose delay time
for changing VDO from “H” to “L” lies between the minimum and the maximum value of overcurrent delay time 1 when
the voltage V3 is increased rapidly within 10 s from the starting condition of V1 V2 3.5 V, V3 0 V.
Overcurrent detection voltage 2 (VIOV2) is defined as the voltage between the VM pin and VSS pin whose delay time
for changing VDO from “H” to “L” lies between the minimum and the maximum value of overcurrent delay time 2 when
the voltage V3 is increased rapidly within 10 s from the starting condition of V1 V2 3.5 V, V3 0 V.
4. Charger Detection Voltage
(Test Condition 4, Test Circuit 2)
The charger detection voltage (VCHA) is defined as the voltage between the VM pin and VSS pin at which VDO goes
from “L” to “H” when the voltage V3 is gradually decreased from 0 V after the voltage V1 is gradually increased from
the starting condition of V1 1.8 V, V2 3.5 V, V3 0 V until the voltage V1 becomes VDL1 (VHD1/2).
The charger detection voltage can be measured only in a product whose overdischarge hysteresis VHD 0 V.
NOT RECOMMENDED FOR NEW DESIGN
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S-8242B Series Rev.2.3_02
10
5. Operating Current Consumption, VC Pin Current, Power-down Current Consumption
(Test Condition 5, Test Circuit 3)
The operating current consumption (IOPE) is the current ISS that flows through the VSS pin and the VC pin current (IVC)
is the current IC that flows through the VC pin under the set conditions of V1 V2 3.5 V and S1:OFF, S2:ON
(normal status).
The power-down current consumption (IPDN) is the current ISS that flows through the VSS pin under the set conditions
of V1 V2 1.5 V and S1:ON, S2:OFF (overdischarge status).
6. Resistance between VM and VDD, Resistance between VM and VSS
(Test Condition 6, Test Circuit 3)
The resistance between VM and VDD (RVMD) is the resistance between VM and VDD pins under the set conditions of
V1 V2 1.5 V and S1:OFF, S2:ON.
The resistance between VM and VSS (RVMS) is the resistance between VM and VSS pins under the set conditions of
V1 V2 3.5 V and S1:ON, S2:OFF.
7. CO Pin H Resistance, CO Pin L Resistance
(Test Condition 7, Test Circuit 4)
The CO pin H resistance (RCOH) is the resistance at the CO pin under the set conditions of V1 V2 3.5 V, V4 6.5 V.
The CO pin L resistance (RCOL) is the resistance at the CO pin under the set conditions of V1 V2 4.5 V, V4 0.5 V.
8. DO Pin H Resistance, DO Pin L Resistance
(Test Condition 8, Test Circuit 4)
The DO pin H resistance (RDOH) is the resistance at the DO pin under the set conditions of V1 V2 3.5 V, V5 6.5 V.
The DO pin L resistance (RDOL) is the resistance at the DO pin under the set conditions of V1 V2 1.8 V, V5 0.5 V.
9. Overcharge Detection Delay Time, Overdischarge Detection Delay Time
(Test Condition 9, Test Circuit 2)
The overcharge detection delay time (tCU) is the time needed for VCO to change from “H” to “L” just after the voltage
V1 momentarily increases within 10 s from overcharge detection voltage 1 (VCU1) 0.2 V to overcharge detection
voltage 1 (VCU1) 0.2 V under the set conditions of V1 V2 3.5 V, V3 0 V.
The overdischarge detection delay time (tDL) is the time needed for VDO to change from “H” to “L” just after the voltage
V1 momentarily decreases within 10 s from overdischarge detection voltage 1 (VDL1) 0.2 V to overdischarge
detection voltage 1 (VDL1) 0.2 V under the set condition of V1 V2 3.5 V, V3 0 V.
10. Overcurrent Detection Delay Time 1, Overcurrent Detection Delay Time 2
(Test Condition 10, Test Circuit 2)
Overcurrent detection delay time 1 (tIOV1) is the time needed for VDO to go to “L” after the voltage V3 momentarily
increases within 10 s from 0 V to VIOV1 0.1 V under the set conditions of V1 V2 3.5 V, V3 0 V.
Overcurrent detection delay time 2 (tIOV2) is the time needed for VDO to go to “L” after the voltage V3 momentarily
increases within 10 s from 0 V to 2.0 V under the set conditions of V1 V2 3.5 V, V3 0 V.
11. 0 V Charge Starting Charger Voltage (Products in Which 0 V Charge Is Available)
(Test Condition 11, Test Circuit 2)
The 0 V charge starting charger voltage (V0CHA) is defined as the voltage between the VDD pin and VM pin at which
VCO goes to “H” (VVM 0.1 V or higher) when the voltage V3 is gradually decreased from the starting condition of V1
V2 V3 0 V.
NOT RECOMMENDED FOR NEW DESIGN
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
Rev.2.3_02 S-8242B Series
11
12. 0 V Charge Inhibition Battery Voltage (Products in Which 0 V Charge Is Unavailable)
(Test Condition 12, Test Circuit 2)
The 0 V charge inhibition charger voltage (V0INH) is defined as the voltage between the VDD pin and VSS pin at which
VCO goes to “H” (VVM 0.1 V or higher) when the voltages V1 and V2 are gradually increased from the starting
condition of V1 V2 0 V, V3 4 V.
CO
VM
DO
S-8242B Series
V3
VDD
VC
VSS
R1 = 100
V1
V2
C1 = 1
F
V
V
Figure 5 Test circuit 1
CO
VM
DO
S-8242B Series
V3
VDD
VC
VSS
V1
V2
V
V
A
A
Figure 6 Test circuit 2
CO
VM
DO
S-8242B Series
S1
S2
VDD
VC
VSS V2
V1
A
A
A
Figure 7 Test circuit 3
CO
VM
DO
S-8242B Series
V4
VDD
VC
VSS
V1
V2
V5
A
A A
A
Figure 8 Test circuit 4
NOT RECOMMENDED FOR NEW DESIGN
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S-8242B Series Rev.2.3_02
12
Operation
Remark Refer to “ Battery Protection IC Connection Example”.
1. Normal Status
This IC monitors the voltage of the battery connected between the VDD and VSS pins and the voltage difference
between the VM and VSS pins to control charging and discharging. When the battery voltage is in the range from
overdischarge detection voltage n (VDLn) to overcharge detection voltage n (VCUn), and the VM pin voltage is in the
range from the charger detection voltage (VCHA) to overcurrent detection voltage 1 (VIOV1), the IC turns both the
charging and discharging control FETs on. This condition is called the normal status, and in this condition charging
and discharging can be carried out freely.
Caution When the battery is connected for the first time, discharging may not be enabled. In this case,
Short the VM pin and VSS pin, or
Set the VM pin’s voltage at the level of the charger detection voltage (VCHA) or more and the
overcurrent detection voltage 1 (VIOV1) or less by connecting the charger
The IC returns to the normal status.
2. Overcharge Status
When the battery voltage becomes higher than overcharge detection voltage n (VCUn) during charging in the normal
status and detection continues for the overcharge detection delay time (tCU) or longer, the S-8242B Series turns the
charging control FET off to stop charging. This condition is called the overcharge status.
The overcharge status is released in the following two cases ((1) and (2)).
(1) When the battery voltage falls below overcharge release voltage n (VCLn), the S-8242B Series turns the charging
control FET on and returns to the normal status.
(2) When a load is connected and discharging starts, the S-8242B Series turns the charging control FET on and
returns to the normal status. Just after the load is connected and discharging starts, the discharging current
flows through the parasitic diode in the charging control FET. At this moment the VM pin potential becomes Vf,
the voltage for the parasitic diode, higher than the VSS level. When the battery voltage goes under overcharge
detection voltage n (VCUn) and provided that the VM pin voltage is higher than overcurrent detection voltage 1,
the S-8242B Series releases the overcharge condition.
Caution 1. If the battery is charged to a voltage higher than overcharge detection voltage n (VCUn) and the
battery voltage does not fall below overcharge detection voltage n (VCUn) even when a heavy
load is connected, overcurrent 1 and overcurrent 2 do not function until the battery voltage falls
below overcharge detection voltage n (VCUn). Since an actual battery has an internal impedance
of tens of m, the battery voltage drops immediately after a heavy load that causes overcurrent
is connected, and overcurrent 1 and overcurrent 2 function.
2. When a charger is connected after overcharge detection, the overcharge status is not released
even if the battery voltage is below overcharge release voltage n (VCLn). The overcharge status
is released when the VM pin voltage goes over the charger detection voltage (VCHA) by removing
the charger.
NOT RECOMMENDED FOR NEW DESIGN
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
Rev.2.3_02 S-8242B Series
13
3. Overdischarge Status
When the battery voltage falls below overdischarge detection voltage n (VDLn) during discharging in the normal status
and detection continues for the overdischarge detection delay time (tDL) or longer, the S-8242B Series turns the
discharging control FET off to stop discharging. This condition is called the overdischarge status. When the
discharging control FET is turned off, the VM pin voltage is pulled up by the resistor between the VM and VDD pins in
the IC (RVMD). When the voltage difference between the VM and VSS pins is 1.3 V (typ.) or higher, the current
consumption is reduced to the power-down current consumption (IPDN). This condition is called the power-down
status.
The power-down status is released when a charger is connected and the voltage difference between the VM and
VSS pins becomes 1.3 V (typ.) or lower. Moreover, when the battery voltage becomes overdischarge detection
voltage n (VDLn) or higher, the S-8242B Series turns the discharging FET on and returns to the normal status.
4. Charger Detection
When a battery in the overdischarge status is connected to a charger and provided that the VM pin voltage is lower
than the charger detection voltage (VCHA), the overdischarge hysteresis is released via the charge detection function;
therefore, the S-8242B Series releases the overdischarge status and turns the discharging control FET on when the
battery voltage becomes equal to or higher than overdischarge detection voltage n (VDLn) since the charger detection
function works. This action is called charger detection.
When a battery in the overdischarge status is connected to a charger and provided that the VM pin voltage is not
lower than the charger detection voltage (VCHA), the S-8242B Series releases the overdischarge status when the
battery voltage reaches overdischarge release voltage n (VDUn) or higher.
5. Overcurrent Status
When a battery in the normal status is in the status where the voltage of the VM pin is equal to or higher than the
overcurrent detection voltage because the discharge current is higher than the specified value and the status lasts for
the overcurrent detection delay time, the discharge control FET is turned off and discharging is stopped. This status
is called the overcurrent status.
In the overcurrent status, the VM and VSS pins are shorted by the resistor between VM and VSS (RVMS) in the IC.
However, the voltage of the VM pin is at the VDD potential due to the load as long as the load is connected. When the
load is disconnected, the VM pin returns to the VSS potential.
This IC detects the status when the impedance between the EB pin and EB pin (Refer to Figure 13) increases and
is equal to the impedance that enables automatic restoration and the voltage at the VM pin returns to overcurrent
detection voltage 1 (VIOV1) or lower and the overcurrent status is restored to the normal status.
Caution The impedance that enables automatic restoration varies depending on the battery voltage and the
set value of overcurrent detection voltage 1.
NOT RECOMMENDED FOR NEW DESIGN
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S-8242B Series Rev.2.3_02
14
6. 0 V Battery Charge Function
This function is used to recharge a connected battery whose voltage is 0 V due to self-discharge. When the 0 V
battery charge starting charger voltage (V0CHA) or a higher voltage is applied between the EB and EB pins by
connecting a charger, the charging control FET gate is fixed to the VDD pin voltage.
When the voltage between the gate and source of the charging control FET becomes equal to or higher than the turn-
on voltage due to the charger voltage, the charging control FET is turned on to start charging. At this time, the
discharging control FET is off and the charging current flows through the internal parasitic diode in the discharging
control FET. When the battery voltage becomes equal to or higher than overdischarge release voltage n (VDUn), the
S-8242B Series enters the normal status.
Caution Some battery providers do not recommend charging for a completely self-discharged battery.
Please ask the battery provider to determine whether to enable or inhibit the 0 V battery charge
function.
7. 0 V Battery Charge Inhibition Function
This function inhibits recharging when a battery that is internally short-circuited (0 V) is connected. When the battery
voltage (The voltage between VDD and VSS pins) is the 0 V battery charge inhibition battery voltage (V0INH) or lower,
the charging control FET gate is fixed to the EB pin voltage to inhibit charging. When the battery voltage is the 0 V
battery charge inhibition battery voltage (V0INH) or higher, charging can be performed.
Caution Some battery providers do not recommend charging for a completely self-discharged battery.
Please ask the battery provider to determine whether to enable or inhibit the 0 V battery charge
function.
NOT RECOMMENDED FOR NEW DESIGN
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
Rev.2.3_02 S-8242B Series
15
8. Delay Circuit
The detection delay times are determined by dividing a clock of approximately 3.5 kHz by the counter.
Remark 1. The overcurrent detection delay time 2 (tIOV2) starts when the overcurrent detection voltage 1 (VIOV1) is
detected. When the overcurrent detection voltage 2 (VIOV2) is detected over the overcurrent detection
delay time 2 (tIOV2) after the detection of overcurrent detection voltage 1 (VIOV1), the S-8242B turns the
discharging control FET off within tIOV2 from the time of detecting VIOV2.
DO pin
VM pin
V
DD
V
DD
Time
V
IOV1
V
SS
V
SS
V
IOV2
Overcurrent detection delay time 2 (t
IOV2
)
Time
t
D
0
t
D
t
IOV2
Figure 9
2. When the overcurrent is detected and continues for longer than the overdischarge detection delay time
(tDL) without releasing the load, the condition changes to the power-down condition when the battery
voltage falls below the overdischarge detection voltage n (VDLn). When the battery voltage falls below
the overdischarge detection voltage n (VDLn) due to the overcurrent, the S-8242B Series turns the
discharging control FET off by the overcurrent detection. In this case the recovery of the battery voltage
is so slow that if the battery voltage after the overdischarge detection delay time (tDL) is still lower than
the overdischarge detection voltage n (VDLn), the S-8242B Series shifts to the power-down condition.
NOT RECOMMENDED FOR NEW DESIGN
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S-8242B Series Rev.2.3_02
16
Timing Chart
1. Overcharge Detection, Overdischarge Detection
(n= 1, 2)
V
CUn
V
DUn
V
DLn
V
CLn
Battery
voltage
V
SS
CO pin
voltage
V
DD
DO pin
voltage
V
SS
Charger connection
Load connection
Status
*
1
Overcharge detection
delay time(t
CU
) Overdischarge detection
delay time (t
DL
)
(1) (2) (1) (3) (1)
V
IOV1
V
SS
VM pin
voltage
V
DD
V
EB
V
DD
V
CHA
V
EB
*1. (1) : Normal status
(2) : Overcharge status
(3) : Overdischarge status
Remark The charger is assumed to charge with a constant current.
Figure 10
NOT RECOMMENDED FOR NEW DESIGN
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
Rev.2.3_02 S-8242B Series
17
2. Overcurrent Detection
V
CUn
V
DUn
V
DLn
(n= 1, 2)
V
CLn
Battery
voltage
V
DD
DO pin
voltage
V
SS
V
DD
V
SS
CO pin
voltage
V
DD
V
SS
VM pin
voltage
Charger
connection
Status
*1
Overcurrent detection
delay time 1 (t
IOV1
)
(1) (2) (1) (1)
Overcurrent detection
delay time 2 (t
IOV2
)
(2)
V
IOV2
V
IOV1
*1. (1) : Normal status
(2) : Overcurrent status
Remark The charger is assumed to charge with a constant current.
Figure 11
NOT RECOMMENDED FOR NEW DESIGN
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S-8242B Series Rev.2.3_02
18
3. Charger Detection
V
CUn
V
DUn
V
DLn
(n= 1, 2)
V
CLn
Battery
voltage
V
DD
DO pin
voltage
V
SS
V
DD
V
SS
CO pin
voltage
V
DD
V
SS
VM pin
voltage
V
CHA
Load connection
Status
*1
Overdischarge detection delay time (t
DL
)
(1) (1) (2)
Charger connection
VM pin voltage
V
CHA
Overdischarge detection (V
DL
)
*1. (1) : Normal status
(2) : Overdischarge status
Remark The charger is assumed to charge with a constant current.
Figure 12
NOT RECOMMENDED FOR NEW DESIGN
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
Rev.2.3_02 S-8242B Series
19
Battery Protection IC Connection Example
R1
Battery 1 C1
VSS
DO
VDD
CO VM
S-8242B Series
FET1 FET2
EB
EB
R3
R2
VC
Battery 2
C2
Figure 13
Table 7 Constants for External Components
Symbol Parts Purpose Min. Typ. Max. Remark
FET1 N-channel
MOS FET Discharge control
Threshold voltage
Overdischarge detection voltage
*
2
Gate to source withstanding voltage
Charger voltage
*3
FET2 N-channel
MOS FET Charge control
Threshold voltage
Overdischarge detection voltage
*
2
Gate to source withstanding voltage
Charger voltage
*3
R1 Resistor
ESD protection,
For power fluctuation 10
*1
100
220
*1
Resistance should be as small as possible to avoid lowering
the overcharge detection accuracy due to current
consumption.
*4
C1 Capacitor For power fluctuation 0.47
F
*1
1
F 10
F
*1
Connect a capacitor of 0.47
F or higher between VDD and
VSS.
*5
R2 Resistor
ESD protection,
For power fluctuation 300
*1
1 k
1 k
*1
C2 Capacitor For power fluctuation 0.022
F
*1
0.1
F1.0
F
*1
R3 Resistor
Protection for reverse
connection of a charger 300
2 k
4 k
Select as large a resistance as possible to prevent current
when a charger is connected in reverse.
*6
*1. Please set up a filter constant to be R2 C2 20 F , and to be R1 C1 R2 C2.
*2. If the threshold voltage of a FET is low, the FET may not cut the charging current.
If a FET with a threshold voltage equal to or higher than the overdischarge detection voltage is used, discharging may be
stopped before overdischarge is detected.
*3. If the withstanding voltage between the gate and source is lower than the charger voltage, the FET may be destroyed.
*4. If R1 has a high resistance, the voltage between VDD and VSS may exceed the absolute maximum rating when a
charger is connected in reverse since the current flows from the charger to the IC.
Insert a resistor of 10 or higher to R1 for ESD protection.
*5. If a capacitor of less than 0.47 F is connected to C1, DO pin may oscillate when load short-circuiting is detected. Be
sure to connect a capacitor of 0.47 F or higher to C1.
*6. If R3 has a resistance higher than 4 k, the charging current may not be cut when a high-voltage charger is connected.
Caution 1. The above constants may be changed without notice.
2. It has not been confirmed whether the operation is normal or not in circuits other than the above
example of connection. In addition, the example of connection shown above and the constant do not
guarantee proper operation. Perform through evaluation using the actual application to set the constant.
NOT RECOMMENDED FOR NEW DESIGN
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S-8242B Series Rev.2.3_02
20
Precautions
The application conditions for the input voltage, output voltage, and load current should not exceed the package power
dissipation.
When connecting a battery and the protection circuit, the output voltage of the DO pin (VDO) may become “L” (initial
state). In this case,
Short the VM and VSS pins or,
Set the VM pin’s voltage at the level of the charger detection voltage (VCHA) or more and the overcurrent detection
voltage 1 (VIOV1) or less by connecting the charger
The output voltage of the DO pin (VDO) is set to “H” (normal status).
Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic
protection circuit.
ABLIC Inc. claims no responsibility for any and all disputes arising out of or in connection with any infringement by
products including this IC of patents owned by a third party.
NOT RECOMMENDED FOR NEW DESIGN
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
Rev.2.3_02 S-8242B Series
21
Characteristics (Typical Data)
(1) Current consumption
1. IOPE VDD 2. IOPE Ta
IOPE [A]
2
3
4
5 6
12
10
8
6
4
2
0
7
8
910
IOPE [A]
40
25 025
50
75 85
12
10
8
6
4
2
0
V
DD [V] Ta [C]
3. IPDN VDD 4. IPDN Ta
IPDN [A]
0.10
0.09
0.08
0.07
0.06
0.05
0.04
0.03
0.02
0.01
0
2
3
4
5
6
7
8
910
IPDN [A]
40
25 025
50
75 85
0.10
0.09
0.08
0.07
0.06
0.05
0.04
0.03
0.02
0.01
0
V
DD [V]
Ta [C]
(2) Overcharge detection/release voltage, overdischarge detection/release voltage, overcurrent detection voltage, and
delay time
1. VCU Ta 2. VCL Ta
VCU [V]
4.350
4.345
4.340
4.335
4.330
4.325
4.320
4.315
4.310
4.305
4.300
40 25 0 25 50 75 85
VCL [V]
40
25 025
50
75 85
4.125
4.115
4.105
4.095
4.085
4.075
4.065
4.055
4.045
4.035
4.025
Ta [C]
Ta [C]
3. VDU Ta 4. VDL Ta
VDU [V]
40 25 0 25 50 75 85
3.00
2.95
2.90
2.85
2.80
VDL [V]
40 25 025
50
75 85
2.25
2.24
2.23
2.22
2.21
2.20
2.19
2.18
2.17
2.16
2.15
Ta [C]
Ta [C]
NOT RECOMMENDED FOR NEW DESIGN
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S-8242B Series Rev.2.3_02
22
5. tCU Ta 6. tDL Ta
tCU [s]
40
25
0
25
50
75 85
1.42
1.37
1.32
1.27
1.22
1.17
1.12
1.07
1.02
0.97
0.92
tDL [ms]
40 25 025
50
75 85
185
175
165
155
145
135
125
115
Ta [C] Ta [C]
7. VIOV1 VDD 8. VIOV1 Ta
VIOV1 [V]
0.225
0.220
0.215
0.210
0.205
0.200
0.195
4
5
7
8 96
VIOV1 [V]
40 25 0
25
50
75 85
0.225
0.220
0.215
0.210
0.205
0.200
0.195
V
DD [V] Ta [C]
9. VIOV2 VDD 10. VIOV2 Ta
VIOV2 [V]
1.5
1.4
1.3
1.2
1.1
1.0
0.9 4
5
7
8 9
6
VIOV2 [V]
40 25 0
25
50
75 85
1.5
1.4
1.3
1.2
1.1
1.0
0.9
V
DD [V] Ta [C]
11. tIOV1 VDD 12. tIOV1 Ta
tIOV1 [ms]
4 5 7 8 96
10.8
10.4
10.0
9.6
9.2
8.8
8.4
8.0
7.6
7.2
tIOV1 [ms]
40 25 025
50
75 85
10.8
10.4
10.0
9.6
9.2
8.8
8.4
8.0
7.6
7.2
V
DD [V] Ta [C]
NOT RECOMMENDED FOR NEW DESIGN
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
Rev.2.3_02 S-8242B Series
23
13. tIOV2 VDD 14. tIOV2 Ta
tIOV2 [ms]
0.38
0.36
0.34
0.32
0.30
0.28
0.26
0.24
0.22
4
5
7
8 96
tIOV2 [ms]
40 25 025 50 75 85
0.38
0.36
0.34
0.32
0.30
0.28
0.26
0.24
0.22
V
DD [V] Ta [C]
(3) CO/DO pin
1. ICOH VCO 2. ICOL VCO
ICOH [mA]
0
1
3
4
5
2
6
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6 7
ICOL [mA]
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
00 1 3
4
5
2 6
7 8 9
V
CO [V]
VCO [V]
3. IDOH VDO 4. IDOL VDO
IDOH [mA]
0
1
3
4
5
2
6
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4 7
IDOL [mA]
0.30
0.25
0.20
0.15
0.10
0.05
0
013
2
V
DO [V] VDO [V]
NOT RECOMMENDED FOR NEW DESIGN
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S-8242B Series Rev.2.3_02
24
Marking Specifications
(1) SNT-8A
SNT-8A
Top view
1
4
8
5
(9)
(6)
(2)
(10)
(7)
(3)
(11)
(8)
(4)
(5)
(1)
(1) Blank
(2) to (4) Product code (Refer to Product name vs. Product code)
(5), (6) Blank
(7) to (11) Lot number
Product Name vs. Product Code
Product Name Product Code
(2) (3) (4)
S-8242BAB-I8T1x Q N B
S-8242BAC-I8T1x Q N C
S-8242BAD-I8T1x Q N D
S-8242BAE-I8T1x Q N E
S-8242BAF-I8T1x Q N F
S-8242BAG-I8T1x Q N G
S-8242BAH-I8T1x Q N H
S-8242BAI-I8T1x Q N I
S-8242BAM-I8T1x Q N M
S-8242BAN-I8T1x Q N N
S-8242BAO-I8T1x Q N O
S-8242BAQ-I8T1x Q N Q
S-8242BAR-I8T1x Q N R
S-8242BAU-I8T1x Q N U
S-8242BAV-I8T1x Q N V
S-8242BAW-I8T1x Q N W
S-8242BAX-I8T1x Q N X
S-8242BAY-I8T1x Q N Y
S-8242BAZ-I8T1x Q N Z
S-8242BBA-I8T1x Q O A
S-8242BBB-I8T1x Q O B
S-8242BBC-I8T1x Q O C
S-8242BBD-I8T1x Q O D
S-8242BBF-I8T1x Q O F
S-8242BBH-I8T1x Q O H
S-8242BBI-I8T1x Q O I
S-8242BBJ-I8T1x Q O J
S-8242BBK-I8T1x Q O K
S-8242BBQ-I8T1x Q O Q
S-8242BBR-I8T1x Q O R
S-8242BBW-I8T1x Q O W
S-8242BBZ-I8T1U Q O Z
Remark 1. Please contact our sales office for the products with detection voltage value other than those specified
above.
2. x: G or U
3. Please select products of environmental code = U for Sn 100%, halogen-free products.
NOT RECOMMENDED FOR NEW DESIGN
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
Rev.2.3_02 S-8242B Series
25
(2) 8-Pin TSSOP
8-Pin TSSOP
Top view
(
1
)
(
2
)
(
3
)
(
4
)
(
5
)
(
6
)
(
7
)
(
8
)
(
11
)
(
12
)
(
13
)
(
14
)
(
9
)
(
10
)
1
4
8
5
(1) to (5): Product Name : S8242 (Fixed)
(6) to (8): Function Code
(refer to Product Name vs. Function Code)
(9) to (14): Lot number
Product Name vs. Function Code
Product Name Function Code
(6) (7) (8)
S-8242BAC-T8T1x B A C
S-8242BAD-T8T1U B A D
S-8242BAH-T8T1x B A H
S-8242BAI-T8T1x B A I
S-8242BAP-T8T1x B A P
S-8242BAR-T8T1x B A R
S-8242BAU-T8T1x B A U
S-8242BAV-T8T1x B A V
S-8242BAW-T8T1x B A W
S-8242BAX-T8T1x B A X
S-8242BBD-T8T1U B B D
S-8242BBE-T8T1x B B E
S-8242BBF-T8T1x B B F
S-8242BBG-T8T1x B B G
S-8242BBL-T8T1y B B L
S-8242BBM-T8T1x B B M
S-8242BBO-T8T1y B B O
S-8242BBP-T8T1y B B P
S-8242BBS-T8T1y B B S
S-8242BBU-T8T1y B B U
S-8242BBV-T8T1y B B V
S-8242BBX-T8T1y B B X
S-8242BCA-T8T1U B C A
S-8242BCB-T8T1U B C B
S-8242BCC-T8T1U B C C
S-8242BCC-T8T1U B C C
S-8242BCD-T8T1U B C D
S-8242BCE-T8T1U B C E
S-8242BCF-T8T1U B C F
S-8242BCG-T8T1U B C G
S-8242BCH-T8T1U B C H
Remark 1. Please contact our sales office for the products with detection voltage value other than those specified
above.
2. x: G or U
3. y: S or U
4. Please select products of environmental code = U for Sn 100%, halogen-free products.
NOT RECOMMENDED FOR NEW DESIGN
No.
TITLE
UNIT
ANGLE
ABLIC Inc.
1.97±0.03
0.2±0.05
0.48±0.02
0.08
mm
SNT-8A-A-PKG Dimensions
PH008-A-P-SD-2.1
No. PH008-A-P-SD-2.1
0.5
+0.05
-0.02
123 4
56
78
NOT RECOMMENDED FOR NEW DESIGN
No.
TITLE
UNIT
ANGLE
ABLIC Inc.
mm
PH008-A-C-SD-2.0
SNT-8A-A-Carrier Tape
No. PH008-A-C-SD-2.0
Feed direction
4.0±0.1
2.0±0.05
4.0±0.1
ø1.5 +0.1
-0
ø0.5±0.1
2.25±0.05
0.65±0.05
0.25±0.05
2134
7865
NOT RECOMMENDED FOR NEW DESIGN
No.
TITLE
UNIT
ANGLE
ABLIC Inc.
12.5max.
9.0±0.3
ø13±0.2
(60°) (60°)
Enlarged drawing in the central part
QTY.
PH008-A-R-SD-1.0
mm
SNT-8A-A-Reel
No. PH008-A-R-SD-1.0
5,000
NOT RECOMMENDED FOR NEW DESIGN
No.
TITLE
UNIT
ANGLE
ABLIC Inc.
mm
SNT-8A-A
-Land Recommendation
PH008-A-L-SD-4.1
0.3
0.2
0.52
2.01
0.52
No. PH008-A-L-SD-4.1
Caution 1. Do not do silkscreen printing and solder printing under the mold resin of the package.
2. The thickness of the solder resist on the wire pattern under the package should be 0.03 mm
or less from the land pattern surface.
3. Match the mask aperture size and aperture position with the land pattern.
4. Refer to "SNT Package User's Guide" for details.
1. (0.25 mm min. / 0.30 mm typ.)
2. (1.96 mm ~ 2.06 mm)
1.
2. 0.03 mm
3.
4. SNT
1. Pay attention to the land pattern width (0.25 mm min. / 0.30 mm typ.).
2. Do not widen the land pattern to the center of the package (1.96 mm to 2.06mm).
1
2
1.
2. (1.96 mm ~ 2.06 mm)
(0.25 mm min. / 0.30 mm typ.)
NOT RECOMMENDED FOR NEW DESIGN
No.
TITLE
UNIT
ANGLE
ABLIC Inc.
TSSOP8-E-PKG Dimensions
No. FT008-A-P-SD-1.2
FT008-A-P-SD-1.2
0.17±0.05
3.00 +0.3
-0.2
0.65
0.2±0.1
14
5
8
mm
NOT RECOMMENDED FOR NEW DESIGN
No.
TITLE
UNIT
ANGLE
ABLIC Inc.
ø1.55±0.05
2.0±0.05
8.0±0.1 ø1.55 +0.1
-0.05
(4.4)
0.3±0.05
1
45
8
4.0±0.1
Feed direction
TSSOP8-E-Carrier Tape
No. FT008-E-C-SD-1.0
FT008-E-C-SD-1.0
+0.4
-0.2
6.6
mm
NOT RECOMMENDED FOR NEW DESIGN
No.
TITLE
UNIT
ANGLE
ABLIC Inc.
Enlarged drawing in the central part
No. FT008-E-R-SD-1.0
2±0.5
ø13±0.5
ø21±0.8
13.4±1.0
17.5±1.0
3,000
QTY.
TSSOP8-E-Reel
FT008-E-R-SD-1.0
mm
NOT RECOMMENDED FOR NEW DESIGN
No.
TITLE
UNIT
ANGLE
ABLIC Inc.
Enlarged drawing in the central part
2±0.5
ø13±0.5
ø21±0.8
13.4±1.0
17.5±1.0
4,000
QTY.
TSSOP8-E-Reel
FT008-E-R-S1-1.0
mm
No. FT008-E-R-S1-1.0
NOT RECOMMENDED FOR NEW DESIGN
Disclaimers (Handling Precautions)
1. All the information described herein
(product data,
specifications,
figures,
tables,
programs,
algorithms and application
circuit examples,
etc.)
is current as of publishing date of this document and is subject to change without notice.
2. The circuit examples and the usages described herein are for reference only, and do not guarantee the success of
any specific mass-production design.
ABLIC Inc. is not responsible for damages caused by the reasons other than the products described herein
(hereinafter "the products") or infringement of third-party intellectual property right and any other right due to the use
of the information described herein.
3. ABLIC Inc. is not responsible for damages caused by the incorrect information described herein.
4. Be careful to use the products within their specified ranges. Pay special attention to the absolute maximum ratings,
operation voltage range and electrical characteristics, etc.
ABLIC Inc. is not responsible for damages caused by failures and / or accidents, etc. that occur due to the use of the
products outside their specified ranges.
5. When using the products, confirm their applications, and the laws and regulations of the region or country where they
are used and verify suitability, safety and other factors for the intended use.
6. When exporting the products, comply with the Foreign Exchange and Foreign Trade Act and all other export-related
laws, and follow the required procedures.
7. The products must not be used or provided (exported) for the purposes of the development of weapons of mass
destruction or military use. ABLIC Inc. is not responsible for any provision (export) to those whose purpose is to
develop, manufacture, use or store nuclear, biological or chemical weapons, missiles, or other military use.
8. The products are not designed to be used as part of any device or equipment that may affect the human body, human
life, or assets (such as medical equipment, disaster prevention systems, security systems, combustion control
systems, infrastructure control systems, vehicle equipment, traffic systems, in-vehicle equipment, aviation equipment,
aerospace equipment, and nuclear-related equipment), excluding when specified for in-vehicle use or other uses. Do
not apply the products to the above listed devices and equipments without prior written permission by ABLIC Inc.
Especially, the products cannot be used for life support devices, devices implanted in the human body and devices
that directly affect human life, etc.
Prior consultation with our sales office is required when considering the above uses.
ABLIC Inc. is not responsible for damages caused by unauthorized or unspecified use of our products.
9. Semiconductor products may fail or malfunction with some probability.
The user of the products should therefore take responsibility to give thorough consideration to safety design including
redundancy, fire spread prevention measures, and malfunction prevention to prevent accidents causing injury or
death, fires and social damage, etc. that may ensue from the products' failure or malfunction.
The entire system must be sufficiently evaluated and applied on customer's own responsibility.
10. The products are not designed to be radiation-proof. The necessary radiation measures should be taken in the
product design by the customer depending on the intended use.
11. The products do not affect human health under normal use. However, they contain chemical substances and heavy
metals and should therefore not be put in the mouth. The fracture surfaces of wafers and chips may be sharp. Be
careful when handling these with the bare hands to prevent injuries, etc.
12. When disposing of the products, comply with the laws and ordinances of the country or region where they are used.
13. The information described herein contains copyright information and know-how of ABLIC Inc.
The information described herein does not convey any license under any intellectual property rights or any other
rights belonging to ABLIC Inc. or a third party. Reproduction or copying of the information from this document or any
part of this document described herein for the purpose of disclosing it to a third-party without the express permission
of ABLIC Inc. is strictly prohibited.
14. For more details on the information described herein, contact our sales office.
2.0-2018.01
www.ablicinc.com
NOT RECOMMENDED FOR NEW DESIGN
