ICS84021AYT - Integrated Circuit Systems, Inc.

84021AY www.icst.com/products/hiperclocks.html REV. A NOVEMBER 7, 2003

Integrated

Circuit

Systems, Inc.

ICS84021

260MHZ, CRYSTAL-TO-LVCMOS / LVTTL

FREQUENCY SYNTHESIZER

GENERAL DESCRIPTION

The ICS84021 is a general purpose, Crystal-to-

LVCMOS/LVTTL High Frequency Synthesizer

and a member of the HiPerClockS™ family of

High Performance Clock Solutions from ICS. The

ICS84021 has a selectable TEST_CLK or crys-

tal input. The VCO operates at a frequency range of 620MHz

to 780MHz. The VCO frequency is programmed in steps

equal to the value of the input reference or crystal frequency.

The VCO and output frequency can be programmed using

the serial or parallel interface to the configuration logic. The

low phase noise characteristics of the ICS84021 make it an

ideal clock source for Gigabit Ethernet, SONET, Fibre Chan-

nel 1 and 2, and Infiniband applications.

BLOCK DIAGRAM PIN ASSIGNMENT

FEATURES

•2 LVCMOS/LVTTL outputs

•Selectable crystal oscillator interface

or LVCMOS/LVTTL TEST_CLK

•Output frequency range: 103.3MHz to 260MHz

•Crystal input frequency range: 14MHz to 40MHz

•VCO range: 620MHz to 780MHz

•Parallel or serial interface for programming counter

and output dividers

•RMS period jitter: 4.3ps (typical) (N ÷ 4, VDDO = 3.3V ± 5%)

•RMS phase jitter at 155.52MHz, using a 38.88MHz crystal

(12KHz to 20MHz): 2.88ps (typical)

Phase noise: 155.52MHz

Offset Noise Power

100Hz ................. -93.7 dBc/Hz

1KHz ............... -111.3 dBc/Hz

10KHz ............... -120.4 dBc/Hz

100KHz ............... -125.1 dBc/Hz

•Full 3.3V or mixed 3.3V core/2.5V or 1.8V supply voltage

•0°C to 70°C ambient operating temperature

•Industrial temperature information available upon request

32 31 30 29 28 27 26 25

9 10 11 12 13 14 15 16

XTAL2

TEST_CLK

XTAL_SEL

VDDA

S_LOAD

S_DATA

S_CLOCK

GND

VDDO

OE0

OE1

VDD

TEST

XTAL1

nP_LOAD

VCO_SEL

32-Lead LQFP

7mm x 7mm x 1.4mm package body

Y Package

Top View

ICS84021

HiPerClockS™

ICS

OSC

OE0

OE1

VCO_SEL

XTAL_SEL

TEST_CLK

XTAL1

XTAL2

S_LOAD

S_DATA

S_CLOCK

nP_LOAD

M0:M8

N0:N1

VCO

PLL

TEST

CONFIGURATION

INTERFACE

LOGIC

÷ M

PHASE DETECTOR

÷3

÷4

÷5

÷6

84021AY www.icst.com/products/hiperclocks.html REV. A NOVEMBER 7, 2003

Integrated

Circuit

Systems, Inc.

ICS84021

260MHZ, CRYSTAL-TO-LVCMOS / LVTTL

FREQUENCY SYNTHESIZER

M divider and N output divider to a specific default state that will

automatically occur during power-up. The TEST output is LOW

when operating in the parallel input mode. The relationship be-

tween the VCO frequency, the crystal frequency and the M di-

vider is defined as follows:

The M value and the required values of M0 through M8 are

shown in Table 3B, Programmable VCO Frequency Function

Table. Valid M values for which the PLL will achieve lock for a

25MHz reference are defined as 25 ≤ M ≤ 31. The frequency

out is defined as follows:

Serial operation occurs when nP_LOAD is HIGH and

S_LOAD is LOW. The shift register is loaded by sampling

the S_DATA bits with the rising edge of S_CLOCK. The con-

tents of the shift register are loaded into the M divider and N

output divider when S_LOAD transitions from LOW-to-HIGH.

The M divide and N output divide values are latched on the

HIGH-to-LOW transition of S_LOAD. If S_LOAD is held HIGH,

data at the S_DATA input is passed directly to the M divider

and N output divider on each rising edge of S_CLOCK. The

serial mode can be used to program the M and N bits and

test bits T1 and T0. The internal registers T0 and T1 deter-

mine the state of the TEST output as follows:

FUNCTIONAL DESCRIPTION

fVCO = fxtal x M

T1 T0 TEST Output

00 LOW

0 1 S_DATA, Shift Register Input

1 0 Output of M divider

1 1 CMOS Fout

FIGURE 1. PARALLEL & SERIAL LOAD OPERATIONS

*NOTE: The NULL timing slot must be observed.

Time

ERIAL

OADING

ARALLEL

OADING

M, N

T1 T0 *

NULL

N1 N0 M8 M7 M6 M5 M4 M3 M2 M1 M 0

FOUT = fVCO = fxtal x M

S_CLOCK

S_DATA

S_LOAD

nP_LOAD

M0:M8, N0:N1

nP_LOAD

NOTE: The functional description that follows describes op-

eration using a 25MHz crystal. Valid PLL loop divider values

for different crystal or input frequencies are defined in the

Input Frequency Characteristics, Table 5, NOTE 1.

The ICS84021 features a fully integrated PLL and therefore

requires no external components for setting the loop band-

width. A fundamental crystal is used as the input to the on-

chip oscillator. The output of the oscillator is fed into the phase

detector. A 25MHz crystal provides a 25MHz phase detector

reference frequency. The VCO of the PLL operates over a

range of 620MHz to 780MHz. The output of the M divider is

also applied to the phase detector.

The phase detector and the M divider force the VCO output

frequency to be M times the reference frequency by adjusting

the VCO control voltage. Note that for some values of M (either

too high or too low), the PLL will not achieve lock. The output of

the VCO is scaled by a divider prior to being sent to each of

the LVCMOS output buffers. The divider provides a 50% out-

put duty cycle.

The programmable features of the ICS84021 support two input

modes to program the M divider and N output divider. The two

input operational modes are parallel and serial.

Figure 1

shows

the timing diagram for each mode. In parallel mode, the

nP_LOAD input is initially LOW. The data on inputs M0 through

M8 and N0 and N1 is passed directly to the M divider and

N output divider. On the LOW-to-HIGH transition of the nP_LOAD

input, the data is latched and the M divider remains loaded until

the next LOW transition on nP_LOAD or until a serial event oc-

curs. As a result, the M and N bits can be hardwired to set the

84021AY www.icst.com/products/hiperclocks.html REV. A NOVEMBER 7, 2003

Integrated

Circuit

Systems, Inc.

ICS84021

260MHZ, CRYSTAL-TO-LVCMOS / LVTTL

FREQUENCY SYNTHESIZER

TABLE 1. PIN DESCRIPTIONS

rebmuNemaNepyTnoitpircseD

15MtupnIpulluP

noitisnartHGIH-ot-WOLnodehctalataD.stupniredividM

.slevelecafretniLTT

VL/SOMCVL.tupniDAOL_Pnfo

,4,3,2

,92,82

23,13,03

,8M,7M,6M

,1M,0M

4M,3M,2M

tupnInwodlluP

6,51N,0NtupnInwodlluP ,C3e

lbaTnidenifedsaeulavredividtuptuosenimreteD

.slevelecafretniLTTVL/SOMCVL.elbaTnoitcnuF

7cndesunU.tcennocoN

61,8DNGrewoP.dnuorgylppusrewoP

9TSETtuptuO tuptuO.noitarepofoedomlairesehtniEVITCAsihcihwtuptuotseT

.slevelec

afretniLTTVL/SOMCVL.edomlellarapniWOLnevird

01V

rewoP.nipylppuseroC

21,110EO,1EOtupnIpulluP

.)tluafed(delbaneerastuptuoeht,HGIHcigolnehW.elbanetuptuO

,E3elb

aTeeS.etatS-irTnierastuptuoeht,WOLcigolnehW

.slevelecafretniLTTVL/SOMCVL.elbaTnoitcnuFEO

31V

ODD

rewoP.nipylppustuptuO

51,411Q,0QtuptuO.slevelecafretniLTTVL/SOMCVL.stuptuokcolC

71RMtupnInwodlluP

sredividlanre

tnieht,HGIHcigolnehW.teseRretsaMhgiHevitcA

eht,WOLcigolnehW.wologotstuptuoehtgnisuacteserera

RMfonoitre

ssA.delbaneerastuptuoehtdnasredividlanretni

.seulavTdna,N,Mdedaoltceffetonseod

.slevelecafretniLTTVL/SO

MCVL

81KCOLC_StupnInwodlluP retsigertfihsehtotnitupniATAD_StatneserpatadlairesniskcolC

.slevelecafretniLTTV

L/SOMCVL.KCOLC_Sfoegdegnisirehtno

91ATAD_StupnInwodlluP foegdegnisirehtnodelpmasataD.tupnilairesretsigertf

ihS

.slevelecafretniLTTVL/SOMCVL.KCOLC_S

02DAOL_StupnInwodlluP .sredividehtotniretsigertfihsmorfatadfonoiti

snartslortnoC

.slevelecafretniLTTVL/SOMCVL

12V

ADD

rewoP.nipylppusgolanA

22LES_LATXtupnIpulluP

.ecruosecnereferLLPehtsastupnitsetrolatsyrcneewtebstceleS

.WOLne

hwKLC_TSETstceleS.HGIHnehwstupniLATXstceleS

slevelecafretniLTTVL/SOMCVL

32KLC_TSETtupnInwodlluP.slevelecafr

etniLTTVL/SOMCVL.tupnikcolctseT

52,421LATX,2LATXtupnI .tuptuoehtsi2LATX.tupniehtsi1LATX.ecafretnirotallic

solatsyrC

62DAOL_PntupnInwodlluP

si0M:8MtatneserpatadnehwsenimreteD.tupnidaollellaraP

ehtstes0N:1Ntatneserp

atadnehwdna,redividMotnidedaol

.slevelecafretniLTTVL/SOMCVL.eulavredividtuptuoN

72LES_OCVtupnIpulluP .edoms

sapybroLLPnisirezisehtnysrehtehwsenimreteD

.slevelecafretniLTTVL/SOMCVL

:ETON

pulluP

dna

nwodlluP

.seulavlacipytrof,scitsiretcarahCniP,2elbaTeeS.srotsisertupnilanretniotrefer

84021AY www.icst.com/products/hiperclocks.html REV. A NOVEMBER 7, 2003

Integrated

Circuit

Systems, Inc.

ICS84021

260MHZ, CRYSTAL-TO-LVCMOS / LVTTL

FREQUENCY SYNTHESIZER

TABLE 3A. PARALLEL AND SERIAL MODE FUNCTION TABLE

stupnI snoitidnoC

RMDAOL_PnMNDAOL_SKCOLC_SATAD_S

HX XXX X X .WOLstuptuosecroF.teseR

LL ataDataDX X X MehtotyltceriddessapstupniNdnaM

noataD

.WOLdecroftuptuoTSET.redividtuptuoNdnaredivid

L↑ataDataDL X X dedaolsniamerdnasretsigertupniotnidehctal

siataD

.sruccotnevelairesalitnuronoitisnartWOLtxenlitnu

LH XXL ↑ataD noatadhtiwdedaolsiretsigertfihS.edomtupnilaireS

.KCOLC_SfoegdegnisirhcaenoATAD_S

LH XX↑LataD ehtotdessaperaretsigertfihsehtfostnetnoC

.redividtuptuoNdn

aredividM

LH XX↓LataD.dehctaleraseulavredividtuptuoNdnaredividM

LH XXL X X .sretsigertfihstceffatonodtupnilairesrolellar

LH XXH ↑ataD.dekcolcsitisaredividMotyltceriddessapATAD_S

WOL=L:ETON

HGIH=H

eract'noD=X

↑noitisnartegdegnisiR=

↓noitisnartegdegnillaF=

TABLE 3B. PROGRAMMABLE VCO FREQUENCY FUNCTION TABLE (NOTE 1)

ycneuqerFOCV

)zHM( ediviDM 6528214623618421

8M7M6M5M4M3M2M1M0M

52652 000011001

• • •••••••••

00782 0000 11100

• • •••••••••

57713 0000 11111

ycneuqerftupniKLC_TSETrolatsyrcotdnopserrocse

icneuqerfgnitluserehtdnaseulavedividMesehT:1ETON

.zHM52fo

TABLE 2. PIN CHARACTERISTICS

lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU

ecnaticapaCtupnI 4Fp

ecnaticapaCnoitapissiDrewoP

)tuptuorep(

ADD

ODD

V564.3=51Fp

ADD

V,V564.3=

ODD

V526.2=51Fp

ADD

V,V564.3=

ODD

V98.1=02Fp

PULLUP

rotsiseRpulluPtupnI 15KΩ

NWODLLUP

rotsiseRnwodlluPtupnI 15KΩ

84021AY www.icst.com/products/hiperclocks.html REV. A NOVEMBER 7, 2003

Integrated

Circuit

Systems, Inc.

ICS84021

260MHZ, CRYSTAL-TO-LVCMOS / LVTTL

FREQUENCY SYNTHESIZER

TABLE 3C. PROGRAMMABLE OUTPUT DIVIDER FUNCTION TABLE (PLL ENABLED)

TABLE 3E. OUTPUT ENABLE & CLOCK ENABLE FUNCTION TABLE

stupnIlortnoCtuptuO

0EO1EO0Q1Q

00 Z-iHZ-iH

01 Z-iHdelbanE

10 delbanEZ-iH

11 delbanEdelbanE

TABLE 3D. COMMONLY USED CONFIGURATION FUNCTION TABLE

tupnI )zHM(ycneuqerFtuptuO

)zHM(latsyrCeulaVrediviDMeulaVrediviDN

44.91234 25.551

52135.91234 52.651

52524 52.651

52525 521

05.52523 05.212

05.52524 573.951

05.52526 52.601

88.83614 25.551

stupnI eulaVrediviDN )zHM(ycneuqerFtuptuO

1N0NmuminiMmumixaM

00 3 7.602062

01 4 551591

10 5 421651

11 6 3.301031

84021AY www.icst.com/products/hiperclocks.html REV. A NOVEMBER 7, 2003

Integrated

Circuit

Systems, Inc.

ICS84021

260MHZ, CRYSTAL-TO-LVCMOS / LVTTL

FREQUENCY SYNTHESIZER

TABLE 4A. POWER SUPPLY DC CHARACTERISTICS, VDD=VDDA=3.3V±5%, VDDO=3.3V±5%, 2.5V±5% OR 1.8V±5%, TA=0°C TO 70°C

lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU

egatloVylppuSeroC 531.33.3564.3V

ADD

egatloVylppuSgolanA 531.33.3564.3V

ODD

egatloVylppuStuptuO

531.33.3564.3V

573.25.2526.2V

17.18.198.1V

tnerruCylppuSrewoP 041Am

ADD

tnerruCylppuSgolanA 52Am

ODD

tnerruCylppuStuptuO 5Am

ABSOLUTE MAXIMUM RATINGS

Supply Voltage, VDD 4.6V

Inputs, VI-0.5V to VDD + 0.5 V

Outputs, VO-0.5V to VDDO + 0.5V

Package Thermal Impedance, θJA 47.9°C/W (0 lfpm)

Storage Temperature, TSTG -65°C to 150°C

NOTE: Stresses beyond those listed under Absolute

Maximum Ratings may cause permanent damage to the

device. These ratings are stress specifications only. Functional

operation of product at these conditions or any conditions

beyond those listed in the

DC Characteristics

AC Charac-

teristics

is not implied. Exposure to absolute maximum rating

conditions for extended periods may affect product reliability.

84021AY www.icst.com/products/hiperclocks.html REV. A NOVEMBER 7, 2003

Integrated

Circuit

Systems, Inc.

ICS84021

260MHZ, CRYSTAL-TO-LVCMOS / LVTTL

FREQUENCY SYNTHESIZER

TABLE 4B. LVCMOS / LVTTL DC CHARACTERISTICS,VDD=VDDA=3.3V±5%,

VDDO=3.3V±5%, 2.5V±5% OR 1.8V±5%, TA=0°C TO 70°C

lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU

tupnI

egatloVhgiH

,RM,LES_LATX,LES_OCV

,ATAD_S,DAOL_Pn,DAOL_S

,1EO,0EO,KCOLC_S

8M:0M,1N:0N

3.0+V

KLC_TSET2V

3.0+V

tupnI

egatloVwoL

,RM,LES_LATX,LES_OCV

,ATAD_S,DAOL_Pn,DAOL_S

,1EO,0EO,KCOLC_S

8M:0M,1N:0N

3.0-8.0V

KLC_TSET3.0-3

.1V

tupnI

tnerruChgiH

,RM,1N,0N,8M-6M,4M-0M

,KLC_TSET,KCOLC_S

DAOL_Pn,DAOL_S,ATAD_S

V564.3=051Aµ

,1EO,0EO,5M

LES_OCV,LES_LATX V

V564.3=5Aµ

tupnI

tnerruCwoL

,RM,1N,0N,8M-6M,4M-0M

,KLC_TSET,KCOLC_S

DAOL_Pn,DAOL_S,ATAD_S

,V564.3=

V0= 5-Aµ

,1EO,0EO,5M

LES_OCV,LES_LATX

,V564.3=

V0= 051-Aµ

1ETON;egatloVhgiHtuptuO

ODD

%5±V3.3=6.2V

ODD

%5±V5.2=8.1V

ODD

%5±V8.1=V

ODD

3.0-V

1ETON;egatloVwoLtuptuO

ODD

%5±V3.3=5.0V

ODD

%5±V5.2=5.0V

ODD

%5±V8.1=4.0V

NOTE 1: Outputs terminated with 50Ω to VDDO/2. See

Parameter Measurement Section,

“Load Test Circuit Diagrams”.

TABLE 5. INPUT FREQUENCY CHARACTERISTICS, VDD = VDDA = VDDO = 3.3V±5%, TA = 0°C TO 70°C

lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU

ycneuqerFtupnI

1ETON;KLC_TSET4104zHM

1ETON;2LATX,1LATX4104zHM

KCOLC_S 05zHM

nihtiwetarepootOCVehtroftesebtsumeula

vMeht,egnarycneuqerfKLC_TSETdnalatsyrctupniehtroF:1ETON

54eraMfoseulavdilav,zHM41foycneuqerftupnimumin

imehtgnisU.egnarzHM087otzHM026eht ≤M≤.55

61eraMfoseulavdilav,zHM04foycneuqerfmumixamehtgnisU ≤M≤.91

TABLE 6. CRYSTAL CHARACTERISTICS

retemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU

noitallicsOfoedoM latnemadnuF

ycneuqerF 4104zHM

)RSE(ecnatsiseR

seireStnelaviuqE 05 Ω

C(ecnaticapaCtnuhS

)7Fp

84021AY www.icst.com/products/hiperclocks.html REV. A NOVEMBER 7, 2003

Integrated

Circuit

Systems, Inc.

ICS84021

260MHZ, CRYSTAL-TO-LVCMOS / LVTTL

FREQUENCY SYNTHESIZER

lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU

TUO

ycneuqerFtuptuO 3.301062zHM

)rep(tij1ETON;SMR,rettiJdoireP

N÷34.68sp

N÷43.48sp

N÷52.47sp

N÷6921sp

)o(ks3,2ETON;wekStuptuO 09sp

emiTllaF/esiRtuptuO%08ot%02003008sp

emiTputeS

DAOL_PnotN,M5sn

KCOLC_SotATAD_S5sn

DAOL_SotKCOLC_S5sn

emiTdloH

DAOL_PnotN,M5sn

KCOLC_SotATAD_S5sn

DAOL_SotKCOLC_S5sn

cdoelcyCytuDtuptuO 5455%

KCOL

emiTkcoLLLP 1sm

.noitcesnoitamrofnItnemerusaeMretemaraPeeS

.stupniLATXgnisuecnamrofreprettiJ:1ETON

Vtaderu

saeM.snoitidnocdaollauqehtiwdnaegatlovylppusemasehttastuptuoneewtebwekssadenifeD:2ETON

ODD

.2/

.56dradnatSCEDEJhtiwecnadroccanidenifedsiretemarapsihT:3ETON

TABLE 7B. AC CHARACTERISTICS, VDD = VDDA = 3.3V±5%, VDDO = 2.5V±5%, TA = 0°C TO 70°C

lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU

TUO

ycneuqerFtuptuO 3.301062zHM

)rep(tij1ETON;SMR,rettiJdoireP

N÷35.701sp

N÷43.47sp

N÷51.46sp

N÷69.2161sp

)o(ks3,2ETON;wekStuptuO 001sp

emiTllaF/esiRtuptuO%08ot%02003008sp

emiTputeS

DAOL_PnotN,M5sn

KCOLC_SotATAD_S5sn

DAOL_SotKCOLC_S5sn

emiTdloH

DAOL_PnotN,M5sn

KCOLC_SotATAD_S5sn

DAOL_SotKCOLC_S5sn

cdoelcyCytuDtuptuO 5455%

KCOL

emiTkcoLLLP 1sm

.noitcesnoitamrofnItnemerusaeMretemaraPeeS

.stupniLATXgnisuecnamrofreprettiJ:1ETON

Vtaderu

saeM.snoitidnocdaollauqehtiwdnaegatlovylppusemasehttastuptuoneewtebwekssadenifeD:2ETON

ODD

.2/

.56dradnatSCEDEJhtiwecnadroccanidenifedsiretemarapsihT:3ETON

TABLE 7A. AC CHARACTERISTICS, VDD = VDDA = VDDO = 3.3V±5%, TA = 0°C TO 70°C

84021AY www.icst.com/products/hiperclocks.html REV. A NOVEMBER 7, 2003

Integrated

Circuit

Systems, Inc.

ICS84021

260MHZ, CRYSTAL-TO-LVCMOS / LVTTL

FREQUENCY SYNTHESIZER

TABLE 7C. AC CHARACTERISTICS, VDD = VDDA = 3.3V±5%, VDDO = 1.8V±5%, TA = 0°C TO 70°C

lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU

TUO

ycneuqerFtuptuO 3.301062zHM

)rep(tij1ETON;SMR,rettiJdoireP

N÷38.68sp

N÷45.48sp

N÷52.46sp

N÷65.801sp

)o(ks3,2ETON;wekStuptuO 021sp

emiTllaF/esiRtuptuO%08ot%02003008sp

emiTputeS

DAOL_PnotN,M5sn

KCOLC_SotATAD_S5sn

DAOL_SotKCOLC_S5sn

emiTdloH

DAOL_PnotN,M5sn

KCOLC_SotATAD_S5sn

DAOL_SotKCOLC_S5sn

cdoelcyCytuDtuptuO 2485%

KCOL

emiTkcoLLLP 1sm

.noitcesnoitamrofnItnemerusaeMretemaraPeeS

.stupniLATXgnisuecnamrofreprettiJ:1ETON

Vtaderu

saeM.snoitidnocdaollauqehtiwdnaegatlovylppusemasehttastuptuoneewtebwekssadenifeD:2ETON

ODD

.2/

.56dradnatSCEDEJhtiwecnadroccanidenifedsiretemarapsihT:3ETON

84021AY www.icst.com/products/hiperclocks.html REV. A NOVEMBER 7, 2003

Integrated

Circuit

Systems, Inc.

ICS84021

260MHZ, CRYSTAL-TO-LVCMOS / LVTTL

FREQUENCY SYNTHESIZER

PARAMETER MEASUREMENT INFORMATION

SCOPE

LVCMOS

VDD, VDDA, VDDO = 1.65V±5%

GND = -1.65V±5%

OUTPUT RISE/FALL TIME

PERIOD JITTER

3.3V/2.5V OUTPUT LOAD AC TEST CIRCUIT

3.3V/1.8V OUTPUT LOAD AC TEST CIRCUIT

3.3V OUTPUT LOAD AC TEST CIRCUIT

OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD

VOH

VREF

VOL

Mean Period

(First edge after trigger)

Reference Point

(Trigger Edge)

1σ contains 68.26% of all measurements

2σ contains 95.4% of all measurements

3σ contains 99.73% of all measurements

4σ contains 99.99366% of all measurements

6σ contains (100-1.973x10-7)% of all measurements

Histogram

sk(o)

DDO

Q0, Q1

Pulse Width

tPERIOD

tPW

tPERIOD

odc =

DDO

SCOPE

LVCMOS

2.05V±5%

GND = -1.25V±5%

VDD,

VDDA

VDDO

1.25V±5%

OUTPUT SKEW

Clock

Outputs

20%

80% 80%

20%

tRtF

SCOPE

LVCMOS

2.4V±5%

GND = -0.9V±5%

VDD,

VDDA

VDDO

0.9V±5%

84021AY www.icst.com/products/hiperclocks.html REV. A NOVEMBER 7, 2003

Integrated

Circuit

Systems, Inc.

ICS84021

260MHZ, CRYSTAL-TO-LVCMOS / LVTTL

FREQUENCY SYNTHESIZER

CRYSTAL INPUT INTERFACE

The ICS84021 has been characterized with 18pF parallel

resonant crystals. The capacitor values, C1 and C2, shown

Figure 3

below were determined using a 25MHz, 18pF

Figure 3. CRYSTAL INPUt INTERFACE

parallel resonant crystal and were chosen to minimize the

ppm error. The optimum C1 and C2 values can be slightly

adjusted for different board layouts.

APPLICATION INFORMATION

As in any high speed analog circuitry, the power supply pins

are vulnerable to random noise. The ICS84021 provides

separate power supplies to isolate any high switching

noise from the outputs to the internal PLL. VDD, VDDA, and VDDO

should be individually connected to the power supply

plane through vias, and bypass capacitors should be

used for each pin. To achieve optimum jitter performance,

power supply isolation is required.

Figure 2

illustrates how

a 24Ω resistor along with a 10µF and a .01µF bypass

capacitor should be connected to each VDDA pin. FIGURE 2. POWER SUPPLY FILTERING

24Ω

VDDA

10µF

.01µF

3.3V

.01µF

VDD

POWER SUPPLY FILTERING T ECHNIQUES

22p

18pF Parallel Cry stal

22p

XTA L2

XTA L1

84021AY www.icst.com/products/hiperclocks.html REV. A NOVEMBER 7, 2003

Integrated

Circuit

Systems, Inc.

ICS84021

260MHZ, CRYSTAL-TO-LVCMOS / LVTTL

FREQUENCY SYNTHESIZER

RELIABILITY INFORMATION

TRANSISTOR COUNT

The transistor count for ICS84021 is: 4325

TABLE 8. θJAVS. AIR FLOW TABLE FOR 32 LEAD LQFP

θθ

θJA by Velocity (Linear Feet per Minute)

0 200 500

Single-Layer PCB, JEDEC Standard Test Boards 67.8°C/W 55.9°C/W 50.1°C/W

Multi-Layer PCB, JEDEC Standard Test Boards 47.9°C/W 42.1°C/W 39.4°C/W

NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.

84021AY www.icst.com/products/hiperclocks.html REV. A NOVEMBER 7, 2003

Integrated

Circuit

Systems, Inc.

ICS84021

260MHZ, CRYSTAL-TO-LVCMOS / LVTTL

FREQUENCY SYNTHESIZER

PACKAGE OUTLINE - Y SUFFIX FOR 32 LEAD LQFP

TABLE 9. PACKAGE DIMENSIONS

Reference Document: JEDEC Publication 95, MS-026

NOITAIRAVCEDEJ

SRETEMILLIMNISNOISNEMIDLLA

LOBMYS

ABB

MUMINIMLANIMONMUMIXAM

N23

A----06.1

1A 50.0--51.0

2A 53.104.154.1

b03.073.054.0

c90.0--02.0

DCISAB00.9

1D CISAB00.7

2D .feR06.5

ECISAB00.9

1E CISAB00.7

2E .feR06.5

eCISAB08.0

L54.006.057.

θθ

θθ 0

-- 7

ccc ----01.0

84021AY www.icst.com/products/hiperclocks.html REV. A NOVEMBER 7, 2003

Integrated

Circuit

Systems, Inc.

ICS84021

260MHZ, CRYSTAL-TO-LVCMOS / LVTTL

FREQUENCY SYNTHESIZER

TABLE 10. ORDERING INFORMATION

While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use or

for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal

commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recom-

mended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use

in life support devices or critical medical instruments.

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TYA12048SCIYA12

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