STP60NS04ZB N-channel clamped - 10m - 60A - TO-220 Fully protected Mesh OverlayTM Power MOSFET General features Type VDSS RDS(on) ID STP60NS04ZB Clamped < 0.015 60A 100% avalanche tested Low capacitance and gate charge 175 C maximum junction temperature 3 1 2 TO-220 Description This fully clamped Power MOSFET is produced by using the latest advanced Company's Mesh Overlay process which is based on a novel strip layout. The inherent benefits of the new technology coupled with the extra clamping capabilities make this product particularly suitable for the harshest operation conditions such as those encountered in the automotive environment. Any other application requiring extra ruggedness is also recommended. Internal schematic diagram Applications Switching application Order codes Part number Marking Package Packaging STP60NS04ZB P60NS04ZB TO-220 Tube October 2006 Rev 2 1/13 www.st.com 13 Contents STP60NS04ZB Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) ............................ 6 3 Test circuit 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2/13 ................................................ 9 STP60NS04ZB 1 Electrical ratings Electrical ratings Table 1. Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage (VGS = 0) Clamped V VGS Gate- source voltage Clamped V ID Drain current (continuous) at TC = 25C 60 A ID Drain current (continuous) at TC = 100C 42 A IDG Drain gate current (continuous) 50 mA IGS Gate source current (continuous) 50 mA Drain current (pulsed) 240 A Total dissipation at TC = 25C 150 W Derating factor 1 W/C VESD(G-S) Gate-source ESD (HBM - C = 100pF, R=1.5 k) 6 KV VESD(G-D) Gate-drain ESD (HBM - C = 100pF, R=1.5 k) 4 KV VESD(D-S) Drain-source ESD (HBM - C = 100pF, R=1.5 k) 4 KV -65 to 175 C IDM (1) Ptot Tstg Tj Storage temperature Max. operating junction temperature 1. Pulse width limited by safe operating area. Table 2. Thermal data Rthj-case Thermal resistance junction-case max Rthj-amb TJ Symbol 1 C/W Thermal resistance junction-ambient max 62.5 C/W Maximum lead temperature for soldering purpose 300 C Parameter Max Value Unit IAR Avalanche current, repetitive or not-repetitive (pulse width limited by Tj max) 60 A EAS Single pulse avalanche energy (starting Tj = 25 C, ID = IAR, VDD = 30 V) 400 mJ 3/13 Electrical characteristics 2 STP60NS04ZB Electrical characteristics (TCASE=25C unless otherwise specified) Table 3. On/off states Symbol Parameter V(BR)DSS Drain-source breakdown voltage ID = 1mA, VGS =0 -40 < Tj < 175C IDSS Zero gate voltage drain current (VGS = 0) VDS = 16V; TJ =150C VDS = 16V; TJ =175C 50 100 A A IGSS Gate-body leakage current (VDS = 0) VGS = 10V;Tj =175C VGS = 16V;Tj =175C 50 150 A A VGSS Gate-source breakdown voltage IGS = 100A 18 VGS(th) Gate threshold voltage VDS = VGS, ID = 1mA -40 < TJ < 150C 1.7 RDS(on) Static drain-source on resistance VGS = 10V, ID = 30A VGS = 16V, ID = 30A Table 4. Symbol Test conditions Typ. Max. 33 Unit V V 3 4.2 V 11 10 15 14 m m Min. Typ. Max. Unit 20 40 Dynamic Parameter Test conditions gfs (1) Forward transconductance VDS= 15V, ID=30A Ciss Coss Crss Input capacitance Output capacitance Reverse transfer capacitance VDS = 25V, f = 1MHz, VGS = 0 1700 800 190 2100 1000 240 pF pF pF tr(Voff) tf tc Turn-on delay time Fall time Cross-over time Vclamp = 30V, ID = 60A RG = 4.7 VGS = 10V (see Figure 14) 60 45 100 75 60 130 ns ns ns Total gate charge Gate-source charge Gate-drain charge VDD = 18V, ID = 60A, VGS = 10V, RG = 4.7 (see Figure 15) 48 13 16 42 nC nC nC Qg Qgs Qgd 1. Pulsed: Pulse duration = 300 s, duty cycle 1.5 %. 4/13 Min. S STP60NS04ZB Electrical characteristics Table 5. Symbol Source drain diode Parameter ISDM (1) Source-drain current Source-drain current (pulsed) VSD (2) Forward on voltage ISD trr Qrr IRRM Test conditions Min. Typ. ISD = 60A, VGS = 0 Reverse recovery time ISD = 60A, di/dt = 100A/s, Reverse recovery charge VDD = 15V, Tj = 150C Reverse recovery current (see Figure 16) 50 62 2.6 Max. Unit 60 240 A A 1.5 V ns nC A 1. Pulse width limited by safe operating area. 2. Pulsed: Pulse duration = 300 s, duty cycle 1.5 % 5/13 Electrical characteristics STP60NS04ZB 2.1 Electrical characteristics (curves) Figure 1. Safe operating area Figure 2. Thermal impedance Figure 3. Output characterisics Figure 4. Transfer characteristics Figure 5. Transconductance Figure 6. Static drain-source on resistance 6/13 STP60NS04ZB Electrical characteristics Figure 7. Gate charge vs gate-source voltage Figure 8. Figure 9. Normalized gate threshold voltage vs temperature Figure 11. Source-drain diode forward characteristics Capacitance variations Figure 10. Normalized on resistance vs temperature Figure 12. Zero gate voltage drain current vs temperature 7/13 Electrical characteristics Figure 13. Normalized BVDSS vs temperature 8/13 STP60NS04ZB STP60NS04ZB 3 Test circuit Test circuit Figure 14. Switching times test circuit for resistive load Figure 15. Gate charge test circuit Figure 16. Test circuit for inductive load Figure 17. Unclamped Inductive load test switching and diode recovery times circuit Figure 18. Unclamped inductive waveform Figure 19. Switching time waveform 9/13 Package mechanical data 4 STP60NS04ZB Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com 10/13 STP60NS04ZB Package mechanical data TO-220 MECHANICAL DATA DIM. mm. MIN. TYP inch MAX. MIN. TYP. MAX. A 4.40 4.60 0.173 0.181 b 0.61 0.88 0.024 0.034 b1 1.15 1.70 0.045 0.066 c 0.49 0.70 0.019 0.027 D 15.25 15.75 0.60 0.620 E 10 10.40 0.393 0.409 e 2.40 2.70 0.094 0.106 e1 4.95 5.15 0.194 0.202 F 1.23 1.32 0.048 0.052 H1 6.20 6.60 0.244 0.256 J1 2.40 2.72 0.094 0.107 0.551 L 13 14 0.511 L1 3.50 3.93 0.137 L20 16.40 L30 0.154 0.645 28.90 1.137 oP 3.75 3.85 0.147 0.151 Q 2.65 2.95 0.104 0.116 11/13 Revision history 5 STP60NS04ZB Revision history Table 6. 12/13 Revision history Date Revision Changes 21-Jun-2004 1 Complete document 04-Oct-2006 2 New template, no content change STP60NS04ZB Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST's terms and conditions of sale. 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