Order Now Product Folder Support & Community Tools & Software Technical Documents CSD18540Q5B SLPS488B - JUNE 2014 - REVISED APRIL 2017 CSD18540Q5B 60-V, N-Channel NexFETTM Power MOSFETs 1 Features * * * * * * * 1 Product Summary Ultra-Low Qg and Qgd Low-Thermal Resistance Avalanche Rated Lead-Free Terminal Plating RoHS Compliant Halogen Free SON 5-mm x 6-mm Plastic Package TA = 25C TYPICAL VALUE Drain-to-Source Voltage 60 V Qg Gate Charge Total (10 V) 41 nC Qgd Gate Charge Gate-to-Drain RDS(on) Drain-to-Source On Resistance VGS(th) Threshold Voltage DC-DC Conversion Secondary Side Synchronous Rectifier Isolated Converter Primary Side Switch Motor Control 1.9 V QTY MEDIA PACKAGE SHIP 13-Inch Reel CSD18540Q5BT 250 7-Inch Reel SON 5.00-mm x 6.00-mm Plastic Package Tape and Reel Absolute Maximum Ratings TA = 25C VALUE UNIT VDS Drain-to-Source Voltage 60 V VGS Gate-to-Source Voltage 20 V Continuous Drain Current (Package Limited) 100 Continuous Drain Current (Silicon Limited), TC = 25C 205 8 1 D IDM 7 2 D PD 3 4 Continuous Drain Current(1) 29 Pulsed Drain Current, TA = 25C(2) 400 Power Dissipation(1) 3.8 Power Dissipation, TC = 25C 188 6 D TJ, Tstg Operating Junction, Storage Temperature 5 D EAS Avalanche Energy, Single Pulse ID = 80 A, L = 0.1 mH, RG = 25 D A A W -55 to 175 C 320 mJ (1) Typical RJA = 40C/W on a 1-in2, 2-oz Cu pad on a 0.06-in thick FR4 PCB. (2) Max RJC = 0.8C/W, pulse duration 100 s, duty cycle 1%. P0093-01 RDS(on) vs VGS Gate Charge 10 5 TC = 25C, I D = 28 A TC = 125C, I D = 28 A 4.5 VGS - Gate-to-Source Voltage (V) RDS(on) - On-State Resistance (m:) m 2500 ID G 1.8 DEVICE Top View S VGS = 10 V (1) For all available packages, see the orderable addendum at the end of the data sheet. This 1.8-m, 60-V NexFETTM power MOSFET is designed to minimize losses in power conversion applications with a SON 5-mm x 6-mm package. S nC 2.6 CSD18540Q5B 3 Description S 6.7 VGS = 4.5 V Device Information(1) 2 Applications * * * * UNIT VDS 4 3.5 3 2.5 2 1.5 1 0.5 ID = 28 A 9 VDS = 30 V 8 7 6 5 4 3 2 1 0 0 0 2 4 6 8 10 12 14 16 VGS - Gate-to-Source Voltage (V) 18 20 D007 0 5 10 15 20 25 30 Qg - Gate Charge (nC) 35 40 45 D004 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. CSD18540Q5B SLPS488B - JUNE 2014 - REVISED APRIL 2017 www.ti.com Table of Contents 1 2 3 4 5 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Specifications......................................................... 1 1 1 2 3 5.1 Electrical Characteristics........................................... 3 5.2 Thermal Information .................................................. 3 5.3 Typical MOSFET Characteristics.............................. 4 6 Device and Documentation Support.................... 7 6.1 Receiving Notification of Documentation Updates.... 7 6.2 6.3 6.4 6.5 7 Community Resources.............................................. Trademarks ............................................................... Electrostatic Discharge Caution ................................ Glossary .................................................................... 7 7 7 7 Mechanical, Packaging, and Orderable Information ............................................................. 8 7.1 7.2 7.3 7.4 Q5B Package Dimensions ........................................ 8 Recommended PCB Pattern..................................... 9 Recommended Stencil Pattern ................................. 9 Q5B Tape and Reel Information ............................. 10 4 Revision History Changes from Revision A (June 2016) to Revision B * Page Corrected package size typo in the Description section......................................................................................................... 1 Changes from Original (June 2014) to Revision A Page * Updated ID values. ................................................................................................................................................................. 1 * Updated PD values. ............................................................................................................................................................... 1 * Increased maximum temperature to 175C. .......................................................................................................................... 1 * Updated Figure 2.................................................................................................................................................................... 5 * Changed Figure 6 to extend temperature to 175C. .............................................................................................................. 5 * Changed Figure 8 to extend temperature to 175C. .............................................................................................................. 6 * Replotted Figure 10 using 175C data. .................................................................................................................................. 6 * Changed Figure 12 to extend temperature to 175C. ........................................................................................................... 6 * Added Receiving Notification of Documentation Updates and Community Resources to Device and Documentation Support section. ..................................................................................................................................................................... 7 * Updated the mechanical drawing. .......................................................................................................................................... 8 2 Submit Documentation Feedback Copyright (c) 2014-2017, Texas Instruments Incorporated Product Folder Links: CSD18540Q5B CSD18540Q5B www.ti.com SLPS488B - JUNE 2014 - REVISED APRIL 2017 5 Specifications 5.1 Electrical Characteristics TA = 25C (unless otherwise stated) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT STATIC CHARACTERISTICS BVDSS Drain-to-source voltage VGS = 0 V, ID = 250 A IDSS Drain-to-source leakage current VGS = 0 V, VDS = 48 V 1 A IGSS Gate-to-source leakage current VDS = 0 V, VGS = 20 V 100 nA VGS(th) Gate-to-source threshold voltage VDS = VGS, I = 250 A V RDS(on) Drain-to-source on resistance gfs Transconductance 60 1.5 V 1.9 2.3 VGS = 4.5 V, ID = 28 A 2.6 3.3 VGS = 10 V, ID = 28 A 1.8 2.2 VDS = 6 V, ID = 28 A 116 m S DYNAMIC CHARACTERISTICS Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance RG Series gate resistance Qg Gate charge total (4.5 V) Qg Gate charge total (10 V) Qgd Gate charge gate-to-drain Qgs Gate charge gate-to-source Qg(th) Gate charge at Vth Qoss Output charge td(on) VGS = 0 V, VDS = 30 V, = 1 MHz VDS = 30 V, IDD = 28 A 3250 4230 pF 622 808 pF 15 20 pF 0.8 1.6 20 26 nC 41 53 nC 6.7 nC 8.8 nC 6.3 nC 83 nC Turnon delay time 6 ns tr Rise time 9 ns td(off) Turnoff delay time 20 ns tf Fall time 3 ns VDS = 30 V, VGS = 0 V VDS = 30 V, VGS = 10 V, IDS = 28 A, RG = 0 DIODE CHARACTERISTICS VSD Diode forward voltage Qrr Reverse recovery charge trr Reverse recovery time ISD = 28 A, VGS = 0 V 0.8 VDS= 30 V, IF = 28 A, di/dt = 300 A/s 145 1 nC V 82 ns 5.2 Thermal Information TA = 25C (unless otherwise stated) THERMAL METRIC MIN TYP MAX RJC Junction-to-case thermal resistance (1) 0.8 RJA Junction-to-ambient thermal resistance (1) (2) 50 (1) (2) UNIT C/W RJC is determined with the device mounted on a 1-in2 (6.45-cm2), 2-oz (0.071-mm) thick Cu pad on a 1.5-in x 1.5-in (3.81-cm x 3.81-cm), 0.06-in (1.52-mm) thick FR4 PCB. RJC is specified by design, whereas RJA is determined by the user's board design. Device mounted on FR4 material with 1-in2 (6.45-cm2), 2-oz (0.071-mm) thick Cu. Submit Documentation Feedback Copyright (c) 2014-2017, Texas Instruments Incorporated Product Folder Links: CSD18540Q5B 3 CSD18540Q5B SLPS488B - JUNE 2014 - REVISED APRIL 2017 GATE www.ti.com GATE Source N-Chan 5x6 QFN TTA MIN Rev3 N-Chan 5x6 QFN TTA MAX Rev3 Max RJA = 50C/W when mounted on 1 in2 (6.45 cm2) of 2-oz (0.071-mm) thick Cu. Source Max RJA = 125C/W when mounted on a minimum pad area of 2-oz (0.071-mm) thick Cu. DRAIN DRAIN M0137-02 M0137-01 5.3 Typical MOSFET Characteristics TA = 25C (unless otherwise stated) Figure 1. Transient Thermal Impedance 4 Submit Documentation Feedback Copyright (c) 2014-2017, Texas Instruments Incorporated Product Folder Links: CSD18540Q5B CSD18540Q5B www.ti.com SLPS488B - JUNE 2014 - REVISED APRIL 2017 Typical MOSFET Characteristics (continued) 200 200 180 180 IDS - Drain-to-Source Current (A) IDS - Drain-to-Source Current (A) TA = 25C (unless otherwise stated) 160 140 120 100 80 60 40 VGS = 4.5 V VGS = 6.0 V VGS = 10 V 20 TC = 125C TC = 25C TC = -55C 160 140 120 100 80 60 40 20 0 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 VDS - Drain-to-Source Voltage (V) 0.9 1 1 1.5 2 2.5 3 3.5 4 VGS - Gate-to-Source Voltage (V) D002 4.5 5 D003 VDS = 5 V Figure 2. Saturation Characteristics Figure 3. Transfer Characteristics 100000 Ciss = Cgd + Cgs Coss = Cds + Cgd Crss = Cgd 9 8 10000 C - Capacitance (pF) VGS - Gate-to-Source Voltage (V) 10 7 6 5 4 3 1000 100 2 10 1 0 1 0 5 10 15 20 25 30 Qg - Gate Charge (nC) ID = 28 A 35 40 45 0 10 D004 60 D005 Figure 5. Capacitance 2.5 5 2.3 4.5 RDS(on) - On-State Resistance (m:) VGS(th) - Threshold Voltage (V) 50 VDS = 30 V Figure 4. Gate Charge 2.1 1.9 1.7 1.5 1.3 1.1 0.9 0.7 -75 20 30 40 VDS - Drain-to-Source Voltage (V) TC = 25C, I D = 28 A TC = 125C, I D = 28 A 4 3.5 3 2.5 2 1.5 1 0.5 0 -50 -25 0 25 50 75 100 125 150 175 200 TC - Case Temperature (C) D006 0 2 4 6 8 10 12 14 16 VGS - Gate-to-Source Voltage (V) 18 20 D007 ID = 250 A Figure 6. Threshold Voltage vs Temperature Figure 7. On-State Resistance vs Gate-to-Source Voltage Submit Documentation Feedback Copyright (c) 2014-2017, Texas Instruments Incorporated Product Folder Links: CSD18540Q5B 5 CSD18540Q5B SLPS488B - JUNE 2014 - REVISED APRIL 2017 www.ti.com Typical MOSFET Characteristics (continued) TA = 25C (unless otherwise stated) 100 2 VGS = 4.5 V VGS = 10 V ISD - Source-to-Drain Current (A) Normalized On-State Resistance 2.2 1.8 1.6 1.4 1.2 1 0.8 0.6 0.4 -75 TC = 25C TC = 125C 10 1 0.1 0.01 0.001 0.0001 -50 -25 0 0 25 50 75 100 125 150 175 200 TC - Case Temperature (C) D008 0.2 0.4 0.6 0.8 VSD - Source-to-Drain Voltage (V) 1 D009 ID = 28 A Figure 8. Normalized On-State Resistance vs Temperature Figure 9. Typical Diode Forward Voltage 100 IAV - Peak Avalanche Current (A) IDS - Drain-to-Source Current (A) 5000 1000 100 10 1 100 ms 10 ms 0.1 0.1 1 ms 100 s 10 s 1 10 VDS - Drain-to-Source Voltage (V) 100 TC = 25q C TC = 125q C 10 0.01 0.1 TAV - Time in Avalanche (ms) D010 1 D011 Single Pulse, Max RJC = 0.8C/W Figure 10. Maximum Safe Operating Area Figure 11. Single Pulse Unclamped Inductive Switching IDS - Drain-to-Source Current (A) 120 100 80 60 40 20 0 -50 -25 0 25 50 75 100 125 TC - Case Temperature (C) 150 175 200 D012 Figure 12. Maximum Drain Current vs Temperature 6 Submit Documentation Feedback Copyright (c) 2014-2017, Texas Instruments Incorporated Product Folder Links: CSD18540Q5B CSD18540Q5B www.ti.com SLPS488B - JUNE 2014 - REVISED APRIL 2017 6 Device and Documentation Support 6.1 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 6.2 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2ETM Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 6.3 Trademarks NexFET, E2E are trademarks of Texas Instruments. All other trademarks are the property of their respective owners. 6.4 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 6.5 Glossary SLYZ022 -- TI Glossary. This glossary lists and explains terms, acronyms, and definitions. Submit Documentation Feedback Copyright (c) 2014-2017, Texas Instruments Incorporated Product Folder Links: CSD18540Q5B 7 CSD18540Q5B SLPS488B - JUNE 2014 - REVISED APRIL 2017 www.ti.com 7 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 7.1 Q5B Package Dimensions K H D3 6 D1 4 5 e 6 4 3 3 5 D2 7 2 E 2 7 * 1 8 1 8 L b (8x) c1 E1 d1 Top View d2 Bottom View Side View * Front View DIM MILLIMETERS MIN NOM MAX A 0.80 1.00 1.05 b 0.36 0.41 0.46 c 0.15 0.20 0.25 c1 0.15 0.20 0.25 c2 0.20 0.25 0.30 D1 4.90 5.00 5.10 D2 4.12 4.22 4.32 D3 3.90 4.00 4.10 d 0.20 0.25 0.30 d1 0.085 TYP d2 0.319 0.369 0.419 E 4.90 5.00 5.10 E1 5.90 6.00 6.10 E2 3.48 3.58 3.68 e H 0.36 0.46 0.56 L 0.46 0.56 0.66 L1 0.57 0.67 0.77 0 -- -- K 8 1.27 TYP 1.40 TYP Submit Documentation Feedback Copyright (c) 2014-2017, Texas Instruments Incorporated Product Folder Links: CSD18540Q5B CSD18540Q5B www.ti.com SLPS488B - JUNE 2014 - REVISED APRIL 2017 7.2 Recommended PCB Pattern For recommended circuit layout for PCB designs, see Reducing Ringing Through PCB Layout Techniques (SLPA005). 7.3 Recommended Stencil Pattern (0.020) 0.508 x4 (0.011) 0.286 (0.014) 0.350 (0.022) 0.562 x 4 (0.029) 0.746 x 8 2.186 (0.086) 4.318 (0.170) 0.300 (0.012) 1.270 (0.050) (0.030) 0.766 (0.051) 1.294 x8 (0.060) 1.525 1.270 (0.050) (0.042) 1.072 (0.259) 6.586 Submit Documentation Feedback Copyright (c) 2014-2017, Texas Instruments Incorporated Product Folder Links: CSD18540Q5B 9 CSD18540Q5B SLPS488B - JUNE 2014 - REVISED APRIL 2017 www.ti.com K0 4.00 0.10 (See Note 1) 0.30 0.05 2.00 0.05 +0.10 -0.00 12.00 0.30 O 1.50 1.75 0.10 7.4 Q5B Tape and Reel Information 5.50 0.05 B0 R 0.30 MAX A0 8.00 0.10 O 1.50 MIN R 0.30 TYP A0 = 6.50 0.10 B0 = 5.30 0.10 K0 = 1.40 0.10 M0138-01 Notes: 1. 10-sprocket hole-pitch cumulative tolerance 0.2. 2. Camber not to exceed 1 mm in 100 mm, noncumulative over 250 mm. 3. Material: black static-dissipative polystyrene. 4. All dimensions are in mm (unless otherwise specified). 5. A0 and B0 measured on a plane 0.3 mm above the bottom of the pocket. 10 Submit Documentation Feedback Copyright (c) 2014-2017, Texas Instruments Incorporated Product Folder Links: CSD18540Q5B PACKAGE OPTION ADDENDUM www.ti.com 29-Jun-2018 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (C) Device Marking (4/5) CSD18540Q5B ACTIVE VSON-CLIP DNK 8 2500 Pb-Free (RoHS Exempt) CU NIPDAU | CU SN Level-1-260C-UNLIM -55 to 150 CSD18540 CSD18540Q5BT ACTIVE VSON-CLIP DNK 8 250 Pb-Free (RoHS Exempt) CU NIPDAU | CU SN Level-1-260C-UNLIM -55 to 175 CSD18540 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 29-Jun-2018 Addendum-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated (TI) reserves the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. TI's published terms of sale for semiconductor products (http://www.ti.com/sc/docs/stdterms.htm) apply to the sale of packaged integrated circuit products that TI has qualified and released to market. Additional terms may apply to the use or sale of other types of TI products and services. Reproduction of significant portions of TI information in TI data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such reproduced documentation. Information of third parties may be subject to additional restrictions. Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Buyers and others who are developing systems that incorporate TI products (collectively, "Designers") understand and agree that Designers remain responsible for using their independent analysis, evaluation and judgment in designing their applications and that Designers have full and exclusive responsibility to assure the safety of Designers' applications and compliance of their applications (and of all TI products used in or for Designers' applications) with all applicable regulations, laws and other applicable requirements. Designer represents that, with respect to their applications, Designer has all the necessary expertise to create and implement safeguards that (1) anticipate dangerous consequences of failures, (2) monitor failures and their consequences, and (3) lessen the likelihood of failures that might cause harm and take appropriate actions. Designer agrees that prior to using or distributing any applications that include TI products, Designer will thoroughly test such applications and the functionality of such TI products as used in such applications. TI's provision of technical, application or other design advice, quality characterization, reliability data or other services or information, including, but not limited to, reference designs and materials relating to evaluation modules, (collectively, "TI Resources") are intended to assist designers who are developing applications that incorporate TI products; by downloading, accessing or using TI Resources in any way, Designer (individually or, if Designer is acting on behalf of a company, Designer's company) agrees to use any particular TI Resource solely for this purpose and subject to the terms of this Notice. TI's provision of TI Resources does not expand or otherwise alter TI's applicable published warranties or warranty disclaimers for TI products, and no additional obligations or liabilities arise from TI providing such TI Resources. TI reserves the right to make corrections, enhancements, improvements and other changes to its TI Resources. TI has not conducted any testing other than that specifically described in the published documentation for a particular TI Resource. Designer is authorized to use, copy and modify any individual TI Resource only in connection with the development of applications that include the TI product(s) identified in such TI Resource. NO OTHER LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE TO ANY OTHER TI INTELLECTUAL PROPERTY RIGHT, AND NO LICENSE TO ANY TECHNOLOGY OR INTELLECTUAL PROPERTY RIGHT OF TI OR ANY THIRD PARTY IS GRANTED HEREIN, including but not limited to any patent right, copyright, mask work right, or other intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information regarding or referencing third-party products or services does not constitute a license to use such products or services, or a warranty or endorsement thereof. Use of TI Resources may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. TI RESOURCES ARE PROVIDED "AS IS" AND WITH ALL FAULTS. TI DISCLAIMS ALL OTHER WARRANTIES OR REPRESENTATIONS, EXPRESS OR IMPLIED, REGARDING RESOURCES OR USE THEREOF, INCLUDING BUT NOT LIMITED TO ACCURACY OR COMPLETENESS, TITLE, ANY EPIDEMIC FAILURE WARRANTY AND ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF ANY THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. TI SHALL NOT BE LIABLE FOR AND SHALL NOT DEFEND OR INDEMNIFY DESIGNER AGAINST ANY CLAIM, INCLUDING BUT NOT LIMITED TO ANY INFRINGEMENT CLAIM THAT RELATES TO OR IS BASED ON ANY COMBINATION OF PRODUCTS EVEN IF DESCRIBED IN TI RESOURCES OR OTHERWISE. IN NO EVENT SHALL TI BE LIABLE FOR ANY ACTUAL, DIRECT, SPECIAL, COLLATERAL, INDIRECT, PUNITIVE, INCIDENTAL, CONSEQUENTIAL OR EXEMPLARY DAMAGES IN CONNECTION WITH OR ARISING OUT OF TI RESOURCES OR USE THEREOF, AND REGARDLESS OF WHETHER TI HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. Unless TI has explicitly designated an individual product as meeting the requirements of a particular industry standard (e.g., ISO/TS 16949 and ISO 26262), TI is not responsible for any failure to meet such industry standard requirements. Where TI specifically promotes products as facilitating functional safety or as compliant with industry functional safety standards, such products are intended to help enable customers to design and create their own applications that meet applicable functional safety standards and requirements. Using products in an application does not by itself establish any safety features in the application. Designers must ensure compliance with safety-related requirements and standards applicable to their applications. Designer may not use any TI products in life-critical medical equipment unless authorized officers of the parties have executed a special contract specifically governing such use. Life-critical medical equipment is medical equipment where failure of such equipment would cause serious bodily injury or death (e.g., life support, pacemakers, defibrillators, heart pumps, neurostimulators, and implantables). Such equipment includes, without limitation, all medical devices identified by the U.S. Food and Drug Administration as Class III devices and equivalent classifications outside the U.S. TI may expressly designate certain products as completing a particular qualification (e.g., Q100, Military Grade, or Enhanced Product). Designers agree that it has the necessary expertise to select the product with the appropriate qualification designation for their applications and that proper product selection is at Designers' own risk. Designers are solely responsible for compliance with all legal and regulatory requirements in connection with such selection. Designer will fully indemnify TI and its representatives against any damages, costs, losses, and/or liabilities arising out of Designer's noncompliance with the terms and provisions of this Notice. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright (c) 2018, Texas Instruments Incorporated Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Texas Instruments: CSD18540Q5BT CSD18540Q5B