Features
General Features
Enhanced optical 3 lens design for optimized IrDA 
and RC performance
Operating temperature from -25°C ~ 85°C 
–   Critical parameters are guaranteed over 
temperature and supply voltage
VCC supply 2.4 to 3.6 volts 
Miniature package 
–  Height: 2.5 mm 
–  Width: 10.4 mm 
–  Depth: 2.95 mm 
Integrated remote control LED driver
Input/output interface voltage of 1.5 V
Integrated EMI shield
LED stuck-high protection
Designed to accommodate light loss with cosmetic 
windows
IEC 825-Class 1 eye safe
LED stuck high protection
Interface to various super I/O and controller devices
Lead free package
IrDA‚ Features
Fully compliant to IrDA 1.4 Physical Layer Low Power 
Specications from 9.6 kbit/s to 4.0 Mb/s  
–  Link distance up to 50 cm typically 
Complete shutdown for TxD_IrDA, RxD_IrDA and PIN 
diode
Low power consumption 
–  Low shutdown current
Remote Control Features
Wide angle and high radiant intensity
Spectrally suited to remote control transmission 
function at 940 nm typically
Typical link distance up to 14 meters (on-axis)
Description
The  HSDL-3020  is  a  new  generation  low  prole  high 
speed  enhanced  infrared  (IR)  transceiver  module  that 
provides  the  capability  of  (1)  interface  between  logic 
and IR signals for through-air, serial, half-duplex IR data 
link, and (2) IR remote control transmission operating at 
the optimum 940 nm wavelength for universal remote 
control  applications.  The  HSDL-3020  features  an  en-
hanced  3  lens  optical  package  for  optimized  IrDA  and 
RC performance.
The  module  is  fully  compliant  to  IrDA®  Physical  Layer 
speci-cation  version  1.4  low  power  from  9.6  kbit/s  to 
4.0 Mbit/s (FIR) and IEC825 Class 1 eye safety standards.
The HSDL-3020 can be shutdown completely to achieve 
very  low  power  consumption.  In  the  shutdown  mode, 
the PIN diode will be inactive and thus producing very 
little photocurrent even under very bright ambient light. 
It  is  also  designed  to  interface  to  input/output  logic 
circuits as low as 1.5 V. These features are ideal for bat-
tery operated mobile devices such as PDAs and mobile 
phones that require low power consumption.
Applications
Mobile data communication and universal remote 
control 
–  Mobile phones 
–  PDAs 
–  Webpads
HSDL-3020
IrDA® Data Compliant Low Power 4.0 Mbit/s
with Remote Control Infrared Transceiver
Data Sheet
2
Figure 1. Functional block diagram of HSDL-3020.
Figure 2. Rear view diagram with pinout.
Order Information
Part Number Packaging Type Package Quantity
HSDL-3020-021  Tape and Reel  Front Option  2500
Marking Information
The unit is marked with “7YWLL on the shield 
Y = Year 
W = Work week 
LL = Lot information
Application Support Information
The Application Engineering Group 
is available to assist you with the 
application design associated with 
HSDL-3020 infrared transceiver 
module. You can contact them 
through your local sales representa-
tives for additional details.
R3
CX6 CX7 RC_LEDC 1
RC VLED
SHIELD
RC LED
DRIVER
IOVCC
IOVCC
4
TxD_IR 5
RC_LEDA 2
R2
R1
CX3 CX4
CX5
IR VLED
CX1 CX2
VCC
IR LED
DRIVER
Rx PULSE
SHAPER
IR_LEDA 3
RxD 6
SD 7
VCC 8
TxD_RC 9
GND 10
10 89 7 6 5 4 3 2 1
3
I/O Pins Conguration Table
Pin Symbol Description I/O Type Notes
1  RC_LEDC  RC LED Cathode  Note 1 
2  RC_LEDA  RC LED Anode  Note 2 
3  IR_LEDA  IR LED Anode  Note 3 
4  IOVCC Input/Output ASIC Voltage  Note 4 
5  TxD_IR  IrDA Transmitter Data Input  Input. Active High  Note 5 
6  RxD  IrDA Receive Data  Output. Active Low  Note 6 
7  SD  Shutdown  Input. Active High  Note 7 
8  VCC Supply Voltage  Note 8 
9  TxD_RC  RC Transmitter Data Input  Input. Active High  Note 9 
10  GND  Ground  Note 10 
–  Shield  EMI Shield  Note 11
Notes:
1.  Internally connected to RC LED driver. Leave this pin unconnected.
2.  Tied through external resistor, R3, to RC Vled. Refer to the table below for recommended series resistor value.
3.  Tied through external resistor, R2, to IR Vled. Refer to the table below for recommended series resistor value.
4.  Connect to ASIC logic controller supply voltage or VCC. The voltage at this pin should be equal to or less than VCC.
5.  This pin is used to transmit serial data when SD pin is low. If held high for longer than 50 µs, the LED is turned o. Do NOT oat this pin.
6.  This pin is capable of driving a standard CMOS or TTL load. No external pull-up or pull-down resistor is required. The pin is in tri-state when 
the transceiver is in shutdown mode.
7.  Complete shutdown of IC and PIN diode. The pin is used for setting receiver bandwidth and RC drive programming mode. Refer to section on 
“Bandwidth Selection Timing” and “Remote Control Drive Modes for more information. Do NOT oat this pin.
8.  Regulated, 2.4 V to 3.6 V.
9.  Logic high turns on the RC LED. If held high longer than 50 µs, the RC LED is turned o. Do NOT oat this pin.
10.  Connect to system ground.
11,  Connect to system ground via a low inductance trace. For best performance, do not connect directly to the transceiver GND pin.
CAUTIONS: The BiCMOS inherent to the design of this component increases the component’s susceptibility
to damage from electrostatic discharge (ESD). It is advised that normal static precautions be taken in handling
and assembly of this component to prevent damage and/or degradation which may be induced by ESD.
4
Recommended Application Circuit Components
Component Recommended Value Note
R1  4.7 Ω, ± 5%, 0.25 watt for VCC ≥ 3.6 V
R2  4.7 Ω for 2.4 V ≤ VLED < 2.7 V 
6.8 Ω for 2.7 V ≤ VLED < 3 V 
10 Ω for 3 V ≤ VLED < 3.3 V 
13 Ω for 3.3 V ≤ VLED < 3.6 V 
15 Ω for 3.6 V ≤ VLED < 4.2 V 
20 Ω for 4.2 V ≤ VLED < 5 V
R3  1.8 Ω for 2.4 V ≤ VLED < 2.7 V 
2.7 Ω for 2.7 V ≤ VLED < 3 V 
3.3 Ω for 3 V ≤ VLED < 3.3 V 
3.9 Ω for 3.3 V ≤ VLED < 3.6 V 
4.7 Ω for 3.6 V ≤ VLED < 4.2 V 
6.2 Ω for 4.2 V ≤ VLED < 4.7 V 
6.8 Ω for 4.7 V ≤ VLED < 5 V
CX1, CX3, CX5, CX6  100 nF, ± 20%, X7R Ceramic  1
CX2, CX4, CX7  4.7 µF, ± 20%, Tantalum  1
Note:
1.  CX1, CX2, CX3, CX4, CX5, CX6 & CX7 must be placed within 0.7 cm of HSDL-3020 to obtain    
optimum noise immunity.
Absolute Maximum Ratings
For implementations where case to ambient thermal resistance is ≤50°C/W.
Parameter Symbol Min. Max. Units Conditions
Storage Temperature  TS -40  +100  °C
Operating Temperature  TA -25  +85  °C
LED Anode Voltage  VLEDA 0  6.5  V
Supply Voltage  VCC 0  6  V
Input Voltage: TxD, SD/Mode  VI 0  5.5  V
Input/Output Supply Voltage  IOVCC 0  6  V
RC LED Current  RC ILED 500  mA
IR LED Current  IR ILED 190  mA
5
Recommended Operating Conditions
Parameter Symbol Min. Typ. Max. Units Conditions
Operating Temperature  TA -25   +85  °C
Supply Voltage  VCC 2.4  3.6  V
Input/Output Voltage  IOVCC 1.5  3.6  V
Logic Input Voltage  Logic High  VIH IOVCC - 0.5  IOVCC V 
for TXD, SD/Mode
Logic Low  VIL 0  0.5  V
0.0090  500  For in-band signals 
≤ 115.2 kbit/s[3] 
Receiver InputLogic HighEIH mW/cm2 
Irradiance0.0225 500 0.576 Mbit/s ≤  in-band 
signals ≤ 4.0 Mbit/s[3]
Logic Low  EIL 0.3  µW/cm2 For in-band signals[3]
LED (Logic High) Current Pulse  IR_ILEDA 70  mA  IR VLED = 3.6, R = 15 Ω, 
Amplitude – SIR Mode   ≤ 20% duty cycle,  
≤ 90 µs pulse width
LED (Logic High) Current Pulse  IR_ILEDA 120  mA  IR VLED = 3.6, R = 15 Ω, 
Amplitude – MIR/FIR Mode  ≤ 25% duty cycle,  
≤ 90 µs pulse width
LED (Logic High) Current Pulse  RC_ILEDA 420  mA  RC VLED = 3.6, R = 3.9 Ω, 
Amplitude – RC Mode  ≤ 25% duty cycle,  
≤ 90 µs pulse width
Receiver Data Rate  0.0096  4.0  Mbit/s
Ambient Light  See IrDA Serial Infrared 
Physical Layer Link 
Specication, Appendix A 
for ambient levels
Note:
3.  An in-band optical signal is a pulse/sequence where the peak wavelength, lp, is dened as 850 ≤ lp ≤ 900 nm, and the pulse characteristics 
are compliant with the IrDA Serial Infrared Physical Layer Link Specication v1.4.
6
Electrical and Optical Specications
Specications (Min. & Max. values) hold over the recommended operating conditions unless otherwise noted.  Un-
specied test conditions may be anywhere in their operating range. All typical values (Typ.) are at 25°C with VCC set 
to 3.0 V and IOVCC set to 1.8 V unless otherwise noted.
Parameter Symbol Min. Typ. Max. Units Conditions
Receiver
Viewing Angle  2q1/2 30  °
Peak Sensitivity Wavelength  lP 875  nm
RxD_IrDA Output  Logic High  VOH IOVCC – 0.5  IOVCC V  IOH = -200 µA, EI ≤ 0.3 
Voltage  µW/cm2
Logic Low  VOL 0  0.4  V
RxD_IrDA Pulse Width (SIR)[4]tRPW(SIR)  1  4  µs  q1/2 ≤ 15°, CL = 9 pF
RxD_IrDA Pulse Width (MIR)[4] tRPW(MIR)  100  500  ns  q1/2 ≤ 15°, CL = 9 pF
RxD_IrDA Pulse Width (Single) (FIR)[4] tRPW(FIR)  80  175  ns  q1/2 ≤ 15°, CL = 9 pF
RxD_IrDA Pulse Width (Double) (FIR)[4] tRPW(FIR)  200  290  ns  q1/2 ≤ 15°, CL = 9 pF
RxD_IrDA Rise & Fall Times  tr, tf  40  ns  CL = 9 pF
Receiver Latency Time[5] tL 100  µs  EI = 9.0 µW/cm2
Receiver Wake Up Time[6] tRW 200  µs  EI = 10 µW/cm2
Infrared (IR) Transmitter
IR Radiant Intensity (SIR Mode)  IEH 4  mW/sr  IR_ILEDA = 70 mA, 
q1/2 ≤ 15°, TxD_IR ≥ VIH, 
TA = 25°C
IR Radiant Intensity (MIR/FIR Mode)  IEH 10  mW/sr  IR_ILEDA = 120 mA, 
q1/2 ≤ 15°, TxD_IR ≥ VIH, 
TA = 25°C
IR Viewing Angle  2q1/2 30  60  °
IR Peak Wavelength  lP 875  nm
TxD_IrDA Logic Levels  High  VIH IOVCC - 0.5  IOVCC V
Low  VIL 0  0.5  V
TxD_IrDA Input Current  High  IH 0.02  µA  VI ≥ VIH
Low  IL -0.02  µA  0 ≤ VI ≤ VIL
Wake Up Time[7] tTW 180  ns
Maximum Optical Pulse Width[8] tPW(Max)  25  50  µs
TxD Pulse Width (SIR)  tPW(SIR)  1.6  µs  tPW (TxD_IR) = 1.6 µs at 
115.2 kbit/s
TxD Pulse Width (MIR)  tPW(MIR)  217  ns  tPW (TxD_IR) = 217 ns at 
1.152 Mbit/s
TxD Pulse Width (FIR)  tPW(FIR)  125  ns  tPW (TxD_IR) = 125 ns at 
4.0 Mbit/s
TxD Rise & Fall Times (Optical)  tr, tf  600  ns  tPW (TxD_IR) = 1.6 µs at 
115.2 kbit/s
40  ns  tPW (TxD_IR) = 125 ns at 
4.0 Mbit/s
7
Electrical and Optical Specications (Cont’d.)
Parameter Symbol Min. Typ. Max. Units Conditions
IR LED Anode On-State Voltage  VON 2.5  V  IR_ILEDA = 70 mA, 
(SIR Mode)  (IR_LEDA) IR VLED = 3.6 V, R = 15 Ω, 
VI (TxD) ≥ VIH
IR LED Anode On-State Voltage  VON 1.9  V  IR_ILEDA = 120 mA, 
(MIR/FIR Mode)     (IR_LEDA)  IR VLED = 3.6 V, R = 15 Ω, 
VI(TxD_IR) ≥ VIH
Remote Control (RC) Transmitter
RC Radiant Intensity  IEH 110  mW/sr  RC_ILEDA = 420 mA, 
q1/2 ≤ 15°, TxD_RC ≥ VIH, 
TA = 25°C
RC Viewing Angle  2q1/2 30  60  °
RC Peak Wavelength  lP 940  nm
TxD_RC Logic Levels  High  VIH IOVCC - 0.5  IOVCC V
Low  VIL 0  0.5  V
TxD_RC Input Current  High  IH 0.02  1  µA  VI ≥ VIH
Low  IL -0.02  1  µA  0 ≤ VI ≤ VIL
RC LED Anode On-State Voltage  VON 2.0  V  RC_ILEDA = 420 mA, 
(RC_LEDA) RC VLED = 3.6 V, R = 3.9 Ω, 
VI(TxD_RC) ≥ VIH
Transceiver
Input Current  High  IH 0.01  1  µA  VI ≥ VIH
Low  IL -1  -0.02  1  µA  0 ≤ VI ≤ VIL
Supply Current  Shutdown  ICC1 1  µA  VSD ≥ VCC - 0.5, TA = 25°C
Idle  ICC2 2.0  2.9  mA  VI(TxD) ≤ VIL, EI = 0 
(Standby)
Active  ICC3 3.5  mA  VI(TxD) ≥ VIL, EI = 10 mW/cm2
Notes:
4.  An in-band optical signal is a pulse/sequence where the peak wavelength, lP
, is dened as 850 nm ≤ lP ≤ 900 nm, and the pulse characteris-
tics are compliant with the IrDA Serial Infrared Physical Layer Link Specication version 1.4.
5.  For in-band signals 9.6 kbit/s to 115.2 kbit/s where 9 µW/cm2 ≤ EI ≤ 500 mW/cm2.
6.  Latency is dened as the time from the last TxD_IrDA light output pulse until the receiver has recovered full sensitivity.
7.  Receiver Wake Up Time is measured from VCC power ON to valid RxD_IrDA output.
8.  Transmitter Wake Up Time is measured from VCC power ON to valid light output in response to a TxD_IrDA pulse.
9.  The Optical PW is dened as the maximum time in which the IR LED will turn on. This is to prevent the long Turn On time for the IR LED.
8
IR SIR Mode - VLED_A vs ILED
1.4
1.5
1.6
1.7
1.8
1.9
2.0
2.1
2.2
2.3
0 0.02 0.04 0.08 0.10 0.12
ILED (A)
VLED_A (V)
0.06
IR MIR/FIR Mode - VLED_A vs ILED
1.50
1.55
1.60
1.65
1.70
1.75
1.80
0.05 0.075 0.10 0.125 0.15 0.175
ILED (A)
VLED_A (V)
IR SIR Mode - Radiant Intensity vs ILED
8
12
16
18
14
10
6
4
2
0
20
0 0.02 0.04 0.06 0.08 0.10 0.12
ILED (A)
RADIANT INTENSITY (mW/sr)
IR MIR/FIR Mode - Radiant Intensity vs ILED
18
15
21
24
27
30
33
36
0.05 0.075 0.10 0.125 0.15 0.175
ILED (A)
RADIANT INTENSITY (mW/sr)
9
HSDL-3020 Package Dimensions
5.20
MOUNTING
CENTER
1.025
10.40
2.50
1.15
R2.10
5.10
1.20
1.20
3.60
RC
EMITTER
DA
EMITTER
RECEIVER
R1.10 R1.10 R1.10
2.95
12345678910
1.50
0.70
1.80
COPLANARITY
0.00 TO 0.20 mm
0.95
0.50
0.60PITCH 0.95
0.68
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
RC CATHODE
RC VLED
IR VLED
IOV
CC
TxD IR
RxD
SD
VDD
TxD RC
GND
10
HSDL-3020 Tape and Reel Dimensions
AA
D0P0
K0
B0
A0
P2
F
E
W
D1
2 ± 0.1
B
B
P1
5°(MAX.)
SECTION A-A
5°(MAX.)
SECTION B-B
T
D0
P0
10P0
K0
B0
A0P2
FE WD1
P1T
10.65 ± 0.10
SYMBOL
SPEC.
SPEC.
SYMBOL
2.95 ± 0.10 2.77 ± 0.10 4.0 ± 0.10 8.0 ± 0.10 2.4 ± 0.10 0.35 ± 0.10
1.75 ± 0.10 11.5 ± 0.10 1.55 ± 0.05 1.50 ± 0.10 24.0 ± 0.30 40.0 ± 0.20
NOTES:
1. 10 SPROCKET HOLE PITCH CUMULATIVE TOLERANCE IS ± 0.2 mm.
2. CARRIER CHAMBER SHALL BE NOT MORE THAN 1 mm PER 100 mm THROUGH A LENGTH OF 250 mm.
3. A0 AND B0 MEASURED ON A PLACE 0.3 mm ABOVE THE BOTTOM OF THE POCKET.
4. K0 MEASURED FROM A PLACE ON THE BOTTOM OF THE POCKET IN TOP SURFACE OF CARRIER.
5. POCKET POSITION RELATIVE TO SPROCKET HOLE MEASURED AS TRUE POSITION OF POCKET, NOT POCKET HOLE.
11
HSDL-3020 Moisture Proof Packaging
All HSDL-3020 options are shipped in moisture proof 
package. Once opened, moisture absorption begins.
This part is compliant to JEDEC Level 4.
Figure 3. Baking conditions chart.
Baking Conditions
If the parts are not stored in dry conditions, they must 
be baked before reow to prevent damage to the parts. 
Package Temp. Time
In reels  60°C   ≥ 48 hours
In bulk  100°C    ≥ 4 hours 
125°C    ≥ 2 hours
150°C    ≥ 1 hour
Baking should only be done once.
Recommended Storage Conditions
Storage Temperature 10°C to 30°C 
Relative Humidity  Below 60% RH
Time from Unsealing to Soldering
After removal from the bag, the parts should be sol-
dered within three days if stored at the recom-mended 
storage conditions.
UNITS IN A SEALED
MOISTURE-PROOF
PACKAGE
PACKAGE IS
OPENED (UNSEALED)
ENVIRONMENT
LESS THAN 30°C,
AND LESS THAN
60% RH
PACKAGE IS
OPENED MORE
THAN 72 HOURS
PERFORM RECOMMENDED
BAKING CONDITIONS
NO BAKING
IS NECESSARY
YES
NO
NO
YES
12
Recommended Reow Prole
Process Zone Symbol DT Maximum DT/Dtime
Heat Up  P1, R1  25°C to 160°C  4°C/s 
Solder Paste Dry  P2, R2  160°C to 200°C  0.5°C/s 
Solder Reow  P3, R3  200°C to 255°C (260°C at 10 seconds max)  4°C/s 
P3, R4  255°C to 200°C  -6°C/s 
Cool Down  P4, R5  200°C to 25°C  -6°C/s 
The  reow  prole  is  a  straight-line  representation  of 
a  nominal  temperature  prole  for  a  convective  re-
ow  solder  process.  The  temperature  prole  is  di-
vided  into  four  process  zones,  each  with  dierent 
DT/Dtime temperature change rates. The DT/Dtime rates 
are  detailed  in  the  above  table. The  temperatures  are 
measured  at  the  component  to  printed  circuit  board 
connections.
In process zone P1, the PC board and HSDL-3020 castella-
tion pins are heated to a temperature of 160°C to acti-
vate the ux in the solder paste. The temperature ramp 
up rate, R1, is limited to 4°C per second to allow for even 
heating of  both  the  PC board and  HSDL-3020  castella-
tions.
Process zone P2 should be of sucient time duration (60 to 
120 seconds) to  dry the  solder  paste. The  temperature 
is raised  to a level  just below the  liquidus point of  the 
solder, usually 200°C (392°F). 
Process zone P3 is  the solder reow zone. In  zone P3,  the 
temperature  is  quickly  raised  above  the  liquidus  point 
of  solder  to  255°C  (491°F)  for  optimum  results.  The 
dwell  time  above  the  liquidus  point  of  solder  should 
be  between  20  and  60  seconds.  It  usually  takes  about 
20  seconds  to  assure  proper  coalescing  of  the  solder 
balls  into  liquid  solder  and  the  formation  of  good  sol-
der connections. Beyond a dwell time of 60 seconds, the 
intermetallic growth within the solder connections be-
comes excessive, resulting in the formation of weak and 
unreliable connections. The temperature is then rapidly 
reduced to a point below the solidus temperature of the 
solder, usually 200°C (392°F), to allow the solder within 
the connections to freeze solid. 
Process zone P4 is  the  cool  down  after  solder  freeze. The 
cool  down  rate,  R5,  from  the  liquidus  point  of  the  sol-
der  to  25°C  (77°F)  should  not  exceed  6°C  per  second 
maximum. This  limitation  is  necessary  to  allow  the  PC 
board  and  HSDL-3020  castellations  to  change  dimen-
sions evenly, putting minimal stresses on the HSDL-3020 
transceiver.
13
Appendix A: HSDL3020 SMT Assembly Application Note
Solder Pad, Mask and Metal Stencil
Figure 1. Stencil and PCBA.
Recommended Land Pattern
Figuure 2.
METAL STENCIL
FOR SOLDER PASTE
PRINTING
LAND
PATTERN
PCBA
STENCIL
APERTURE
SOLDER
MASK
MOUNTING CENTER
SYMETRICAL CENTER
1.25
2.7
1.75
0.475
1.425
0.35
0.10
0.775
FIDUCIAL
2.05
14
Recommended Metal solder Stencil Aperture
It is recommended that only a 0.152 mm (0.006 inch) or 
a 0.127 mm (0.005 inch) thick stencil be used for solder 
paste printing. This is to ensure adequate printed solder 
paste volume and no shorting. See Table1, below the 
drawing, for combin-ations of metal stencil aperture 
and metal stencil thickness that should be used. Aper-
ture opening for shield pad is 3.05 mm x 1.1 mm as per 
land pattern.
Figure 3. Solder stencil aperture.
Table 1.
Stencil Thickness, Aperture Size (mm)
t (mm) Length, l Width, w
0.127 mm  1.75 ± 0.05  0.55 ± 0.05
0.11 mm  2.4 ± 0.05  0.55 ± 0.05
APERTURES AS PER
LAND DIMENSIONS
l
w
t
Adjacent Land Keepout and Solder Mask Areas
Adjacent land keepout is the maximum space occupied 
by the unit relative to the land pattern. There should be 
no other SMD components within this area. The mini-
mum solder resist strip width required to avoid solder 
bridging adjacent pads is 0.2 mm. It is recommended 
that two ducial crosses be placed at mid length of the 
pads for unit alignment.
Note: Wet/Liquid Photo-imageable solder resist/mask is recom-
mended.
h
l
j
k
SOLDER MASK
DIMENSION
h
l
k
j
mm
0.2
3.0
3.85
11.9
15
Appendix B: PCB Layout Suggestion
The eects of EMI and power supply noise can poten-
tially reduce the sensitivity of the receiver, resulting in 
reduced link distance. The PCB layout played an impor-
tant role to obtain a good PSRR and EM immunity re-
sulting in good electrical performance. Things to note:
1.  The ground plane should be continuous under the 
part, but should not extend under the shield trace.
2.  The shield trace is a wide, low inductance trace back 
to the system ground. CX1, CX2, CX3, CX4, CX5, CX6 
and CX7 are optional supply lter capacitors; they 
may be left out if a clean power supply is used.
3.  IR and RC VLED can be connected to either unl-
tered or unregulated power supply. The bypass 
capacitors should be connection before the current 
limiting resistor R3 and R4 respectively. In a noisy 
environment, including capacitor CX2 and CX7 can 
enhance supply rejection. CX6 and CX3 that are 
generally a ceramic capacitor of low inductance 
providing a wide frequency response while CX2 and 
CX4 are tantalum capacitor of big volume and fast 
frequency response. The use of a tantalum capacitor 
is more critical on the VLED line, which carries a high 
current.
4.  VCC pin can be connected to either unltered or 
unregulated power supply. The Resistor, R1 together 
with the capacitors, CX1 and CX2 acts as the low 
pass lter.
5.  IOVCC is connected to the ASIC voltage supply or 
the VCC supply. The capacitor, CX5 acts as the bypass 
capacitor.
6.  Preferably a multi-layered board should be used 
to provide sucient ground plane. Use the layer 
underneath and near the transceiver module as VCC, 
and sandwich that layer between ground connect-
ed board layers. The diagram below demonstrate an 
example of a 4 layer board:
Top Layer: Connect the metal shield and module 
ground pin to bottom ground layer; 
Place the bypass capacitors within 0.5cm from the 
VCC and ground pin of the module.
Layer 2: Critical ground plane zone. 3 cm in all di-
rection around the   module. Connect to a clean, 
noiseless ground node (eg bottom layer).
Layer 3: Keep data bus away from critical ground 
plane zone.
Bottom layer: Ground layer. Ground noise <75 mVp-
p. Should be separated from ground used by 
noisy sources.
16
The area underneath the module at the second layer, 
and 3 cm in all directions around the module, is dened 
as the critical ground plane zone. The ground plane 
should be maximized in this zone. Refer to application 
note AN1114 or the Lite-On IrDA Data Link Design Guide
for details. The layout below is based on a  
2-layer PCB.
Top Layer Bottom Layer
LAYER 3
LAYER 3
TOP LAYER
CX6 CX4
CX3
CX5
CX1
CX2
CX7
R
3
R
2
R
1
BOTTOM LAYER (GND)
LEGEND: GROUND VIA
NOISE SOURCES TO BE PLACED AS FAR AWAY
FROM THE TRANSCEIVER AS POSSIBLE
17
Interface to the Recommended I/O Chip
The HSDL-3020’s TxD data input is buered to allow for 
CMOS drive levels. No peaking circuit or capacitor is re-
quired. Data rate from 9.6 kb/s to 4 Mb/s is available at 
RxD pin. The TxD_RC, pin 2, together with RC_LEDA, pin 
9,  is  used  to  select  the  remote  control  transmit  mode. 
Alternatively, the TxD_IR, pin 6, together with IR_LEDA, 
pin 8, is used for infrared transmit selection.
Following  shows  the  hardware  reference  design  with 
HSDL-3020.
*  Detailed  conguration  of  HSDL-3020  with  the  controller  chip  is 
shown in Figure 3.
The use of the infrared tech–niques for data communica-
tion  has  increased  rapidly  lately  and  almost  all  mobile 
application processors have built in the IR port. This does 
away with the external Endec and simplies the interfac-
ing  to  a  direct  connection  between  the  processor  and 
the  transceiver. The  next  section  discusses  interfacing 
conguration with a general processor.
Figure 2: Mobile application platform.
Appendix C: General Application Guide for the HSDL-3020
Infrared IrDA Compliant 4 Mb/s Transceiver
Description
The  HSDL-3020,  a  wide-voltage  operating  range  infra-
red  transceiver  is  a  low-cost  and  small  form  factor  de-
vice that is designed to address the mobile computing 
market such as PDAs, as well as small embedded mobile 
products such as digital cameras and cellular phones. It 
is spectrally suited to universal remote control transmis-
sion function at 940 nm typically. It is fully compliant to 
IrDA 1.4 low power specication up 4 Mb/s and supports 
most  remote  control  codes.  The  design  of  HSDL-3020 
also includes the following unique features:
•  Spectrally  suited  to  universal  remote  control 
transmission function at 940 nm typically
•  Low passive component count
•  Shutdown  mode  for  low  power  consumption 
requirement
•  Direct interface with I/O logic circuit
LOGIC BUS
DRIVER
MEMORY
EXPANSION
ROM
FLASH
SDRAM
MOBILE
APPLICATION
CHIPSET
IrDA
INTERFACE
AC97
SOUND
BASEBAND
CONTROLLER
I2S
TOUCH PANEL
AUDIO INPUT
POWER
MANAGEMENT
PCM SOUND
LCD BACKLIGHT
CONTRAST
ANTENNA
STN/TFT
LCD PANEL KEY PAD
LCD CONTROL PERIPHERIAL INTERFACE
PWM
A/D
MEMORY I/F
*HSDL-3020
Selection of Resistor R2 and R3
Resistor R2 and R3 should be selected to provide the ap-
propriate peak pulse IR and RC LED current respectively 
at dierent ranges of VCC as shown on page 4 under “Rec-
ommended  Application Circuit Components.
18
General Mobile Application Processor
The transceiver is directly interfaced with the micropro-
cessor  provided  its  support  infrared  communication 
commonly  known  as  Infrared  Communications  Port 
(ICP). The  ICP  supports  both  SIR  data  rates,  with  up  to 
115.2 kps,  and  sometimes  FIR  data,  with  data  rates  up 
to 4 Mbps. The remote control commands  can be sent 
to one  of the available General Purpose  IO pins or  the 
UART  block  with  IrDA  functionality.  It  should  be  ob-
served  that  although  both  IrDA  data  transmission  and 
Remote control transmission is possible simultaneously 
by the hardware, the software is required to resolve this 
issue to prevent the mixing and corruption of data while 
being transmitted over the free air. The above Figure 3 
illustrates a reference interfacing to implement both IR 
and RC functionality with HSDL-3020.
Figure 3: HSDL-3020 conguration with general mobile architecture processor.
V
CC
V
CC
GND
RC LED CATHODE
HSDL-3020
NC
IOV
CC
TxD_RC
RC_VLEDA
CX6 CX7 CX5
R3
GND
GND
CX3 CX4
CX1
CX2
R2
IR_VLED
GND
R1
RXD
SD
TxD_IR
IOV
CC
IOV
CC
RC_VLED
GPIO
100 kW
GND
100 kW
IR_RxD
GPIO
IR_TxD
IR_VLEDA
Remote Control Operation
The HSDL-3020 is spectrally suited  to universal remote 
control  transmission  function  at  940 nm  typically.  Re-
mote  control  applications  are  not  governed  by  any 
standards, owing to which there are numerous remote 
codes in market. Each  of  those  standards  results in re-
ceiver  modules  with  dierent  sensitivities,  depending 
on the carrier frequencies and responsively to the inci-
dent light wavelength. Remote control carrier frequen-
cies are in the range of 30 KHz to 60 KHz (for details of 
some the frequently used carrier frequencies, please re-
fer to AN1314). Some common  carrier frequencies and 
the  corresponding  SA-1110  UART  frequency  and  baud 
rate divisor are shown in Table 3.
Table 3.
Remote Control Carrier SA-1110 UART Baud Rate
Frequency (kHz) Frequency (kHz) Divisor
30  28.8  8 
32, 33  32.9  7 
36, 36.7, 38, 39.2, 40  38.4  6 
56  57.6  4 
19
Appendix D: Window Design for HSDL-3020
K
Z
X
Y
D
OPAQUE MATERIAL
OPAQUE MATERIAL
A
IR TRANSPARENT
WINDOW
T
IR TRANSPARENT
WINDOW
IR TRANSPARENT
WINDOW
Z
Optical Port Dimensions for HSDL-3020
To ensure IrDA compliance, some constraints on the height and width of the window exist. The minimum dimensions 
ensure that the IrDA cone angles are met without vignetting. The maximum dimensions minimize the eects of stray 
light. The minimum size corresponds to a cone angle of 30°and the maximum size corresponds to a cone angle of 
60°.
20
Aperture Width (X) vs Module Depth (Z)
0.00
2.00
4.00
6.00
8.00
10.00
12.00
14.00
16.00
18.00
20.00
22.00
24.00
0123456789
Module Depth (Z) mm
Aperture Width (X) mm
Xmin
Xmax
Aperture Height (Y) vs Module Depth (Z)
0.00
2.00
4.00
6.00
8.00
10.00
12.00
14.00
16.00
0123456789
Module Depth (Z) mm
Aperture Height (Y) mm
Ymin
Ymax
In the gure above, X is the width of the window, Y is the height of the window and Z is the distance from the HSDL-
3020 to the back of the window. The distance from the center of the LED lens to the center of the photodiode lens, K, 
is 7.5mm. The equations for computing the window dimensions are as follows:
X = K + 2*(Z+D)*tanA
Y = 2*(Z+D)*tanA
The above equations assume that the thickness of the window is negligible compared to the distance of the module 
from the back of the window (Z). If they are comparable, 
W1 = 0.33*T, 
W2 = 0.66*T, 
where T is the window thickness and the refractive index of the window material is 1.586.
The depth of the LED image inside the HSDL-3020, D, is 3.17mm. Ais the required half angle for viewing. For IrDA 
compliance, the minimum is 15°and the maximum is 30°. The equations result in the following tables and graphs. 
The graphs are plotted assuming that the thickness of the window is negligible.
Module Depth
(Z) mm
Aperture Width (X, mm) Aperture height (Y, mm)
Min Max Min Max
0 9.20 + W1 11.16 + W2 1.70 + W1 3.66 + W2
1 9.73 + W1 12.32 + W2 2.23 + W1 4.82 + W2
2 10.27 + W1 13.47 + W2 2.77 + W1 5.97 + W2
3 10.81 + W1 14.62 + W2 3.31 + W1 7.12 + W2
4 11.34 + W1 15.78 + W2 3.84 + W1 8.28 + W2
5 11.88 + W1 16.93 + W2 4.38 + W1 9.43 + W2
6 12.41 + W1 18.09 + W2 4.91 + W1 10.59 + W2
7 12.95 + W1 19.24 + W2 5.45 + W1 11.74 + W2
8 13.49 + W1 20.40 + W2 5.99 + W1 12.90 + W2
9 14.02 + W1 21.55 + W2 6.52 + W1 14.05 + W2
It is recommended that the tolerance for assembly be considered as well.  The recommended minimum window size 
which will take into account of the assembly tolerance is dened as:
Xmin + assembly tolerance = Xmin + 2*(assembly tolerance) (Dimensions are in mm)
Ymin + assembly tolerance = Ymin + 2*(assembly tolerance) (Dimensions are in mm)
21
Shape of the Window
From an optics standpoint, the window  should be  at. 
This ensures that the window will not alter either the ra-
diation pattern of the LED, or the receive pattern of the 
photodiode. If the window must be curved for mechani-
cal or industrial design reasons, place the same curve on 
the backside of the window that has an identical radius 
as  the  front  side.  While  this  will  not  completely  elimi-
nate  the  lens  eect  of  the  front  curved  surface,  it  will 
signicantly reduce the eects. The amount  of change 
in the radiation pattern is dependent upon the material 
chosen for the window, the radius of the front and back 
curves,  and  the  distance  from  the  back  surface  to  the 
transceiver. Once these items are known, a lens design 
can be made which will eliminate the eect of the front 
surface curve. The following drawings show the eects 
of a curved window on the radiation pattern. In all cases, 
the center thickness of the window is 1.5 mm, the win-
dow is made of polycarbonate plastic, and the distance 
from the transceiver to the back surface of the window 
is 3 mm.
Flat Window
(First Choice)
Curved Front, Flat Back
(Do not use)
Curved Front and Back
(Second Choice)
Window Material
Almost any plastic material will work as a window mate-
rial. Polycarbonate is  recommended. The  surface nish 
of the plastic should be smooth, without any texture. An 
IR lter dye may be used in the window to make it look 
black to the eye, but the total optical loss of the window 
should be 10% or less for best optical performance. Light 
loss should be measured at 875 nm. The recommended 
plastic materials for use as a cosmetic window are avail-
able from General Electric Plastics.
Recommended Plastic Materials:
Light Refractive
Material # Transmission Haze Index
Lexan 141  88%  1%  1.586
Lexan 920A  85%  1%  1.586
Lexan 940A  85%  1%  1.586
Note: 920A and 940A are more ame retardant than 141.
Recommended Dye: Violet #21051 (IR transmissant above 625 mm)
22
Appendix E: General Application Guide for the HSDL-3020
Remote Control Drive Modes
The HSDL-3020 can  operate in  the  single-TxD program-
mable mode or the two-TxD direct transmission mode.
Single-TxD Programmable Mode
In the single-TxD programmable mode, only one input 
pin (TxD_IR input pin) is used to turn on the remote con-
trol (940 nm) LED while the TxD_RC input pin is ground-
ed.
The transceiver is in default mode (IrDA-SIR) when pow-
ered up. The user needs to apply the following program-
ming  sequence  to  both  the  TxD_IR  and  SD  inputs  to 
enable  the  transceiver  to  operate  in  either  the  IrDA  or 
remote control mode.
Mode Programming Timing Table
Parameter Symbol Min Typ Max Unit Notes
The following timings describe input constraints required using the active serial interface for mode programming with pins SD, 
TxIR, and TxRC:
Shutdown input pulse width,  tSDPW 30  -  ∞  µs  Will activate complete shutdown 
at pin SD
SD mode setup time  tA 200  -  -  ns  Setup for mode programming
TxIR pulse width for RC mode  tB 200  -  -  ns  RC drive enabled with pin TxIR
SD programming pulse width  tC -  -  5.0  µs  Pulse width mode programming 
Note: ( tA  + tB ) < tC < tSDPW
TxIR setup time for  tS 50  -  -  ns  Setup time for IrDA bandwidth selection 
SIR or MIR/FIR mode
TxIR or SD hold time to latch  tH 50  -  -  ns  Hold time  for IrDA or RC modes 
SIR, MIR/FIR or RC mode 
DRIVE
IrDA LED
DRIVE
RC LED
DRIVE
IrDA LED
SHUTDOWN
SHUTDOWN
(ACTIVE HIGH)
TxIR
(ACTIVE HIGH)
TxRC
(GND)
RESET
t
C
t
H
t
H
t
TL
RC
MODE
t
B
t
A
t
C
t
H
• • • • • •• • •
Two-TxD Direct Transmission Mode
In  the  two-TxD  direct  transmission  mode,  the  IrDA 
(875 nm) LED and the remote control (940 nm) LED are 
turned  on  separately  by  two  dierent  input  pins.  The 
TxIR input pin is used to turn on the IrDA (875 nm) LED 
while the TxRC input pin is used to turn on the remote 
control (940 nm) LED.
Please refer to the Transceiver I/O truth  table  for more 
detail.
Transceiver Control I/O Truth Table for Two-TxD Direct Transmission
Mode
SD TxIR TxRC IrDA LED RC LED Remarks
0  0  0  OFF  OFF  IR Rx enabled. 
Idle mode
0  0  1  OFF  ON  Remote control 
operation
0  1  0  ON  OFF  IrDA Tx operation
0  1  1  –  –  Not recommended 
(Both Transmitters o)
1  0  0  OFF  OFF  Shutdown mode*
*The shutdown condition will set the transceiver to the default mode 
(IrDA-SIR)
Bandwidth Selection Timing
The power on state should be the IrDA SIR mode. The 
data transfer rate must be set by a program-ming se-
quence using the TxD_IR and SD inputs as described 
below.  
Note:  SD should not exceed the maximum, tC ≤ 5 µs, to prevent shut-
down.
Setting to the High Bandwidth MIR/FIR Mode
(0.576 Mbits/s to 4 Mbits/s)
1.  Set SD input to logic “HIGH.  Wait tA ≥ 200 ns.
2.  Set TxD_IR input to logic “HIGH.Wait tS ≥ 50 ns.
3.  Set SD to logic “LOW (this negative edge latches 
state of TxD_IR, which determines speed setting).
4.  After waiting tH ≥ 50 ns TxD_IR can be set to logic 
“LOW. TxD_IR is now re-enabled as normal IrDA 
transmit input for the High Bandwidth MIR/FIR 
mode.
Setting to the Low Bandwidth SIR Mode
(2.4 kbits/s to 115.2 kbits/s)
1.  Set SD input to logic “HIGH.
2.  Set TxIR input to logic “LOW. Wait tS ≥ 50 ns.
3.  Set SD to logic “LOW (this negative edge latches 
state of TxIR, which determines speed setting).
4.  TxIR must be held for tS ≥ 50 ns. TxIR is now re-en-
abled as normal IrDA transmit input for the Low 
Bandwidth SIR mode.
50% 50%
SD
TxIR
t
C
50% 50%
HIGH: MIR/FIR
LOW: SIR
t
H
t
S
t
A
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http://optodatabook.liteon.com/databook/databook.aspx
Data subject to change. Copyright © 2007 Lite-On Technology Corporation. All rights reserved.