TLC2654, TLC2654A Advanced LinCMOS LOW-NOISE CHOPPER-STABILIZED OPERATIONAL AMPLIFIERS SLOS020G - NOVEMBER 1988 - REVISED APRIL 2001 D D D D D D D D High Chopping Frequency . . . 10 kHz Typ No Clock Noise Below 10 kHz No Intermodulation Error Below 5 kHz Low Input Offset Voltage 10 V Max (TLC2654A) Excellent Offset Voltage Stability With Temperature . . . 0.05 V/C Max AVD . . . 135 dB Min (TLC2654A) CMRR . . . 110 dB Min (TLC2654A) kSVR . . . 110 dB Min Single-Supply Operation Common-Mode Input Voltage Range Includes the Negative Rail No Noise Degradation With External Capacitors Connected to VDD - Available in Q-Temp Automotive HighRel Automotive Applications Configuration Control/Print Support Qualification to Automotive Standards description The TLC2654 and TLC2654A are low-noise chopper-stabilized operational amplifiers using the Advanced LinCMOS process. Combining this process with chopper-stabilization circuitry makes excellent dc precision possible. In addition, circuit techniques are added that give the TLC2654 and TLC2654A superior noise performance. D, JG, OR P PACKAGE (TOP VIEW) CXA IN - IN + VDD - 1 8 2 7 3 6 4 5 CXB VDD + OUT CLAMP D, J, OR N PACKAGE (TOP VIEW) CXB CXA NC IN - IN + NC VDD - 1 14 2 13 3 12 4 11 5 10 6 9 7 8 INT/EXT CLK IN CLK OUT VDD + OUT CLAMP C RETURN FK PACKAGE (TOP VIEW) CXA CXB NC INT/EXT CLK IN D D D D Input Noise Voltage 0.5 V (Peak-to-Peak) Typ, f = 0 to 1 Hz 1.5 V (Peak-to-Peak) Typ, f = 0 to 10 Hz 47 nV/Hz Typ, f = 10 Hz 13 nV/Hz Typ, f = 1 kHz NC NC IN - NC IN + 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 CLK OUT NC VDD + NC OUT NC VDD - NC C RETURN CLAMP D NC - No internal connection Chopper-stabilization techniques provide for extremely high dc precision by continuously nulling input offset voltage even during variations in temperature, time, common-mode voltage, and power-supply voltage. The high chopping frequency of the TLC2654 and TLC2654A (see Figure 1) provides excellent noise performance in a frequency spectrum from near dc to 10 kHz. In addition, intermodulation or aliasing error is eliminated from frequencies up to 5 kHz. This high dc precision and low noise, coupled with the extremely high input impedance of the CMOS input stage, makes the TLC2654 and TLC2654A ideal choices for a broad range of applications such as low-level, low-frequency thermocouple amplifiers and strain gauges and wide-bandwidth and subsonic circuits. For applications requiring even greater dc precision, use the TLC2652 or TLC2652A devices, which have a chopping frequency of 450 Hz. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Advanced LinCMOS is a trademark of Texas Instruments. Copyright 2001, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 1 TLC2654, TLC2654A Advanced LinCMOS LOW-NOISE CHOPPER-STABILIZED OPERATIONAL AMPLIFIERS SLOS020G - NOVEMBER 1988 - REVISED APRIL 2001 EQUIVALENT INPUT NOISE VOLTAGE vs FREQUENCY description (continued) The TLC2654 and TLC2654A common-mode input voltage range includes the negative rail, thereby providing superior performance in either single-supply or split-supply applications, even at power supply voltage levels as low as 2.3 V. Vn nV/ Hz Vn - Equivalent Input Noise Voltage - nV/XXVZ 10 k Two external capacitors are required to operate the device; however, the on-chip chopper-control circuitry is transparent to the user. On devices in the 14-pin and 20-pin packages, the control circuitry is accessible, allowing the user the option of controlling the clock frequency with an external frequency source. In addition, the clock threshold of the TLC2554 and TLC2654A requires no level shifting when used in the single-supply configuration with a normal CMOS or TTL clock input. Innovative circuit techniques used on the TLC2654 and TLC2654A allow exceptionally fast overload recovery time. An output clamp pin is available to reduce the recovery time even further. 1k Typical 250-Hz Chopper-Stabilized Operational Amplifier 100 TLC2654 10 1 10 1k 100 f - Frequency - Hz Figure 1 The device inputs and outputs are designed to withstand - 100-mA surge currents without sustaining latch-up. In addition, the TLC2654 and TLC2654A incorporate internal ESD-protection circuits that prevent functional failures at voltages up to 2000 V as tested under MIL-STD-883C, Method 3015; however, exercise care in handling these devices, as exposure to ESD may result in degradation of the device parametric performance. The C-suffix devices are characterized for operation from 0C to 70C. The I-suffix devices are characterized for operation from - 40C to 85C. The Q-suffix devices are characterized for operation from - 40C to 125C. The M-suffix devices are characterized for operation over the full military temperature range of - 55C to125C. AVAILABLE OPTIONS PACKAGED DEVICES TA VIOmax AT 25C 0C to 70C 10 V 20 mV - 40C to 85C 8 PIN SMALL OUTLINE (D) 14 PIN 20 PIN CERAMIC DIP (JG) PLASTIC DIP (P) SMALL OUTLINE (D) CERAMIC DIP (J) PLASTIC DIP (N) TLC2654AC-8D TLC2654C 8D TLC2654C-8D -- -- TLC2654ACP TLC2654CP TLC2654AC-14D TLC2654C 14D TLC2654C-14D -- -- TLC2654ACN TLC2654CN -- -- 10 V 20 V TLC2654AI-8D TLC2654I-8D TLC2654I 8D -- -- TLC2654AIP TLC2654IP TLC2654AI-14D TLC2654I-14D TLC2654I 14D -- -- TLC2654AIN TLC2654IN -- -- - 40C to 125C 10 V 20 V TLC2654AQ-8D TLC2654Q 8D TLC2654Q-8D -- -- -- -- -- -- -- -- -- -- -- -- - 55C to 125C 10 V 20 V TLC2654AM-8D TLC2654M 8D TLC2654M-8D TLC2654AMJG TLC2654MJG TLC2654AMP TLC2654MP TLC2654AM-14D TLC2654M 14D TLC2654M-14D TLC2654AMJ TLC2654MJ TLC2654AMN TLC2654MN TLC2654AMFK TLC2654MFK The 8-pin and 14-pin D packages are available taped and reeled. Add R suffix to device type (e.g., TLC2654AC-8DR). 2 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 CERAMIC DIP (FK) TLC2654, TLC2654A Advanced LinCMOS LOW-NOISE CHOPPER-STABILIZED OPERATIONAL AMPLIFIERS SLOS020G - NOVEMBER 1988 - REVISED APRIL 2001 functional block diagram VDD + 11 9 Clamp Circuit IN + IN - 5 10 + - 4 B B CIC Main CLAMP OUT A A + - A Null 1 CXB 7 CompensationBiasing Circuit B 2 CXA External Components 8 C RETURN VDD - Pin numbers shown are for the D (14 pin), J, and N packages. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 3 TLC2654, TLC2654A Advanced LinCMOS LOW-NOISE CHOPPER-STABILIZED OPERATIONAL AMPLIFIERS SLOS020G - NOVEMBER 1988 - REVISED APRIL 2001 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage, VDD + (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 V Supply voltage, VDD - (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 8 V Differential input voltage, VID (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 V Input voltage, VI (any input, see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 V Voltage range on CLK IN and INT/EXT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDD - to VDD - + 5.2 V Input current, II (each input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 mA Output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Duration of short-circuit current at (or below) 25C (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . unlimited Current into CLK IN and INT/EXT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 mA Continuous total dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Operating free-air temperature range, TA: C suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0C to 70C I suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 40C to 85C Q suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 40C to 125C M suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 55C to 125C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 65C to 150C Case temperature for 60 seconds: FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D, N, or P package . . . . . . . . . . . . . 260C Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J or JG package . . . . . . . . . . . . . . . . 300C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between VDD + and VDD - . 2. Differential voltages are at IN+ with respect to IN -. 3. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum dissipation rating is not exceeded. DISSIPATION RATING TABLE PACKAGE D (8 pin) in) D ((14 pin)) FK J JG N P TA 25C POWER RATING DERATING FACTOR ABOVE TA = 25C 725 mW 950 mW 1375 mW 1375 mW 1050 mW 1150 mW 1000 mW mW/C 5.8 mW/ C 7.6 mW/C 11.0 mW/C 11.0 mW/C 8.4 mW/C 9.2 mW/C 8.0 mW/C TA = 70C POWER RATING TA = 85C POWER RATING TA = 125C POWER RATING 464 mW 608 mW 880 mW 880 mW 672 mW 736 mW 640 mW 377 mW 494 mW 715 mW 715 mW 546 mW 598 mW 520 mW 145 mW 190 mW 275 mW 275 mW 210 mW 230 mW 200 mW recommended operating conditions C SUFFIX Supply voltage, VDD Common-mode input voltage, VIC Clock input voltage Operating free-air temperature, TA 4 I SUFFIX Q SUFFIX M SUFFIX MIN MAX MIN MAX MIN MAX MIN MAX 2.3 8 2.3 8 2.3 8 2.3 8 VDD - VDD - 0 VDD + - 2.3 VDD - + 5 70 VDD - VDD - - 40 POST OFFICE BOX 655303 VDD + - 2.3 VDD - + 5 85 UNIT V VDD - VDD - VDD + - 2.3 VDD - + 5 VDD - VDD - VDD + - 2.3 VDD - + 5 V - 40 125 - 55 125 C * DALLAS, TEXAS 75265 V TLC2654, TLC2654A Advanced LinCMOS LOW-NOISE CHOPPER-STABILIZED OPERATIONAL AMPLIFIERS SLOS020G - NOVEMBER 1988 - REVISED APRIL 2001 electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted) PARAMETER VIO Input offset voltage g (see Note 4) VIO Temperature coefficient of input offset voltage Input offset voltage long-term drift (see Note 5) TA TEST CONDITIONS TLC2654C MIN 25C 5 20 Input offset current IIB Input bias current VICR Common-mode input voltage range RS = 50 VOM + Maximum positive peak output voltage swing RL = 10 k, k See Note 6 VOM - Maximum negative g peak output voltage swing RL = 10 k, k See Note 6 AVD Large-signal g g differential voltage amplification VO = 4 V V, RL = 10 k TYP MAX 4 10 34 24 UNIT V 0 01 0.01 0 05 0.05 0 01 0.01 0 05 0.05 V/C 25C 0.003 0.06 0.003 0.02 V/mo 25C 30 60 30 60 Full range 150 25C 50 Full range 150 60 50 150 Full range -5 to 2.7 25C 4.7 Full range 4.7 25C - 4.7 Full range - 4.7 25C 120 Full range 120 Internal chopping frequency 25C -5 to 2.7 4.8 4.7 - 4.9 - 4.7 135 25 25 25 VO = - 4 V to 4 V Common-mode rejection j ratio VO = 0, VIC = VICRmin min, RS = 50 25C 105 Full range 105 kSVR Supplyy voltage g rejection j ratio (VDD /VIO) VDD = 2.3 V to 8 V,, VO = 0, RS = 50 25C 110 Full range 110 IDD Supply current VO = 0 0, - 4.9 V 155 dB 10 25 kHz A 25C 100 100 Full range 100 100 125 110 pA V 130 25C off state current Clamp off-state 4.8 - 4.7 155 pA V 4.7 Full range RL = 100 k 60 150 10 Clamp on-state on state current No load MIN Full range RS = 50 IIO CMRR MAX Full range VIC = 0, TLC2654AC TYP pA 125 dB 25C Full range 110 125 110 125 dB 110 1.5 2.4 2.5 1.5 2.4 2.5 mA Full range is 0C to 70C. NOTES: 4. This parameter is not production tested full range. Thermocouple effects preclude measurement of the actual VIO of these devices in high-speed automated testing. VIO is measured to a limit determined by the test equipment capability at the temperature extremes. The test ensures that the stabilization circuitry is performing properly. 5. Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150C extrapolated to TA = 25 using the Arrhenius equation and assuming an activation energy of 0.96 eV. 6. Output clamp is not connected. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 5 TLC2654, TLC2654A Advanced LinCMOS LOW-NOISE CHOPPER-STABILIZED OPERATIONAL AMPLIFIERS SLOS020G - NOVEMBER 1988 - REVISED APRIL 2001 operating characteristics at specified free-air temperature, VDD = 5 V PARAMETER TEST CONDITIONS SR + Positive slew rate at unity gain SR - Negative slew rate at unity gain Vn Equivalent q input noise voltage g (see Note 7) f = 10 Hz VN(PP) Peak-to-peak equivalent q input noise voltage f = 0 to 1 Hz In Equivalent input noise current f = 10 kHz Gain-bandwidth product Phase margin at unity gain m VO = 2.3 V, RL = 10 k, k CL = 100 pF F TA TLC2654C MIN TYP 2 25C 1.5 Full range 1.3 25C 2.3 Full range 1.7 TLC2654AC MAX MIN TYP 1.5 2 MAX V/s 1.3 3.7 2.3 3.7 V/s 1.7 47 47 75 13 13 20 0.5 0.5 1.5 1.5 25C 0.004 0.004 f = 10 kHz,, RL = 10 k, CL = 100 pF 25C 1.9 1.9 RL = 10 k, CL = 100 pF 25C 48 48 f = 1 kHz f = 0 to 10 Hz 25C 25C UNIT nV/Hz V pA/Hz MHz Full range is 0C to 70C. NOTE 7: This parameter is tested on a sample basis for the TLC2654A. For other test requirements, please contact the factory. This statement has no bearing on testing or nontesting of other parameters. 6 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TLC2654, TLC2654A Advanced LinCMOS LOW-NOISE CHOPPER-STABILIZED OPERATIONAL AMPLIFIERS SLOS020G - NOVEMBER 1988 - REVISED APRIL 2001 electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted) PARAMETER VIO Input offset voltage g (see Note 4) VIO Temperature coefficient of input offset voltage Input offset voltage long-term drift (see Note 5) TA TEST CONDITIONS TLC2654I MIN 25C 5 20 Input offset current IIB Input bias current VICR Common-mode input voltage range RS = 50 VOM + Maximum positive peak output voltage swing RL = 10 k, k See Note 6 VOM - Maximum negative peak g output voltage swing k RL = 10 k, See Note 6 AVD Large-signal g g differential voltage amplification VO = 4 V V, RL = 10 k TYP MAX 4 10 40 30 UNIT V 0 01 0.01 0 05 0.05 0 01 0.01 0 05 0.05 V/C 25C 0.003 0.06 0.003 0.02 V/mo 25C 30 60 30 60 Full range 200 25C 50 Full range 200 60 50 200 Full range -5 to 2.7 25C 4.7 Full range 4.7 25C - 4.7 Full range - 4.7 25C 120 Full range 120 Internal chopping frequency 25C -5 to 2.7 4.8 4.7 - 4.9 - 4.7 135 25 25 25 VO = - 4 V to 4 V j Common-mode rejection ratio VO = 0, VIC = VICRmin min, RS = 50 25C 105 Full range 105 kSVR Supply y voltage g rejection j ratio (VDD /VIO) VDD = 2.3 V to 8 V,, VO = 0, RS = 50 25C 110 Full range 110 IDD Supply current VO = 0 0, - 4.9 V 155 dB 10 25 kHz A 25C 100 100 Full range 100 100 125 110 pA V 125 25C Clamp off-state off state current 4.8 - 4.7 155 pA V 4.7 Full range RL = 100 k 60 200 10 Clamp on-state on state current No load MIN Full range RS = 50 IIO CMRR MAX Full range VIC = 0, TLC2654AI TYP pA 125 dB 25C Full range 110 125 110 125 dB 110 1.5 2.4 2.5 1.5 2.4 2.5 mA Full range is - 40C to 85C NOTES: 4. This parameter is not production tested full range. Thermocouple effects preclude measurement of the actual VIO of these devices in high-speed automated testing. VIO is measured to a limit determined by the test equipment capability at the temperature extremes. The test ensures that the stabilization circuitry is performing properly. 5. Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150C extrapolated to TA = 25C using the Arrhenius equation and assuming an activation energy of 0.96 eV. 6. Output clamp is not connected. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 7 TLC2654, TLC2654A Advanced LinCMOS LOW-NOISE CHOPPER-STABILIZED OPERATIONAL AMPLIFIERS SLOS020G - NOVEMBER 1988 - REVISED APRIL 2001 operating characteristics at specified free-air temperature, VDD = 5 V PARAMETER TEST CONDITIONS SR + Positive slew rate at unity gain SR - Negative slew rate at unity gain VO = 2.3 V, RL = 10 k, k CL = 100 pF F Vn Equivalent q input noise voltage g (see Note 7) f = 1 kHz VN(PP) Peak-to-peak equivalent q input noise voltage f = 0 to 10 Hz In Equivalent input noise current f = 10 kHz Gain-bandwidth product m Phase margin at unity gain TA TLC2654I MIN TYP 2 25C 1.5 Full range 1.2 25C 2.3 Full range 1.5 f = 10 Hz f = 0 to 1 Hz f = 10 kHz, RL = 10 k, CL = 100 pF RL = 10 k, CL = 100 pF TLC2654AI MAX MIN TYP 1.5 2 MAX V/s 1.2 3.7 2.3 3.7 V/s 1.5 47 47 75 13 13 20 0.5 0.5 1.5 1.5 25C 0.004 0.004 25C 1.9 1.9 25C 48 48 25C 25C UNIT nV/Hz V pA/Hz MHz Full range is - 40 C to 85C. NOTE 7: This parameter is tested on a sample basis for the TLC2654A. For other test requirements, please contact the factory. This statement has no bearing on testing or nontesting of other parameters. 8 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TLC2654, TLC2654A Advanced LinCMOS LOW-NOISE CHOPPER-STABILIZED OPERATIONAL AMPLIFIERS SLOS020G - NOVEMBER 1988 - REVISED APRIL 2001 electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted) PARAMETER TA TEST CONDITIONS TLC2654Q TLC2654M MIN VIO Input offset voltage g (see Note 4) VIO Temperature coefficient of input offset voltage Input offset voltage long-term drift (see Note 5) 25C MAX 5 20 Input offset current IIB Input bias current VICR Common-mode Common mode input voltage range RS = 50 VOM + Maximum positive peak output voltage swing k RL = 10 k, See Note 6 VOM - Maximum negative g peak output voltage swing RL = 10 k, k See Note 6 AVD Large-signal g g differential voltage amplification VO = 4 V V, RL = 10 k UNIT TYP MAX 4 10 50 40 V 0 01 0.01 0.05 0 05 0 01 0.01 0.05 0 05 V/C 25C 0.003 0.06 0.003 0.02 V/mo 25C 30 60 30 Full range 500 25C 50 Full range -5 to 2.7 25C 4.7 Full range 4.7 25C - 4.7 Full range - 4.7 25C 120 Full range 120 25C 60 50 -5 to 2.7 4.8 4.7 - 4.9 - 4.7 135 25 25 25 VO = - 4 V to 4 V Common-mode rejection j ratio VO = 0, VIC = VICRmin min, RS = 50 25C 105 Full range 105 kSVR Supplyy voltage g rejection j ratio (VDD /VIO) VDD = 2.3 V to 8 V,, VO = 0, RS = 50 25C 110 Full range 105 IDD Supply current VO = 0 0, - 4.9 V 155 dB 10 25 kHz A 25C 100 100 Full range 500 500 125 110 pA V 120 25C Clamp off-state off state current 4.8 - 4.7 155 pA V 4.7 Full range RL = 100 k 60 500 10 Clamp on-state on state current 60 500 500 Full range g Internal chopping frequency No load MIN Full range RS = 50 IIO CMRR TYP Full range VIC = 0, TLC2654AQ TLC2654AM pA 125 dB 25C Full range 110 125 110 125 dB 110 1.5 2.4 2.5 1.5 2.4 2.5 mA On products complaint to MIL-STD-883, Class B, this parameter is not production tested. Full range is - 40 to 125C for Q suffix, - 55 to 125C for M suffix. NOTES: 4. This parameter is not production tested full range. Thermocouple effects preclude measurement of the actual VIO of these devices in high-speed automated testing. VIO is measured to a limit determined by the test equipment capability at the temperature extremes. The test ensures that the stabilization circuitry is performing properly. 5. Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150C extrapolated to TA = 25C using the Arrhenius equation and assuming an activation energy of 0.96 eV. 6. Output clamp is not connected. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 9 TLC2654, TLC2654A Advanced LinCMOS LOW-NOISE CHOPPER-STABILIZED OPERATIONAL AMPLIFIERS SLOS020G - NOVEMBER 1988 - REVISED APRIL 2001 operating characteristics at specified free-air temperature, VDD = 5 V PARAMETER SR + Positive slew rate at unity gain SR - Negative slew rate at unity gain Vn Equivalent input noise voltage VN(PP) In TEST CONDITIONS VO = 2 2.3 3V V, RL = 10 k, k CL = 100 pF MIN TYP 2 25C 1.5 Full range 1.1 25C 2.3 Full range 1.3 3.7 f = 10 Hz 25C 47 f = 1 kHz 25C 13 Peak-to-peak equivalent q input noise voltage f = 0 to 1 Hz 25C 0.5 f = 0 to 10 Hz 25C 1.5 Equivalent input noise current f = 1 kHz 25C 0.004 Gain-bandwidth product f = 10 kHz, 25C 1.9 25C 48 RL = 10 k, CL = 100 pF m Phase margin at unity gain RL = 10 k, CL = 100 pF Full range is - 40 to 125C for Q suffix, - 55 to 125C for M suffix. 10 TA TLC2654Q TLC2654M TLC2654AQ TLC2654AM POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 UNIT MAX V/s V/s nV/Hz V pA/Hz MHz TLC2654, TLC2654A Advanced LinCMOS LOW-NOISE CHOPPER-STABILIZED OPERATIONAL AMPLIFIERS SLOS020G - NOVEMBER 1988 - REVISED APRIL 2001 TYPICAL CHARACTERISTICS Table of Graphs FIGURE VIO Input offset voltage Distribution 2 Normalized input offset voltage vs Chopping frequency 3 IIO Input offset current vs Chopping g frequency q y vs Free-air temperature 4 5 IIB Input bias current vs Common-mode Common mode in input ut voltage vs Chopping g frequency q y vs Free-air temperature 6 7 8 Clamp current vs Output voltage 9 VOM Maximum peak output voltage swing vs Output current vs Free-air temperature 10 11 VO(PP) Maximum peak-to-peak output voltage swing vs Frequency 12 CMRR Common-mode rejection ratio vs Frequency 13 Large signal differential voltage amplification Large-signal vs Frequency q y vs Free-air temperature 14 15 Chopping frequency vs Supply y voltage g vs Free-air temperature 16 17 IDD Supply current vs Supplyy voltage g vs Free-air temperature 18 19 IOS Short circuit output current Short-circuit vs Supply y voltage g vs Free-air temperature 20 21 SR Slew rate vs Supplyy voltage g vs Free-air temperature 22 23 Voltage follower pulse response Voltage-follower Small signal g Large signal 24 25 VN(PP) Peak-to-peak input noise voltage vs Chopping frequency Vn kSVR Equivalent input noise voltage vs Frequency 28 Supply voltage rejection ratio vs Frequency 29 Gain bandwidth product Gain-bandwidth vs Supply y voltage g vs Free-air temperature 30 31 Phase margin vs Supplyy voltage g vs Load capacitance 32 33 Phase shift vs Frequency 14 AVD m POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 26, 27 11 TLC2654, TLC2654A Advanced LinCMOS LOW-NOISE CHOPPER-STABILIZED OPERATIONAL AMPLIFIERS SLOS020G - NOVEMBER 1988 - REVISED APRIL 2001 TYPICAL CHARACTERISTICS NORMALIZED INPUT OFFSET VOLTAGE vs CHOPPING FREQUENCY DISTRIBUTION OF TLC2654 INPUT OFFSET VOLTAGE 40 20 VIO uV V IO - Normalized Input Offset Voltage - V Percentage of Units - % 16 456 Units Tested From 4 Wafer Lots VDD = 5 V TA = 25C N Package 12 8 4 0 -20 -16 -12 - 8 - 4 0 4 8 12 16 30 VDD = 5 V VIC = 0 TA = 25C 20 10 0 -10 100 20 1K VIO - Input Offset Voltage - V Figure 3 INPUT OFFSET CURRENT vs FREE-AIR TEMPERATURE INPUT OFFSET CURRENT vs CHOPPING FREQUENCY 100 140 VDD = 5 V VIC = 0 TA = 25C VDD = 5 V VIC = 0 IIIO IO - Input Offset Current - pA IIIO IO - Input Offset Current - pA 100K Chopping Frequency - Hz Figure 2 120 10K 100 80 60 40 80 60 40 20 20 0 100 0 1k 10 k 100 k 25 45 65 85 105 TA - Free-Air Temperature - C Chopping Frequency - Hz Figure 4 Figure 5 Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. 12 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 125 TLC2654, TLC2654A Advanced LinCMOS LOW-NOISE CHOPPER-STABILIZED OPERATIONAL AMPLIFIERS SLOS020G - NOVEMBER 1988 - REVISED APRIL 2001 TYPICAL CHARACTERISTICS INPUT BIAS CURRENT vs CHOPPING FREQUENCY INPUT BIAS CURRENT vs COMMON-MODE INPUT VOLTAGE 1000 100 I IB - Input Bias Current - pA IIB IIIB IB - Input Bias Current - pA VDD = 5 V TA = 25C 100 10 2 4 - 5 - 4 - 3 - 2 -1 0 1 3 VIC - Common-Mode Input Voltage - V VDD = 5 V VIC = 0 TA = 25C 80 60 40 20 0 100 5 1k 10 k Chopping Frequency - Hz Figure 7 Figure 6 CLAMP CURRENT vs OUTPUT VOLTAGE INPUT BIAS CURRENT vs FREE-AIR TEMPERATURE 100 A VDD = 5 V VIC = 0 VDD = 5 V TA = 25C 10 A 80 1 A Positive Clamp Current |Clamp Current| IIIB IB - Input Bias Current - pA 100 100 k 60 40 100 nA 10 nA 1 nA 100 pA Negative Clamp Current 20 10 pA 1 pA 0 25 45 65 85 105 TA - Free-Air Temperature - C 125 4 Figure 8 4.2 4.4 4.6 |VO| - Output Voltage - V 4.8 5 Figure 9 Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 13 TLC2654, TLC2654A Advanced LinCMOS LOW-NOISE CHOPPER-STABILIZED OPERATIONAL AMPLIFIERS SLOS020G - NOVEMBER 1988 - REVISED APRIL 2001 TYPICAL CHARACTERISTICS MAXIMUM PEAK OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE MAXIMUM PEAK OUTPUT VOLTAGE vs OUTPUT CURRENT 5 VDD = 5 V TA = 25C VOM - Maximum Peak Output Voltage - V VOM - Maximum Peak Output Voltage - V 5 4.8 VOM + VOM - 4.6 4.4 4.2 VOM + 2.5 VDD = 5 V RL = 10 k 0 - 2.5 VOM - 4 0 0.4 0.8 1.2 1.6 -5 -75 - 50 - 25 2 25 50 75 100 MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE vs FREQUENCY COMMOM-MODE REJECTION RATIO vs FREQUENCY 10 CMRR - Common-Mode Rejection Ratio - dB 140 8 TA = - 55C 6 TA = 125C 4 2 VDD = 5 V RL = 10 k 0 100 VDD = 5 V TA = 25C 120 100 80 60 40 20 0 1k 10 k 100 k 1M 10 100 1k f - Frequency - Hz f - Frequency - Hz Figure 12 Figure 13 Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. 14 125 Figure 11 Figure 10 VO(PP) VO(PP) - Maximum Peak-to-Peak Output Voltage - V 0 TA - Free-Air Temperature - C |IO| - Output Current - mA POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 10 k TLC2654, TLC2654A Advanced LinCMOS LOW-NOISE CHOPPER-STABILIZED OPERATIONAL AMPLIFIERS SLOS020G - NOVEMBER 1988 - REVISED APRIL 2001 60 120 100 80 Phase Shift 80 100 AVD 60 120 40 140 20 160 VDD = 5 V RL = 10 k CL = 100 pF TA = 25C 0 -20 -40 10 100 1k 180 200 10 k 100 k 220 10 M 1M AAVD VD - Large-Signal Differential Voltage Amplification - dB LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE SHIFT vs FREQUENCY Phase Shift AAVD VD - Large-Signal Differential Voltage Amplification - dB TYPICAL CHARACTERISTICS LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION vs FREE-AIR TEMPERATURE 160 158 VDD = 5 V RL = 10 k VO = 4 V 156 154 152 150 - 75 100 125 -75 - 50 - 25 0 25 50 75 100 TA - Free-Air Temperature - C 125 - 50 - 25 f - Frequency - Hz Figure 14 25 50 75 Figure 15 CHOPPING FREQUENCY vs FREE-AIR TEMPERATURE CHOPPING FREQUENCY vs SUPPLY VOLTAGE 11.4 10.5 VDD = 5 V TA = 25C Chopping Frequency - kHz 11 Chopping Frequency - kHz 0 TA - Free-Air Temperature - C 10.6 10.2 10 9.5 9 9.8 8.5 9.4 0 1 2 3 4 5 6 |VDD | - Supply Voltage - V 7 8 Figure 16 Figure 17 Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 15 TLC2654, TLC2654A Advanced LinCMOS LOW-NOISE CHOPPER-STABILIZED OPERATIONAL AMPLIFIERS SLOS020G - NOVEMBER 1988 - REVISED APRIL 2001 TYPICAL CHARACTERISTICS SUPPLY CURRENT vs SUPPLY VOLTAGE SUPPLY CURRENT vs FREE-AIR TEMPERATURE 2 2 VO = 0 No Load VDD = 7.5 V 1.2 TA = 25C 0.8 TA = - 55C IIDD DD - Supply Current - mA IIDD DD - Supply Current - mA 1.6 TA = 125C 0.4 1.6 VDD = 5 V 1.2 VDD = 2.5 V 0.8 0.4 VO = 0 No Load 0 0 1 2 3 4 5 6 7 0 -75 - 50 - 25 8 Figure 18 25 50 75 100 SHORT-CIRCUIT OUTPUT CURRENT vs FREE-AIR TEMPERATURE 12 15 IIOS OS - Short-Circuit Output Current - mA VO = 0 TA = 25C 8 4 VID = - 100 mV 0 -4 VID = 100 mV -8 -12 0 1 6 2 3 4 5 |VDD | - Supply Voltage - V 7 8 VDD = 5 V VO = 0 10 5 VID = - 100 mV 0 -5 VID = 100 mV -10 -15 -75 75 100 - 50 - 25 0 25 50 TA - Free-Air Temperature - C Figure 20 Figure 21 Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. 16 125 Figure 19 SHORT-CIRCUIT OUTPUT CURRENT vs SUPPLY VOLTAGE IIOS OS - Short-Circuit Output Current - mA 0 TA - Free-Air Temperature - C |VDD | - Supply Voltage - V POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 125 TLC2654, TLC2654A Advanced LinCMOS LOW-NOISE CHOPPER-STABILIZED OPERATIONAL AMPLIFIERS SLOS020G - NOVEMBER 1988 - REVISED APRIL 2001 TYPICAL CHARACTERISTICS SLEW RATE vs SUPPLY VOLTAGE SLEW RATE vs FREE-AIR TEMPERATURE 5 4 SR - SR - 3 SR - Slew Rate - V/ V/us s SR - Slew Rate - V/us V/ s 4 3 2 SR + 1 0 SR + 2 1 VDD = 5 V RL = 10 k CL = 100 pF RL = 10 k CL = 100 pF TA = 25C 0 1 2 3 4 5 6 7 0 - 75 8 0 - 50 - 25 75 100 125 VOLTAGE-FOLLOWER LARGE-SIGNAL PULSE RESPONSE 100 4 75 3 50 2 VO - Output Voltage - V VO VO VO - Output Voltage - mV VOLTAGE-FOLLOWER SMALL-SIGNAL PULSE RESPONSE 25 VDD = 5 V RL = 10 k CL = 100 pF TA = 25C - 25 50 Figure 23 Figure 22 0 25 TA - Free-Air Temperature - C |VDD | - Supply Voltage - V - 50 -75 1 VDD = 5 V RL = 10 k CL = 100 pF TA = 25C 0 -1 -2 -3 -100 0 1 2 3 4 5 6 7 -4 0 t - Time - s 5 10 15 20 25 30 35 40 t - Time - s Figure 24 Figure 25 Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 17 TLC2654, TLC2654A Advanced LinCMOS LOW-NOISE CHOPPER-STABILIZED OPERATIONAL AMPLIFIERS SLOS020G - NOVEMBER 1988 - REVISED APRIL 2001 TYPICAL CHARACTERISTICS PEAK-TO-PEAK INPUT NOISE VOLTAGE vs CHOPPING FREQUENCY PEAK-TO-PEAK INPUT NOISE VOLTAGE vs CHOPPING FREQUENCY 5 VN(PP) uV VN(PP) - Peak-to-Peak Input Noise Voltage - V VN(PP) uV VN(PP) - Peak-to-Peak Input Noise Voltage - V 1.8 VDD = 5 V RS = 20 f = 0 to 1 Hz TA = 25C 1.6 1.4 1.2 1 0.8 0.6 0.4 0.2 0 0 2 4 6 8 Chopping Frequency - kHz VDD = 5 V RS = 20 f = 0 to 10 Hz TA = 25C 4 3 2 1 0 0 10 2 Figure 26 SUPPLY VOLTAGE REJECTION RATIO vs FREQUENCY kkSVR SVR - Supply Voltage Rejection Ratio - dB V n - Equivalent Input Noise Voltage - xxxxxx VN nV/ Hz 140 VDD = 5 V RS = 20 TA = 25C 40 30 20 10 VDD = 2.3 V to 8 V TA = 25C 120 100 80 kSVR + 60 kSVR - 40 20 0 0 1 10 100 1k 10 k 10 100 Figure 28 Figure 29 POST OFFICE BOX 655303 1k f - Frequency - Hz f - Frequency - Hz 18 10 Figure 27 EQUIVALENT INPUT NOISE VOLTAGE vs FREQUENCY 50 8 4 6 Chopping Frequency - kHz * DALLAS, TEXAS 75265 10 k TLC2654, TLC2654A Advanced LinCMOS LOW-NOISE CHOPPER-STABILIZED OPERATIONAL AMPLIFIERS SLOS020G - NOVEMBER 1988 - REVISED APRIL 2001 TYPICAL CHARACTERISTICS GAIN-BANDWIDTH PRODUCT vs FREE-AIR TEMPERATURE GAIN-BANDWIDTH PRODUCT vs SUPPLY VOLTAGE 2.6 RL = 10 k CL = 100 pF TA = 25C Gain-Bandwidth Product - MHz Gain-Bandwidth Product - MHz 2.1 2 1.9 VDD = 5 V RL = 10 k CL = 100 pF 2.4 2.2 2 1.8 1.6 1.4 1.2 -75 1.8 0 1 2 3 4 6 5 7 8 - 50 - 25 25 50 75 100 125 Figure 31 Figure 30 PHASE MARGIN vs SUPPLY VOLTAGE PHASE MARGIN vs LOAD CAPACITANCE 60 60 RL = 10 k CL = 100 pF TA = 25C VDD = 5 V RL = 10 k TA = 25C 50 m - Phase Margin 50 m - Phase Margin 0 TA - Free-Air Temperature - C |VDD | - Supply Voltage - V 40 30 20 40 30 20 10 10 0 0 0 1 2 3 4 5 6 |VDD | - Supply Voltage - V 7 8 0 200 400 600 800 1000 CL - Load Capacitance - pF Figure 32 Figure 33 Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 19 TLC2654, TLC2654A Advanced LinCMOS LOW-NOISE CHOPPER-STABILIZED OPERATIONAL AMPLIFIERS SLOS020G - NOVEMBER 1988 - REVISED APRIL 2001 APPLICATION INFORMATION capacitor selection and placement Leakage and dielectric absorption are the two important factors to consider when selecting external capacitors CXA and CXB. Both factors can cause system degradation, negating the performance advantages realized by using the TLC2654. Degradation from capacitor leakage becomes more apparent with increasing temperatures. Low-leakage capacitors and standoffs are recommended for operation at TA = 125C. In addition, guard bands are recommended around the capacitor connections on both sides of the printed-circuit board to alleviate problems caused by surface leakage on circuit boards. Capacitors with high dielectric absorption tend to take several seconds to settle upon application of power, which directly affects input offset voltage. In applications needing fast settling of input voltage, high-quality film capacitors such as mylar, polystyrene, or polypropylene should be used. In other applications, a ceramic or other low-grade capacitor can suffice. Unlike many choppers available today, the TLC2654 is designed to function with values of CXA and CXB in the range of 0.1 F to 1 F without degradation to input offset voltage or input noise voltage. These capacitors should be located as close as possible to CXA and CXB and return to either VDD - or C RETURN. On many choppers, connecting these capacitors to VDD - causes degradation in noise performance; this problem is eliminated on the TLC2654. internal/external clock When large differential-input-voltage conditions are applied to the TLC2654, the nulling loop attempts to prevent the output from saturating by driving CXA and CXB to internally-clamped voltage levels. Once the overdrive condition is removed, a period of time is required to allow the built-up charge to dissipate. This time period is defined as overload recovery time (see Figure 34). Typical overload recovery time for the TLC2654 is significantly faster than competitive products; however, this time can be reduced further by use of internal clamp circuitry accessible through CLAMP if required. 20 POST OFFICE BOX 655303 VII - Input Voltage - mV V overload recovery/output clamp VO V O - Output Voltage - V The TLC2654 has an internal clock that sets the chopping frequency to a nominal value of 10 kHz. On 8-pin packages, the chopping frequency can only be controlled by the internal clock; however, on all 14-pin packages and the 20-pin FK package the device chopping frequency can be set by the internal clock or controlled externally by use of the INT/EXT and CLK IN. To use the internal 10-kHz clock, no connection is necessary. If external clocking is desired, connect INT/EXT to VDD - and the external clock to CLK IN. The external clock trip point is 2.5 V above the negative rail; however, CLK IN can be driven from the negative rail to 5 V above the negative rail. This allows the TLC2654 to be driven directly by 5-V TTL and CMOS logic when operating in the single-supply configuration. If this 5-V level is exceeded, damage could occur to the device unless the current into CLK IN is limited to 5 mA. A divide-by-two 0 frequency divider interfaces with CLK IN and sets VDD = 5 V TA = 25 C the chopping frequency. The chopping frequency appears on CLK OUT. -5 0 - 50 0 10 20 30 40 50 60 70 t - Time - ms Figure 34. Overload Recovery * DALLAS, TEXAS 75265 80 TLC2654, TLC2654A Advanced LinCMOS LOW-NOISE CHOPPER-STABILIZED OPERATIONAL AMPLIFIERS SLOS020G - NOVEMBER 1988 - REVISED APRIL 2001 APPLICATION INFORMATION overload recovery/output clamp (continued) The clamp is a switch that is automatically activated when the output is approximately 1 V from either supply rail. When connected to the inverting input (in parallel with the closed-loop feedback resistor), the closed-loop gain is reduced and the TLC2654 output is prevented from going into saturation. Since the output must source or sink current through the switch (see Figure 9), the maximum output voltage swing is slightly reduced. thermoelectric effects To take advantage of the extremely low offset voltage temperature coefficient of the TLC2654, care must be taken to compensate for the thermoelectric effects present when two dissimilar metals are brought into contact with each other (such as device leads being soldered to a printed-circuit board). It is not uncommon for dissimilar metal junctions to produce thermoelectric voltages in the range of several microvolts per degree Celsius (orders of magnitude greater than the 0.01 V/C typical of the TLC2654). To help minimize thermoelectric effects, pay careful attention to component selection and circuit-board layout. Avoid the use of nonsoldered connections (such as sockets, relays, switches, etc.) in the input signal path. Cancel thermoelectric effects by duplicating the number of components and junctions in each device input. The use of low-thermoelectric-coefficient components, such as wire-wound resistors, is also beneficial. latch-up avoidance Because CMOS devices are susceptible to latch-up due to their inherent parasitic thyristors, the TLC2654 inputs and outputs are designed to withstand - 100-mA surge currents without sustaining latch-up; however, techniques to reduce the chance of latch-up should be used whenever possible. Internal protection diodes should not, by design, be forward biased. Applied input and output voltages should not exceed the supply voltage by more than 300 mV. Care should be exercised when using capacitive coupling on pulse generators. Supply transients should be stunted by the use of decoupling capacitors (0.1 F typical) located across the supply rails as close to the device as possible. The current path established if latch-up occurs is usually between the supply rails and is limited only by the impedance of the power supply and the forward resistance of the parasitic thyristor. The chance of latch-up occurring increases with increasing temperature and supply voltage. electrostatic-discharge protection The TLC2654 incorporates internal ESD-protection circuits that prevent functional failures at voltages at or below 2000 V. Care should be exercised in handling these devices, as exposure to ESD may result in degradation of the device parametric performance. theory of operation Chopper-stabilized operational amplifiers offer the best dc performance of any monolithic operational amplifier. This superior performance is the result of using two operational amplifiers -- a main amplifier and a nulling amplifier - plus oscillator-controlled logic and two external capacitors to create a system that behaves as a single amplifier. With this approach, the TLC2654 achieves submicrovolt input offset voltage, submicrovolt noise voltage, and offset voltage variations with temperature in the nV/C range. The TLC2654 on-chip control logic produces two dominant clock phases: a nulling phase and an amplifying phase. The term chopper-stabilized derives from the process of switching between these two clock phases. Figure 35 shows a simplified block diagram of the TLC2654. Switches A and B are make-before-break types. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 21 TLC2654, TLC2654A Advanced LinCMOS LOW-NOISE CHOPPER-STABILIZED OPERATIONAL AMPLIFIERS SLOS020G - NOVEMBER 1988 - REVISED APRIL 2001 APPLICATION INFORMATION theory of operation (continued) During the nulling phase, switch A is closed, shorting the nulling amplifier inputs together and allowing the nulling amplifier to reduce its own input offset voltage by feeding its output signal back to an inverting input node. Simultaneously, external capacitor CXA stores the nulling potential to allow the offset voltage of the amplifier to remain nulled during the amplifying phase. Main IN + 5 + 4 - IN - 10 OUT B A Null + B CXB 7 - A VDD - CXA Pin numbers shown are for the D (14 pin), J, and N packages. Figure 35. TLC2654 Simplified Block Diagram During the amplifying phase, switch B is closed, connecting the output of the nulling amplifier to a noninverting input of the main amplifier. In this configuration, the input offset voltage of the main amplifier is nulled. Also, external capacitor CXB stores the nulling potential to allow the offset voltage of the main amplifier to remain nulled during the next nulling phase. This continuous chopping process allows offset voltage nulling during variations in time and temperature and over the common-mode input voltage range and power supply range. In addition, because the low-frequency signal path is through both the null and main amplifiers, extremely high gain is achieved. The low-frequency noise of a chopper amplifier depends on the magnitude of the component noise prior to chopping and the capability of the circuit to reduce this noise while chopping. The use of the Advanced LinCMOS process, with its low-noise analog MOS transistors and patent-pending input stage design, significantly reduces the input noise voltage. The primary source of nonideal operation in chopper-stabilized amplifiers is error charge from the switches. As charge imbalance accumulates on critical nodes, input offset voltage can increase especially with increasing chopping frequency. This problem has been significantly reduced in the TLC2654 by use of a patent-pending compensation circuit and the Advanced LinCMOS process. The TLC2654 incorporates a feed-forward design that ensures continuous frequency response. Essentially, the gain magnitude of the nulling amplifier and compensation network crosses unity at the break frequency of the main amplifier. As a result, the high-frequency response of the system is the same as the frequency response of the main amplifier. This approach also ensures that the slewing characteristics remain the same during both the nulling and amplifying phases. The primary limitation on ac performance is the chopping frequency. As the input signal frequency approaches the chopper's clock frequency, intermodulation (or aliasing) errors result from the mixing of these frequencies. To avoid these error signals, the input frequency must be less than half the clock frequency. Most choppers available today limit the internal chopping frequency to less than 500 Hz in order to eliminate errors due to the charge imbalancing phenomenon mentioned previously. However, to avoid intermodulation errors on a 500-Hz chopper, the input signal frequency must be limited to less than 250 Hz. 22 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TLC2654, TLC2654A Advanced LinCMOS LOW-NOISE CHOPPER-STABILIZED OPERATIONAL AMPLIFIERS SLOS020G - NOVEMBER 1988 - REVISED APRIL 2001 APPLICATION INFORMATION theory of operation (continued) The TLC2654 removes this restriction on ac performance by using a 10-kHz internal clock frequency. This high chopping frequency allows amplification of input signals up to 5 kHz without errors due to intermodulation and greatly reduces low-frequency noise. THERMAL INFORMATION temperature coefficient of input offset voltage Figure 36 shows the effects of package-included thermal EMF. The TLC2654 can null only the offset voltage within its nulling loop. There are metal-to-metal junctions outside the nulling loop (bonding wires, solder joints, etc.) that produce EMF. In Figure 36, a TLC2654 packaged in a 14-pin plastic package (N package) was placed in an oven at 25C at t = 0, biased up, and allowed to stabilize. At t = 3 min, the oven was turned on and allowed to rise in temperature to 125C. As evidenced by the curve, the overall change in input offset voltage with temperature is less than the specified maximum limit of 0.05 V/C. 4 0.04 0 0 0.1 F V IO - Input Offset Voltage - - 0.04 -4 -8 - 0.08 - 12 - 0.12 - 15 - 0.16 - 18 0 3 6 9 12 15 18 21 24 27 30 aVIO - Temperature Coefficient of VIO V/ C Input Offset Voltage - uV/C 0.08 V 8 50 k IN - 5V 4 100 5 IN + - VIO = VO /1000 10 OUT + -5 V 0.1 F 50 k VO - 0.2 t - Time - min Pin numbers shown are for the D (14-pin), J, and N packages. Figure 36. Effects of Package-Induced Thermal EMF POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 23 TLC2654, TLC2654A Advanced LinCMOS LOW-NOISE CHOPPER-STABILIZED OPERATIONAL AMPLIFIERS SLOS020G - NOVEMBER 1988 - REVISED APRIL 2001 MECHANICAL DATA D (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 14 PINS SHOWN 0.050 (1,27) 0.020 (0,51) 0.014 (0,35) 14 0.010 (0,25) M 8 0.008 (0,20) NOM 0.244 (6,20) 0.228 (5,80) 0.157 (4,00) 0.150 (3,81) Gage Plane 0.010 (0,25) 1 7 0- 8 A 0.044 (1,12) 0.016 (0,40) Seating Plane 0.069 (1,75) MAX 0.010 (0,25) 0.004 (0,10) PINS ** 0.004 (0,10) 8 14 16 A MAX 0.197 (5,00) 0.344 (8,75) 0.394 (10,00) A MIN 0.189 (4,80) 0.337 (8,55) 0.386 (9,80) DIM 4040047 / D 10/96 NOTES: A. B. C. D. 24 All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15). Falls within JEDEC MS-012 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TLC2654, TLC2654A Advanced LinCMOS LOW-NOISE CHOPPER-STABILIZED OPERATIONAL AMPLIFIERS SLOS020G - NOVEMBER 1988 - REVISED APRIL 2001 MECHANICAL DATA FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER 28 TERMINAL SHOWN 18 17 16 15 14 13 NO. OF TERMINALS ** 12 19 11 20 10 A B MIN MAX MIN MAX 20 0.342 (8,69) 0.358 (9,09) 0.307 (7,80) 0.358 (9,09) 28 0.442 (11,23) 0.458 (11,63) 0.406 (10,31) 0.458 (11,63) 21 9 22 8 44 0.640 (16,26) 0.660 (16,76) 0.495 (12,58) 0.560 (14,22) 23 7 52 0.739 (18,78) 0.761 (19,32) 0.495 (12,58) 0.560 (14,22) 24 6 68 25 5 0.938 (23,83) 0.962 (24,43) 0.850 (21,6) 0.858 (21,8) 84 1.141 (28,99) 1.165 (29,59) 1.047 (26,6) 1.063 (27,0) B SQ A SQ 26 27 28 1 2 3 4 0.080 (2,03) 0.064 (1,63) 0.020 (0,51) 0.010 (0,25) 0.020 (0,51) 0.010 (0,25) 0.055 (1,40) 0.045 (1,14) 0.045 (1,14) 0.035 (0,89) 0.045 (1,14) 0.035 (0,89) 0.028 (0,71) 0.022 (0,54) 0.050 (1,27) 4040140 / D 10/96 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a metal lid. The terminals are gold plated. Falls within JEDEC MS-004 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 25 TLC2654, TLC2654A Advanced LinCMOS LOW-NOISE CHOPPER-STABILIZED OPERATIONAL AMPLIFIERS SLOS020G - NOVEMBER 1988 - REVISED APRIL 2001 MECHANICAL DATA J (R-GDIP-T**) CERAMIC DUAL-IN-LINE PACKAGE 14 PIN SHOWN PINS ** 14 16 18 20 A MAX 0.310 (7,87) 0.310 (7,87) 0.310 (7,87) 0.310 (7,87) A MIN 0.290 (7,37) 0.290 (7,37) 0.290 (7,37) 0.290 (7,37) B MAX 0.785 (19,94) 0.785 (19,94) 0.910 (23,10) 0.975 (24,77) B MIN 0.755 (19,18) 0.755 (19,18) C MAX 0.300 (7,62) 0.300 (7,62) 0.300 (7,62) 0.300 (7,62) C MIN 0.245 (6,22) 0.245 (6,22) 0.245 (6,22) 0.245 (6,22) DIM B 14 8 C 1 7 0.065 (1,65) 0.045 (1,14) 0.100 (2,54) 0.070 (1,78) 0.020 (0,51) MIN 0.930 (23,62) A 0.200 (5,08) MAX Seating Plane 0.130 (3,30) MIN 0.100 (2,54) 0-15 0.023 (0,58) 0.015 (0,38) 0.014 (0,36) 0.008 (0,20) 4040083/D 08/98 NOTES: A. B. C. D. E. 26 All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a ceramic lid using glass frit. Index point is provided on cap for terminal identification on press ceramic glass frit seal only. Falls within MIL STD 1835 GDIP1-T14, GDIP1-T16, GDIP1-T18, GDIP1-T20, and GDIP1-T22. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TLC2654, TLC2654A Advanced LinCMOS LOW-NOISE CHOPPER-STABILIZED OPERATIONAL AMPLIFIERS SLOS020G - NOVEMBER 1988 - REVISED APRIL 2001 MECHANICAL DATA JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE PACKAGE 0.400 (10,20) 0.355 (9,00) 8 5 0.280 (7,11) 0.245 (6,22) 1 4 0.065 (1,65) 0.045 (1,14) 0.310 (7,87) 0.290 (7,37) 0.020 (0,51) MIN 0.200 (5,08) MAX Seating Plane 0.130 (3,30) MIN 0.063 (1,60) 0.015 (0,38) 0.100 (2,54) 0-15 0.023 (0,58) 0.015 (0,38) 0.014 (0,36) 0.008 (0,20) 4040107/C 08/96 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a ceramic lid using glass frit. Index point is provided on cap for terminal identification on press ceramic glass frit seal only. Falls within MIL-STD-1835 GDIP1-T8 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 27 TLC2654, TLC2654A Advanced LinCMOS LOW-NOISE CHOPPER-STABILIZED OPERATIONAL AMPLIFIERS SLOS020G - NOVEMBER 1988 - REVISED APRIL 2001 MECHANICAL DATA N (R-PDIP-T**) PLASTIC DUAL-IN-LINE PACKAGE 16 PIN SHOWN PINS ** 14 16 18 20 A MAX 0.775 (19,69) 0.775 (19,69) 0.920 (23.37) 0.975 (24,77) A MIN 0.745 (18,92) 0.745 (18,92) 0.850 (21.59) 0.940 (23,88) DIM A 16 9 0.260 (6,60) 0.240 (6,10) 1 8 0.070 (1,78) MAX 0.035 (0,89) MAX 0.310 (7,87) 0.290 (7,37) 0.020 (0,51) MIN 0.200 (5,08) MAX Seating Plane 0.125 (3,18) MIN 0.100 (2,54) 0.021 (0,53) 0.015 (0,38) 0.010 (0,25) M 0- 15 0.010 (0,25) NOM 14/18 PIN ONLY 4040049/C 08/95 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Falls within JEDEC MS-001 (20 pin package is shorter then MS-001.) 28 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TLC2654, TLC2654A Advanced LinCMOS LOW-NOISE CHOPPER-STABILIZED OPERATIONAL AMPLIFIERS SLOS020G - NOVEMBER 1988 - REVISED APRIL 2001 MECHANICAL DATA P (R-PDIP-T8) PLASTIC DUAL-IN-LINE PACKAGE 0.400 (10,60) 0.355 (9,02) 8 5 0.260 (6,60) 0.240 (6,10) 1 4 0.070 (1,78) MAX 0.310 (7,87) 0.290 (7,37) 0.020 (0,51) MIN 0.200 (5,08) MAX Seating Plane 0.125 (3,18) MIN 0.100 (2,54) 0.021 (0,53) 0.015 (0,38) 0- 15 0.010 (0,25) M 0.010 (0,25) NOM 4040082 / B 03/95 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Falls within JEDEC MS-001 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 29 PACKAGE OPTION ADDENDUM www.ti.com 15-Oct-2009 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty Lead/Ball Finish MSL Peak Temp (3) 5962-9089502M2A ACTIVE LCCC FK 20 1 TBD 5962-9089502MCA ACTIVE CDIP J 14 1 TBD POST-PLATE N / A for Pkg Type A42 N / A for Pkg Type 5962-9089502MPA ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type 5962-9089504QCA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type 5962-9089504QPA ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type TLC2654AC-8D ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC2654AC-8DG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC2654AC-8DR OBSOLETE SOIC D 8 TBD Call TI TLC2654ACP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLC2654ACPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLC2654AI-8D ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC2654AI-8DG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC2654AIP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLC2654AIPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type Call TI TLC2654AMJB ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type TLC2654AMJGB ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type TLC2654AQ-8D ACTIVE SOIC D 8 75 TBD CU NIPDAU Level-1-220C-UNLIM TLC2654AQ-8DG4 ACTIVE SOIC D 8 CU NIPDAU Level-1-260C-UNLIM 1000 Green (RoHS & no Sb/Br) TLC2654C-14D OBSOLETE SOIC D 14 TLC2654C-14DR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) TBD CU NIPDAU Level-1-260C-UNLIM TLC2654C-14DRG4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC2654C-8D ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC2654C-8DG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC2654C-8DR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC2654C-8DRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC2654CN ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLC2654CNE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLC2654CP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLC2654CPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type Addendum-Page 1 Call TI Call TI PACKAGE OPTION ADDENDUM www.ti.com 15-Oct-2009 Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TLC2654I-8D ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC2654I-8DG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC2654I-8DR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC2654I-8DRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC2654IP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLC2654IPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLC2654MFKB ACTIVE LCCC FK 20 1 TBD Lead/Ball Finish MSL Peak Temp (3) POST-PLATE N / A for Pkg Type TLC2654MJB OBSOLETE CDIP J 14 TBD Call TI TLC2654MJGB ACTIVE CDIP JG 8 1 TBD A42 TLC2654Q-8D ACTIVE SOIC D 8 75 TBD CU NIPDAU Level-1-220C-UNLIM TLC2654Q-8DG4 ACTIVE SOIC D 8 CU NIPDAU Level-1-260C-UNLIM 1000 Green (RoHS & no Sb/Br) Call TI N / A for Pkg Type (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 11-Mar-2008 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel Diameter Width (mm) W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TLC2654C-14DR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 TLC2654C-8DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLC2654I-8DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 11-Mar-2008 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TLC2654C-14DR SOIC D 14 2500 346.0 346.0 33.0 TLC2654C-8DR SOIC D 8 2500 346.0 346.0 29.0 TLC2654I-8DR SOIC D 8 2500 346.0 346.0 29.0 Pack Materials-Page 2 MECHANICAL DATA MLCC006B - OCTOBER 1996 FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER 28 TERMINAL SHOWN 18 17 16 15 14 13 NO. OF TERMINALS ** 12 19 11 20 10 A B MIN MAX MIN MAX 20 0.342 (8,69) 0.358 (9,09) 0.307 (7,80) 0.358 (9,09) 28 0.442 (11,23) 0.458 (11,63) 0.406 (10,31) 0.458 (11,63) 21 9 22 8 44 0.640 (16,26) 0.660 (16,76) 0.495 (12,58) 0.560 (14,22) 23 7 52 0.739 (18,78) 0.761 (19,32) 0.495 (12,58) 0.560 (14,22) 24 6 68 0.938 (23,83) 0.962 (24,43) 0.850 (21,6) 0.858 (21,8) 84 1.141 (28,99) 1.165 (29,59) 1.047 (26,6) 1.063 (27,0) B SQ A SQ 25 5 26 27 28 1 2 3 4 0.080 (2,03) 0.064 (1,63) 0.020 (0,51) 0.010 (0,25) 0.020 (0,51) 0.010 (0,25) 0.055 (1,40) 0.045 (1,14) 0.045 (1,14) 0.035 (0,89) 0.045 (1,14) 0.035 (0,89) 0.028 (0,71) 0.022 (0,54) 0.050 (1,27) 4040140 / D 10/96 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a metal lid. The terminals are gold plated. Falls within JEDEC MS-004 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 MECHANICAL DATA MCER001A - JANUARY 1995 - REVISED JANUARY 1997 JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE 0.400 (10,16) 0.355 (9,00) 8 5 0.280 (7,11) 0.245 (6,22) 1 0.063 (1,60) 0.015 (0,38) 4 0.065 (1,65) 0.045 (1,14) 0.310 (7,87) 0.290 (7,37) 0.020 (0,51) MIN 0.200 (5,08) MAX Seating Plane 0.130 (3,30) MIN 0.023 (0,58) 0.015 (0,38) 0-15 0.100 (2,54) 0.014 (0,36) 0.008 (0,20) 4040107/C 08/96 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a ceramic lid using glass frit. Index point is provided on cap for terminal identification. Falls within MIL STD 1835 GDIP1-T8 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 MECHANICAL DATA MPDI001A - JANUARY 1995 - REVISED JUNE 1999 P (R-PDIP-T8) PLASTIC DUAL-IN-LINE 0.400 (10,60) 0.355 (9,02) 8 5 0.260 (6,60) 0.240 (6,10) 1 4 0.070 (1,78) MAX 0.325 (8,26) 0.300 (7,62) 0.020 (0,51) MIN 0.015 (0,38) Gage Plane 0.200 (5,08) MAX Seating Plane 0.010 (0,25) NOM 0.125 (3,18) MIN 0.100 (2,54) 0.021 (0,53) 0.015 (0,38) 0.430 (10,92) MAX 0.010 (0,25) M 4040082/D 05/98 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Falls within JEDEC MS-001 For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI's terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. 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