M27C1024
1 Mbit (64Kb x16) UV EPROM and OTP EPROM
September 1998 1/15
AI00702B
16
A0-A15
P
Q0-Q15
VPP
VCC
M27C1024
G
E
VSS
16
Figure 1. LogicDiagram
5V ±10% SUPPLYVOLTAGEin READ
OPERATION
FASTACCESS TIME: 35ns
LOW POWER CONSUMPTION:
– Active Current 35mAat 5MHz
– StandbyCurrent 100µA
PROGRAMMING VOLTAGE:12.75V ±0.25V
PROGRAMMING TIME: 100µs/byte (typical)
ELECTRONICSIGNATURE
– ManufacturerCode: 0020h
– Device Code: 008Ch
DESCRIPTION
The M27C1024 is a 1 Mbit EPROM offered in the
two ranges UV (ultra violet erase) and OTP (one
time programmable). It is ideally suited for micro-
processorsystems requiringlargedata or program
storage and is organized as 65,536 words of 16
bits.
The FDIP40W(window ceramic frit-seal package)
has a transparent lid which allows the user to
expose the chip to ultraviolet light to erase the bit
pattern. A new pattern can then be written to the
deviceby following the programming procedure.
For application where the content is programmed
only one time and erasure is not required, the
M27C1024 is offered in PDIP40, PLCC44 and
TSOP40(10 x 14mm) packages.
A0-A15 Address Inputs
Q0-Q15 Data Outputs
E Chip Enable
G Output Enable
P Program
VPP Program Supply
VCC Supply Voltage
VSS Ground
Table1. SignalNames
1
40
FDIP40W (F)
PLCC44 (C) TSOP40 (N)
10 x 14mm
1
40
PDIP40 (B)
Q6
Q5
Q4
Q11
Q8
VSS
Q7
Q10
Q9
A12
A8
A11
A10
A6
A13
A9
VSS
A7
A2Q1
Q0 A0G A1
A5
NC
PE
Q12
VPP VCC
Q15
AI00703
M27C1024
8
1
2
3
4
5
6
7
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
2120
19
18
17
Q3
Q2
Q14
Q13
A4
A3
40
39
38
37
36
35
34
33
A14
A15
Figure 2A. DIPPin Connections
AI00704
A14
A11
A7
A3
23
Q6
Q5
Q4
Q3
Q2
NC
A2
Q12
Q8
VSS
NC
Q11
Q10
12
A15
A9
1
Q15
VSS
A12
Q13
A5
44
NC
NC
M27C1024
Q14
A13
A4
NC
A6
34
Q1
Q9 A10
A8Q7
Q0
G
A0
A1
VPP
E
P
VCC
Figure 2B. LCC PinConnections
Warning: NC = Not Connected.
DEVICEOPERATION
The modes of operations of the M27C1024 are
listedinthe OperatingModestable. Asingle power
supply is required in the read mode. All inputs are
TTL levels except for Vpp and 12V on A9 for
ElectronicSignature.
Read Mode
The M27C1024 has two control functions, both of
which must be logically active in order to obtain
data at the outputs.Chip Enable(E) is the power
control and should be used for device selection.
OutputEnable(G) is the outputcontroland should
be used to gate data to the output pins, inde-
pendent of device selection. Assuming that the
addresses are stable, the address access time
(tAVQV)isequaltothedelayfromEtooutput(tELQV).
Data is available at the output after a delay of tOE
from the falling edge of G, assuming that E has
been low and the addresseshave been stable for
at leasttAVQV-tGLQV.
Standby Mode
The M27C1024 has a standby mode which re-
ducestheactive current from 35mAto 100µA.
The M27C1024 is placed in the standby mode by
applyinga TTLhigh signal to theE input. When in
thestandbymode,theoutputsare inahighimped-
ance state,independentof the G input.
Warning: NC = Not Connected.
DQ6
DQ3
DQ2
DQ13
DQ8 DQ7
DQ10
DQ9
A14
A8
A11
A10
A4
A15
A9
G
A7
A2
DQ1
DQ0
A0
A1
A3
NC
P
E
DQ14
VPP
VCC
DQ15
AI01582
M27C1024
(Normal)
10
1
11
20 21
30
31
40
VSS
A12 A6
A13 A5
DQ12 DQ4
DQ11 DQ5
VSS
Figure 2C. TSOPPin Connections
Warning: NC = Not Connected.
2/15
M27C1024
Symbol Parameter Value Unit
TAAmbient Operating Temperature (3) –40 to125 °C
TBIAS Temperature Under Bias –50 to125 °C
TSTG Storage Temperature –65 to150 °C
VIO (2) Input or Output Voltages (except A9) –2 to 7 V
VCC Supply Voltage –2 to7 V
VA9 (2) A9 Voltage –2 to13.5 V
VPP Program Supply Voltage –2 to14 V
Notes: 1. Except for therating ”Operating Temperature Range”, stresses above those listed in theTable ”AbsoluteMaximum Ratings”
may cause permanentdamage to thedevice. These are stress ratings only and operation of the device at these or any other
conditions above those indicated in the Operatingsections of this specification is notimplied.Exposure to Absolute Maximum
Rating conditions for extended periods may affectdevice reliability.Refer also tothe STMicroelectronics SURE Program and other
relevant quality documents.
2. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0Vfor a period less than 20ns. Maximum DC
voltage on Output is VCC +0.5Vwith possible overshoot to VCC +2V for a period less than 20ns.
3. Depends on range.
Table2. Absolute MaximumRatings(1)
Mode E G P A9 VPP Q0 - Q15
Read VIL VIL VIH XV
CC or VSS Data Output
Output Disable VIL VIH XXV
CC or VSS Hi-Z
Program VIL XV
IL Pulse X VPP Data Input
Verify VIL VIL VIH XV
PP Data Output
Program Inhibit VIH XXXV
PP Hi-Z
Standby VIH XXXV
CC or VSS Hi-Z
Electronic Signature VIL VIL VIH VID VCC Codes
Note: X=V
IH or VIL,V
ID = 12V ±0.5V
Table3. OperatingModes
Identifier A0 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 Hex Data
Manufacturer’s Code VIL 00100000 20h
Device Code VIH 100011008Ch
Note: OutputsQ8-Q15 are set to ’0’.
Table4. ElectronicSignature
3/15
M27C1024
AI01822
3V
High Speed
0V
1.5V
2.4V
Standard
0.4V
2.0V
0.8V
Figure 3. AC TestingInput Output Waveform
AI01823B
1.3V
OUT
CL
CL= 30pF for High Speed
CL= 100pF for Standard
CLincludes JIG capacitance
3.3kΩ
1N914
DEVICE
UNDER
TEST
Figure 4. AC Testing Load Circuit
High Speed Standard
Input Rise and Fall Times ≤10ns ≤20ns
Input Pulse Voltages 0 to 3V 0.4V to 2.4V
Input and Output Timing Ref. Voltages 1.5V 0.8V and 2V
Table5. AC MeasurementConditions
Symbol Parameter Test Condition Min Max Unit
CIN Input Capacitance VIN =0V 6 pF
C
OUT Output Capacitance VOUT =0V 12 pF
Note: 1. Sampled only, not 100% tested.
Table6. Capacitance(1) (TA=25°C, f =1 MHz)
Two Line Output Control
BecauseEPROMsareusuallyusedinlargermem-
ory arrays, this product features a 2 line control
functionwhich accommodatesthe use of multiple
memory connection. The two line control function
allows:
a. the lowest possiblememory power dissipation,
b. completeassurancethat output bus contention
will not occur.
Forthemostefficientuseofthesetwocontrollines,
E should be decoded and used as the primary
deviceselectingfunction,while G should be made
a common connection to all devices in the array
and connected to the READ line from the system
controlbus.Thisensures that all deselectedmem-
ory devices are in their low power standby mode
and that the output pins are only active when data
is requiredfrom a particularmemory device.
SystemConsiderations
The power switching characteristics of Advanced
CMOSEPROMs require careful decouplingof the
devices. The supply current, ICC, has three seg-
ments that are of interest to the system designer :
the standby current level, the active current level,
and transient current peaks that are produced by
thefalling and rising edgesof E. Themagnitudeof
transientcurrentpeaksisdependentonthecapaci-
tive and inductive loading of the device at the
output.
4/15
M27C1024
Symbol Parameter Test Condition Min Max Unit
ILI Input Leakage Current 0V ≤VIN ≤VCC ±10 µA
ILO Output Leakage Current 0V ≤VOUT ≤VCC ±10 µA
ICC Supply Current E=V
IL,G=V
IL,
IOUT = 0mA, f = 5MHz 35 mA
ICC1 Supply Current (Standby) TTL E = VIH 1mA
I
CC2 Supply Current (Standby) CMOS E > VCC – 0.2V 100 µA
IPP Program Current VPP =V
CC 100 µA
VIL Input Low Voltage –0.3 0.8 V
VIH (2) Input High Voltage 2 VCC +1 V
V
OL Output Low Voltage IOL = 2.1mA 0.4 V
VOH Output High VoltageTTL IOH = –400µA 2.4 V
Output High VoltageCMOS IOH = –100µAV
CC – 0.7 V
Notes: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously with or afterVPP.
2. Maximum DCvoltage on Output is VCC +0.5V.
Table7. Read Mode DC Characteristics(1)
(TA=0 to 70 °C, –40 to 85 °C; –40 to 105 °C or –40 to 125 °C; VCC =5V±5% or 5V ±10%;VPP =V
CC)
Symbol Alt Parameter Test Condition M27C1024 Unit
-35 (3) -45 (3) -55 (3)
Min Max Min Max Min Max
tAVQV tACC Address Valid to Output Valid E = VIL,G=V
IL 35 45 55 ns
tELQV tCE Chip Enable Low to Output Valid G = VIL 35 45 55 ns
tGLQV tOE Output Enable Low to Output Valid E = VIL 20 25 30 ns
tEHQZ (2) tDF Chip Enable High to Output Hi-Z G = VIL 030030030ns
t
GHQZ (2) tDF Output Enable High to Output Hi-Z E = VIL 030030030ns
t
AXQX tOH Address Transition to Output
Transition E=V
IL,G=V
IL 000ns
Notes: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously with or afterVPP.
2. Sampled only,not 100% tested.
3. Speed obtainedwith High Speed AC measurementconditions.
Table8A. ReadMode AC Characteristics (1)
(TA=0 to 70 °C, –40 to 85 °C; –40 to 105 °C or –40 to 125 °C; VCC =5V±5% or 5V ±10%;VPP =V
CC)
5/15
M27C1024
Symbol Alt Parameter Test Condition
M27C1024
Unit
-70 -80/-90 -10/-12/
-15/-20
Min Max Min Max Min Max
tAVQV tACC Address Valid to Output Valid E = VIL,G=V
IL 70 80 100 ns
tELQV tCE Chip Enable Low to Output Valid G = VIL 70 80 100 ns
tGLQV tOE Output Enable Low to Output Valid E = VIL 35 40 50 ns
tEHQZ (2) tDF Chip Enable High to Output Hi-Z G = VIL 0 30 0 30 0 30 ns
tGHQZ (2) tDF Output Enable High to Output Hi-Z E = VIL 0 30 0 30 0 30 ns
tAXQX tOH Address Transition to Output
Transition E=V
IL,G=V
IL 000ns
Notes: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously with or afterVPP.
2. Sampled only,not 100% tested.
Table8B. ReadMode AC Characteristics (1)
(TA=0 to 70 °C, –40 to 85 °C; –40 to 105 °C or –40 to 125 °C; VCC =5V±5% or 5V ±10%;VPP =V
CC)
AI00705B
tAXQX
tEHQZ
A0-A15
E
G
Q0-Q15
tAVQV
tGHQZ
tGLQV
tELQV
VALID
Hi-Z
VALID
Figure 5. ReadMode AC Waveforms
6/15
M27C1024
Symbol Parameter Test Condition Min Max Unit
ILI Input Leakage Current 0 ≤VIN ≤VIH ±10 µA
ICC Supply Current 50 mA
IPP Program Current E = VIL 50 mA
VIL Input Low Voltage –0.3 0.8 V
VIH Input High Voltage 2 VCC + 0.5 V
VOL Output Low Voltage IOL = 2.1mA 0.4 V
VOH Output High VoltageTTL IOH = –400µA 2.4 V
VID A9 Voltage 11.5 12.5 V
Note: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously with or afterVPP.
Table9. ProgrammingMode DC Characteristics (1)
(TA=25°C; VCC =6.25V ±0.25V;VPP =12.75V ±0.25V)
Symbol Alt Parameter Test Condition Min Max Unit
tAVPL tAS Address Validto Program Low 2 µs
tQVPL tDS Input Validto Program Low 2 µs
tVPHPL tVPS VPP High to ProgramLow 2 µs
tVCHPL tVCS VCC High to Program Low 2 µs
tELPL tCES Chip Enable Low to Program Low 2 µs
tPLPH tPW Program Pulse Width 95 105 µs
tPHQX tDH Program High to Input Transition 2 µs
tQXGL tOES Input Transition to Output Enable
Low 2µs
tGLQV tOE Output EnableLow to Output Valid 100 ns
tGHQZ (2) tDFP Output EnableHigh to Output Hi-Z 0 130 ns
tGHAX tAH Output EnableHigh to Address
Transition 0ns
Notes: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously with or afterVPP.
2. Sampled only,not 100% tested.
Table10. ProgrammingMode AC Characteristics(1)
(TA=25°C; VCC =6.25V ±0.25V;VPP =12.75V ±0.25V)
7/15
M27C1024
tAVPL
VALID
AI00706
A0-A15
Q0-Q15
VPP
VCC
P
G
DATA IN DATA OUT
E
tQVPL
tVPHPL
tVCHPL
tPHQX
tPLPH
tGLQV
tQXGL
tELPL
tGHQZ
tGHAX
PROGRAM VERIFY
Figure 6. Programmingand VerifyModes AC Waveforms
The associated transient voltage peaks can be
suppressed by complying with the two line output
control and by properly selected decoupling ca-
pacitors. It is recommendedthat a 0.1µF ceramic
capacitor be used on every device between VCC
andVSS. Thisshouldbea highfrequencycapacitor
of low inherent inductance and should be placed
as close to the device as possible. In addition, a
4.7µF bulk electrolytic capacitor should be used
betweenVccand VSS for every eight devices. The
bulk capacitor should be located near the power
supply connection point. The purpose of the bulk
capacitoris to overcome the voltage drop caused
by the inductiveeffects of PCB traces.
Programming
Whendelivered(and aftereach’1’serasureforUV
EPROM), all bits of the M27C1024 are in the ’1’
state. Data is introduced by selectively program-
ming ’0’s into the desired bit locations. Although
only’0’swillbe programmed,both ’1’s and’0’scan
be present in the data word. The only way to
changea ’0’toa ’1’is by dieexposureto ultraviolet
light (UV EPROM). The M27C1024 is in the pro-
gramming mode when VPP inputis at 12.75V,E is
at VIL and P is pulsed to VIL. The data to be
programmed is appliedto 16 bits in parallel to the
data output pins. The levels required for the ad-
dressand data inputs are TTL. VCC is specified to
be 6.25V ±
0.25V.
PRESTOII ProgrammingAlgorithm
PRESTO II Programming Algorithm allows pro-
gramming of the whole array with a guaranteed
margin, in a typical timeof 6.5 seconds.Program-
ming with PRESTO II consists of applying a se-
quenceof100µsprogrampulsestoeachworduntil
a correct verify occurs (see Figure 7). During pro-
gramming and verify operation,a MARGINMODE
circuit isautomaticallyactivatedin orderto guaran-
tee that each cell is programmed with enough
margin. Nooverprogrampulseisappliedsincethe
verify in MARGIN MODE provides necessarymar-
gin to each programmedcell.
DEVICEOPERATION (cont’d)
8/15
M27C1024
AI00707C
n=0
Last
Addr
VERIFY
P = 100µs Pulse
++n
=25 ++ Addr
VCC = 6.25V, VPP = 12.75V
FAIL
CHECK ALL WORDS
1st: VCC =6V
2nd: VCC = 4.2V
YES
NO
YES
NO
YES
NO
Figure 7. ProgrammingFlowchart
Program Inhibit
Programming of multiple M27C1024s in parallel
with different data is also easily accomplished.
Except for E, all like inputs including G of the
parallel M27C1024 may be common. A TTL low
level pulse applied to a M27C1024’sP input, with
E low and VPP at 12.75V, will program that
M27C1024. Ahigh level E input inhibits the other
M27C1024sfrom beingprogrammed.
Program Verify
A verify (read) should be performed on the pro-
grammedbitsto determinethattheywerecorrectly
programmed. The verify is accomplished with E
and G at VIL, P at VIH,V
PP at 12.75V and VCC at
6.25V.
On-Board Programming
TheM27C1024can be directlyprogrammedin the
application circuit. See the relevant Application
NoteAN620.
ElectronicSignature
The Electronic Signature (ES) mode allows the
readingout of a binary code from an EPROMthat
will identify its manufacturerand type. This mode
is intended for use by programming equipment to
automaticallymatch the device to be programmed
withitscorrespondingprogrammingalgorithm.The
ES mode is functional in the 25°C±5°Cambient
temperaturerange that is required whenprogram-
mingthe M27C1024.To activatethe ESmode, the
programmingequipmentmustforce11.5Vto12.5V
on address line A9 of the M27C1024 with VPP =
VCC = 5V. Two identifier bytes may then be se-
quenced from the device outputs by toggling ad-
dresslineA0fromVIL toVIH. Allotheraddresslines
must be held at VIL during Electronic Signature
mode. Byte 0 (A0=VIL) represents the manufac-
turercodeandbyte1(A0=VIH) thedeviceidentifier
code. For the STMicroelectronics M27C1024,
these two iden-tifierbytesare given in Table 4 and
canbe read-out on outputsQ0 to Q7.
ERASUREOPERATION (appliesto UV EPROM)
The erasure characteristics of the M27C1024 is
such that erasure begins when the cells are ex-
posed to light with wavelengths shorter than ap-
proximately4000Å.It shouldbe notedthatsunlight
and some type of fluorescent lamps have wave-
lengthsin the3000-4000Årange.Researchshows
that constant exposure to room level fluorescent
lightingcoulderasea typicalM27C1024in about3
years,while it would take approximately1 weekto
cause erasure when exposed to direct sunlight. If
the M27C1024 is to be exposed to these types of
lighting conditions for extended periods of time, it
is suggested that opaque labels be put over the
M27C1024 window to prevent unintentional era-
sure.Therecommendederasureprocedureforthe
M27C1024 is exposure to short wave ultraviolet
lightwhichhas wavelength2537Å. Theintegrated
dose(i.e. UVintensityx exposuretime)forerasure
should be a minimum of 15 W-sec/cm2. The era-
sure time with this dosage is approximately15 to
20 minutes using an ultraviolet lamp with
12000 µW/cm2power rating. The M27C1024
shouldbe placedwithin2.5 cm (1inch)of thelamp
tubesduring the erasure.Somelamps havea filter
on their tubes which should be removed before
erasure.
9/15
M27C1024
ORDERING INFORMATION SCHEME
Speed
-35 (1) 35ns
-45 (1) 45ns
-55 (1) 55ns
-70 70ns
-80 80ns
-90 90ns
-10 100ns
-12 120ns
-15 150ns
-20 200ns
-10 100ns
VCC Tolerance
blank ±10%
X±5%
Package
F FDIP40W
B PDIP40
C PLCC44
N TSOP40
10 x 14mm
Temperature Range
1 0 to 70 °C
6 –40 to 85 °C
7 –40 to 105 °C
3 –40 to 125 °C
Option
X Additional
Burn-in
TR Tape& Reel
Packing
Example: M27C1024 -12 X C 1 X
Note: 1. High Speed, see AC Characteristics section for furtherinformation.
Fora list ofavailableoptions(Speed,Package,etc...)or for furtherinformationon anyaspect of thisdevice,
please contactthe STMicroelectronics Sales Officenearest to you.
10/15
M27C1024
FDIP40W - 40 pin Ceramic Frit-sealDIP, with window
FDIPW-a
A3
A1
A
L
B1 B e
D
S
E1 E
N
1
C
α
eA
D2
∅
eB
A2
Symb mm inches
Typ Min Max Typ Min Max
A 5.72 0.225
A1 0.51 1.40 0.020 0.055
A2 3.91 4.57 0.154 0.180
A3 3.89 4.50 0.153 0.177
B 0.41 0.56 0.016 0.022
B1 1.45 – – 0.057 – –
C 0.23 0.30 0.009 0.012
D 51.79 52.60 2.039 2.071
D2 48.26 – – 1.900 – –
E 15.24 – – 0.600 – –
E1 13.06 13.36 0.514 0.526
e 2.54 – – 0.100 – –
eA 14.99 – – 1.900 – –
eB 16.18 18.03 0.637 0.710
L 3.18 0.125
S 1.52 2.49 0.060 0.098
∅8.13 – – 0.320 – –
α4°11°4°11°
N40 40
Drawing is not to scale.
11/15
M27C1024
PDIP40 - 40 pin Plastic DIP, 600 mils width
PDIP
A2
A1
A
L
B1 B e1
D
S
E1 E
N
1
C
α
eA
eB
D2
Symb mm inches
Typ Min Max Typ Min Max
A 4.45 – – 0.175 – –
A1 0.64 0.38 – 0.025 0.015 –
A2 3.56 3.91 0.140 0.154
B 0.38 0.53 0.015 0.021
B1 1.14 1.78 0.045 0.070
C 0.20 0.31 0.008 0.012
D 51.78 52.58 2.039 2.070
D2 48.26 – – 1.900 – –
E 14.80 16.26 0.583 0.640
E1 13.46 13.99 0.530 0.551
e1 2.54 – – 0.100 – –
eA 15.24 – – 0.600 –
eB 15.24 17.78 0.600 0.700
L 3.05 3.81 0.120 0.150
S 1.52 2.29 0.060 0.090
α0°15°0É 15°
N40 40
Drawing is not to scale.
12/15
M27C1024
PLCC44 - 44 lead Plastic Leaded Chip Carrier, square
PLCC
D
Ne E1 E
1N
D1
Nd
CP
B
D2/E2 e
B1
A1
A
R
0.51 (.020)
1.14 (.045)
F
A2
Symb mm inches
Typ Min Max Typ Min Max
A 4.20 4.70 0.165 0.185
A1 2.29 3.04 0.090 0.120
B 0.33 0.53 0.013 0.021
B1 0.66 0.81 0.026 0.032
D 17.40 17.65 0.685 0.695
D1 16.51 16.66 0.650 0.656
D2 14.99 16.00 0.590 0.630
E 17.40 17.65 0.685 0.695
E1 16.51 16.66 0.650 0.656
E2 14.99 16.00 0.590 0.630
e 1.27 – – 0.050 – –
j 0.89 – – 0.035 – –
N44 44
CP 0.10 0.004
Drawing is not to scale.
13/15
M27C1024
TSOP40 - 40 lead Plastic Thin Small Outline, 10 x 14mm
TSOP-a
D1
E
1N
CP
B
e
A2
A
N/2
D
DIE
C
LA1 α
Symb mm inches
Typ Min Max Typ Min Max
A 1.20 0.047
A1 0.05 0.15 0.002 0.006
A2 0.95 1.05 0.037 0.041
B 0.17 0.27 0.007 0.011
C 0.10 0.21 0.004 0.008
D 13.80 14.20 0.543 0.559
D1 12.30 12.50 0.484 0.492
E 9.90 10.10 0.390 0.398
e 0.50 – – 0.020 – –
L 0.50 0.70 0.020 0.028
α0°5°0°5°
N40 40
CP 0.10 0.004
Drawing is not to scale.
14/15
M27C1024
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
ofuse ofsuch informationnor for any infringementof patentsor otherrightsof third parties which may resultfrom its use. No license is granted
by implicationor otherwise underany patent or patent rights of STMicroelectronics. Specificationsmentioned in this publicationare subject to
change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical componentsin life support devices or systems without express writtenapproval of STMicroelectronics.
The ST logois a registered trademark of STMicroelectronics
1998 STMicroelectronics - All Rights Reserved
STMicroelectronics GROUP OF COMPANIES
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15/15
M27C1024
