Universal Serial Bus
Specification
Compaq
Digital Equipment Corporation
IBM PC Company
Intel
Microsoft
NEC
Northern Telecom
Revision 1.0
January 15, 1996
Universal Serial Bus Specification Revision 1.0
2
Scope of this Revision
The 1.0 revision of the specification is intended for product design. Every attempt has been made to ensure a
consistent and implementable specification. Implementations should ensure compliance with this revision.
Revision History
Revision Issue Date Comments
0.7 November 11, 1994 Supersedes 0.6e.
0.8 December 30, 1994 Revisions to Chapters 3-8, 10, and 11. Added
appendixes.
0.9 April 13, 1995 Revisions to all the chapters.
0.99 August 25, 1995 Revisions to all the chapters.
1.0 FDR November 13, 1995 Revisions to Chapters 1, 2, 5-11.
1.0 January 15, 1996 Edits to Chapters 5, 6, 7, 8, 9, 10, and 11 for
consistency.
Proposal for Universal Serial Bus Specification
Copyright © 1996, Compaq Computer Corporation, Digital Equipment Corporation,
IBM PC Company, Intel Corporation, Microsoft Corporation, NEC, Northern Telecom.
All rights reserved.
INTELLECTUAL PROPERTY DISCLAIMER
THIS SPECIFICATION IS PROVIDED “AS IS” WITH NO WARRANTIES WHATSOEVER INCLUDING ANY
WARRANTY OF MERCHANTABILITY, FITNESS FOR ANY PARTICULAR PURPOSE, OR ANY
WARRANTY OTHERWISE ARISING OUT OF ANY PROPOSAL, SPECIFICATION, OR SAMPLE.
A LICENSE IS HEREBY GRANTED TO REPRODUCE AND DISTRIBUTE THIS SPECIFICATION FOR
INTERNAL USE ONLY. NO OTHER LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE,
TO ANY OTHER INTELLECTUAL PROPERTY RIGHTS IS GRANTED OR INTENDED HEREBY.
AUTHORS OF THIS SPECIFICATION DISCLAIM ALL LIABILITY, INCLUDING LIABILITY FOR
INFRINGEMENT OF PROPRIETARY RIGHTS, RELATING TO IMPLEMENTATION OF INFORMATION IN
THIS SPECIFICATION. AUTHORS OF THIS SPECIFICATION ALSO DO NOT WARRANT OR REPRESENT
THAT SUCH IMPLEMENTATION(S) WILL NOT INFRINGE SUCH RIGHTS.
GeoPort and Apple Desktop Bus are trademarks of Apple Computer, Inc.
Windows and Windows NT are trademarks and Microsoft and Win32 are registered trademarks of Microsoft
Corporation.
IBM, PS/2, and Micro Channel are registered trademarks of International Business Machines Corporation.
AT&T is a registered trademark of American Telephone and Telegraph Company.
Compaq is a registered trademark of Compaq Computer Corporation.
UNIX is a registered trademark of UNIX System Laboratories.
I2C is a trademark of Phillips Semiconductors.
DEC is a trademark of Digital Equipment Corporation.
All other product names are trademarks, registered trademarks, or servicemarks of their respective owners.
Please send comments via electronic mail to USB@fes.fm.intel.com
For industry information, refer to the USB Implementers Forum web page at http://www.teleport.com/~USB
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Contents
CHAPTER 1 INTRODUCTION
1.1 Motivation..........................................................................................................................................11
1.2 Objective of the Specification............................................................................................................11
1.3 Scope of the Document.......................................................................................................................12
1.4 Document Organization.....................................................................................................................12
CHAPTER 2 TERMS AND ABBREVIATIONS
CHAPTER 3 BACKGROUND
3.1 Goals for the Universal Serial Bus....................................................................................................23
3.2 Taxonomy of Application Space........................................................................................................23
3.3 Feature List........................................................................................................................................24
3.4 Some Existing Technologies...............................................................................................................26
CHAPTER 4 ARCHITECTURAL OVERVIEW
4.1 USB System Description....................................................................................................................27
4.1.1 Bus Topology................................................................................................................................28
4.2 Physical Interface...............................................................................................................................29
4.2.1 Electrical.......................................................................................................................................29
4.2.2 Mechanical ...................................................................................................................................30
4.3 Power..................................................................................................................................................30
4.3.1 Power Distribution........................................................................................................................30
4.3.2 Power Management.......................................................................................................................30
4.4 Bus Protocol.......................................................................................................................................30
4.5 Robustness..........................................................................................................................................31
4.5.1 Error Detection .............................................................................................................................31
4.5.2 Error Handling..............................................................................................................................31
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4.6 System Configuration.........................................................................................................................31
4.6.1 Attachment of USB Device...........................................................................................................31
4.6.2 Removal of USB Device...............................................................................................................32
4.6.3 Bus Enumeration...........................................................................................................................32
4.6.4 Inter-Layer Relationship................................................................................................................32
4.7 Data Flow Types.................................................................................................................................32
4.7.1 Control Transfers ..........................................................................................................................33
4.7.2 Bulk Transfers...............................................................................................................................33
4.7.3 Interrupt Transfers.........................................................................................................................33
4.7.4 Isochronous Transfers....................................................................................................................33
4.7.5 Allocating USB Bandwidth...........................................................................................................34
4.8 USB Devices........................................................................................................................................34
4.8.1 Device Characterizations...............................................................................................................34
4.8.2 Device Descriptions ......................................................................................................................35
4.9 USB Host: Hardware and Software .................................................................................................37
4.10 Architectural Extensions..................................................................................................................37
CHAPTER 5 USB DATA FLOW MODEL
5.1 Implementer Viewpoints....................................................................................................................39
5.2 Bus Topology......................................................................................................................................41
5.2.1 USB Host......................................................................................................................................41
5.2.2 USB Devices.................................................................................................................................42
5.2.3 Physical Bus Topology..................................................................................................................42
5.2.4 Logical Bus Topology...................................................................................................................43
5.2.5 Client Software to Function Relationship......................................................................................44
5.3 USB Communication Flow.................................................................................................................44
5.3.1 Device Endpoints..........................................................................................................................46
5.3.2 Pipes .............................................................................................................................................47
5.4 Transfer Types...................................................................................................................................49
5.5 Control Transfers...............................................................................................................................50
5.5.1 Data Format..................................................................................................................................50
5.5.2 Direction.......................................................................................................................................51
5.5.3 Packet Size Constraints.................................................................................................................51
5.5.4 Bus Access Constraints .................................................................................................................52
5.5.5 Data Sequences.............................................................................................................................53
5.6 Isochronous Transfers........................................................................................................................54
5.6.1 Data Format..................................................................................................................................54
5.6.2 Direction.......................................................................................................................................54
5.6.3 Packet Size Constraints.................................................................................................................54
5.6.4 Bus Access Constraints .................................................................................................................55
5.6.5 Data Sequences.............................................................................................................................56
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5.7 Interrupt Transfers............................................................................................................................56
5.7.1 Data Format..................................................................................................................................56
5.7.2 Direction.......................................................................................................................................56
5.7.3 Packet Size Constraints.................................................................................................................56
5.7.4 Bus Access Constraints.................................................................................................................57
5.7.5 Data Sequences.............................................................................................................................58
5.8 Bulk Transfers ...................................................................................................................................58
5.8.1 Data Format..................................................................................................................................59
5.8.2 Direction.......................................................................................................................................59
5.8.3 Packet Size Constraints.................................................................................................................59
5.8.4 Bus Access Constraints.................................................................................................................59
5.8.5 Data Sequences.............................................................................................................................60
5.9 Bus Access for Transfers ...................................................................................................................61
5.9.1 Transfer Management ...................................................................................................................61
5.9.2 Transaction Tracking ....................................................................................................................64
5.9.3 Calculating Bus Transaction Times...............................................................................................65
5.9.4 Calculating Buffer Sizes in Functions/Software.............................................................................67
5.9.5 Bus Bandwidth Reclamation.........................................................................................................67
5.10 Special Considerations for Isochronous Transfers.........................................................................67
5.10.1 Example Non-USB Isochronous Application...............................................................................68
5.10.2 USB Clock Model.......................................................................................................................71
5.10.3 Clock Synchronization................................................................................................................73
5.10.4 Isochronous Devices....................................................................................................................73
5.10.5 Data Prebuffering........................................................................................................................81
5.10.6 SOF Tracking..............................................................................................................................82
5.10.7 Error Handling............................................................................................................................82
5.10.8 Buffering for Rate Matching .......................................................................................................83
CHAPTER 6 MECHANICAL
6.1 Architectural Overview.....................................................................................................................85
6.2 Dimensioning Requirements..............................................................................................................85
6.3 Cable...................................................................................................................................................86
6.3.1 Cable Specification.......................................................................................................................86
6.3.2 Connector (Series A).....................................................................................................................90
6.3.3 Connector (Series B).....................................................................................................................96
6.3.4 Serial Bus Icon............................................................................................................................101
6.3.5 Plug/Receptacle Mechanical and Electrical Requirements...........................................................102
6.4 Cable Voltage Drop Requirements..................................................................................................107
6.5 Propagation Delay............................................................................................................................108
6.6 Grounding........................................................................................................................................108
6.7 Regulatory Information...................................................................................................................109
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CHAPTER 7 ELECTRICAL
7.1 Signaling...........................................................................................................................................111
7.1.1 USB Driver Characteristics .........................................................................................................111
7.1.2 Receiver Characteristics..............................................................................................................113
7.1.3 Signal Termination......................................................................................................................114
7.1.4 Signaling Levels..........................................................................................................................115
7.1.5 Data Encoding/Decoding.............................................................................................................121
7.1.6 Bit Stuffing .................................................................................................................................122
7.1.7 Sync Pattern................................................................................................................................123
7.1.8 Initial Frame Interval and Frame Adjustability............................................................................124
7.1.9 Data Signaling Rate.....................................................................................................................124
7.1.10 Data Signal Rise and Fall Time.................................................................................................124
7.1.11 Data Source Signaling...............................................................................................................125
7.1.12 Hub Signaling Timings..............................................................................................................126
7.1.13 Receiver Data Jitter...................................................................................................................127
7.1.14 Cable Delay...............................................................................................................................129
7.1.15 Bus Turnaround Time/Interpacket Delay...................................................................................129
7.1.16 Maximum End to End Signal Delay ..........................................................................................130
7.2 Power Distribution...........................................................................................................................131
7.2.1 Classes of Devices.......................................................................................................................131
7.2.2 Voltage Drop Budget...................................................................................................................135
7.2.3 Power Control During Suspend/Resume......................................................................................136
7.2.4 Dynamic Attach and Detach........................................................................................................136
7.3 Physical Layer..................................................................................................................................137
7.3.1 Environmental.............................................................................................................................137
7.3.2 Bus Timing/Electrical Characteristics .........................................................................................138
7.3.3 Timing Waveforms .....................................................................................................................142
CHAPTER 8 PROTOCOL LAYER
8.1 Bit Ordering.....................................................................................................................................145
8.2 SYNC Field.......................................................................................................................................145
8.3 Packet Field Formats.......................................................................................................................145
8.3.1 Packet Identifier Field.................................................................................................................145
8.3.2 Address Fields.............................................................................................................................146
8.3.3 Frame Number Field ...................................................................................................................147
8.3.4 Data Field ...................................................................................................................................147
8.3.5 Cyclic Redundancy Checks.........................................................................................................147
8.4 Packet Formats ................................................................................................................................148
8.4.1 Token Packets.............................................................................................................................148
8.4.2 Start of Frame Packets.................................................................................................................149
8.4.3 Data Packets................................................................................................................................149
8.4.4 Handshake Packets......................................................................................................................149
8.4.5 Handshake Responses..................................................................................................................150
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8.5 Transaction Formats........................................................................................................................152
8.5.1 Bulk Transactions .......................................................................................................................152
8.5.2 Control Transfers........................................................................................................................153
8.5.3 Interrupt Transactions .................................................................................................................155
8.5.4 Isochronous Transactions............................................................................................................156
8.6 Data Toggle Synchronization and Retry.........................................................................................157
8.6.1 Initialization via SETUP Token ..................................................................................................157
8.6.2 Successful Data Transactions......................................................................................................157
8.6.3 Data Corrupted or Not Accepted.................................................................................................158
8.6.4 Corrupted ACK Handshake.........................................................................................................158
8.6.5 Low Speed Transactions .............................................................................................................159
8.7 Error Detection and Recovery ........................................................................................................161
8.7.1 Packet Error Categories...............................................................................................................161
8.7.2 Bus Turnaround Timing..............................................................................................................161
8.7.3 False EOPs..................................................................................................................................162
8.7.4 Babble and Loss of Activity Recovery........................................................................................163
CHAPTER 9 USB DEVICE FRAMEWORK
9.1 USB Device States............................................................................................................................165
9.1.1 Visible Device States..................................................................................................................165
9.1.2 Bus Enumeration.........................................................................................................................169
9.2 Generic USB Device Operations .....................................................................................................170
9.2.1 Dynamic Attachment and Removal.............................................................................................170
9.2.2 Address Assignment....................................................................................................................170
9.2.3 Configuration..............................................................................................................................170
9.2.4 Data Transfer..............................................................................................................................171
9.2.5 Power Management.....................................................................................................................171
9.3 USB Device Requests .......................................................................................................................172
9.3.1 bmRequestType..........................................................................................................................172
9.3.2 bRequest.....................................................................................................................................173
9.3.3 wValue........................................................................................................................................173
9.3.4 wIndex........................................................................................................................................173
9.3.5 wLength......................................................................................................................................173
9.4 Standard Device Requests ...............................................................................................................173
9.4.1 Clear Feature...............................................................................................................................176
9.4.2 Get Configuration .......................................................................................................................176
9.4.3 Get Descriptor.............................................................................................................................176
9.4.4 Get Interface...............................................................................................................................177
9.4.5 Get Status....................................................................................................................................177
9.4.6 Set Address.................................................................................................................................179
9.4.7 Set Configuration........................................................................................................................179
9.4.8 Set Descriptor .............................................................................................................................179
9.4.9 Set Feature..................................................................................................................................180
9.4.10 Set Interface..............................................................................................................................180
9.4.11 Synch Frame.............................................................................................................................180
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9.5 Descriptors ................................................................................................................................ .......181
9.6 Standard USB Descriptor Definitions .............................................................................................182
9.6.1 Device.........................................................................................................................................182
9.6.2 Configuration..............................................................................................................................184
9.6.3 Interface......................................................................................................................................185
9.6.4 Endpoint......................................................................................................................................187
9.6.5 String..........................................................................................................................................188
9.7 Device Class Definitions...................................................................................................................189
9.7.1 Descriptors..................................................................................................................................189
9.7.2 Interface(s) and Endpoint Usage..................................................................................................189
9.7.3 Requests......................................................................................................................................189
9.8 Device Communications...................................................................................................................190
9.8.1 Basic Communication Mechanisms.............................................................................................192
CHAPTER 10 USB HOST: HARDWARE AND SOFTWARE
10.1 Overview of the USB Host.............................................................................................................195
10.1.2 Control Mechanisms..................................................................................................................198
10.1.3 Data Flow..................................................................................................................................198
10.1.4 Collecting Status and Activity Statistics....................................................................................199
10.1.5 Electrical Interface Considerations............................................................................................199
10.2 Host Controller Requirements.......................................................................................................199
10.2.1 State Handling...........................................................................................................................200
10.2.2 Serializer/Deserializer...............................................................................................................200
10.2.3 Frame Generation......................................................................................................................200
10.2.4 Data Processing.........................................................................................................................201
10.2.5 Protocol Engine.........................................................................................................................201
10.2.6 Transmission Error Handling.....................................................................................................201
10.3 Overview of Software Mechanisms ...............................................................................................202
10.3.1 Device Configuration................................................................................................................202
10.3.2 Resource Management ..............................................................................................................204
10.3.3 Data Transfers...........................................................................................................................205
10.3.4 Common Data Definitions.........................................................................................................205
10.4 Host Controller Driver...................................................................................................................206
10.5 Universal Serial Bus Driver...........................................................................................................207
10.5.1 Overview...................................................................................................................................207
10.5.2 USBD Command Mechanism Requirements .............................................................................209
10.5.3 USBD Pipe Mechanisms ...........................................................................................................211
10.5.4 Managing the USB via the USBD Mechanisms.........................................................................213
10.6 Operating System Environment Guides........................................................................................215
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CHAPTER 11 HUB SPECIFICATION
11.1 Overview ........................................................................................................................................217
11.2 Device Characteristics ...................................................................................................................217
11.2.1 Hub Architecture.......................................................................................................................217
11.2.2 Hub Connectivity......................................................................................................................218
11.2.3 Hub Port States .........................................................................................................................220
11.2.4 Bus State Evaluation.................................................................................................................224
11.2.5 Full vs. Low Speed Behavior.....................................................................................................224
11.2.6 Hub State Operation..................................................................................................................225
11.3 Hub I/O Buffer Requirements.......................................................................................................228
11.3.1 Pull-up and Pull-down Resistors................................................................................................229
11.3.2 Edge Rate Control.....................................................................................................................229
11.4 Hub Fault Recovery Mechanisms..................................................................................................230
11.4.1 Hub Controller Fault Recovery..................................................................................................230
11.4.2 False EOP.................................................................................................................................230
11.4.3 Repeater Fault Recovery...........................................................................................................230
11.4.4 Hub Frame Timer......................................................................................................................231
11.4.5 Hub Behavior Near EOF...........................................................................................................232
11.5 Suspend and Resume......................................................................................................................234
11.5.1 Global Suspend and Resume.....................................................................................................234
11.5.2 Selective Suspend and Resume..................................................................................................236
11.6 USB Hub Reset Behavior...............................................................................................................240
11.6.1 Hub Receiving Reset on Root Port...........................................................................................240
11.6.2 Per Port Reset...........................................................................................................................241
11.6.3 Power Bringup and Reset Delays..............................................................................................242
11.7 Hub Power Distribution Requirements.........................................................................................242
11.7.1 Overcurrent Indication ..............................................................................................................243
11.8 Hub Endpoint Organization..........................................................................................................243
11.8.1 Hub Information Architecture and Operation ............................................................................244
11.8.2 Port Change Information Processing..........................................................................................244
11.8.3 Hub and Port Status Change Bitmap..........................................................................................246
11.9 Hub Configuration.........................................................................................................................247
11.10 Hub Port Power Control..............................................................................................................247
11.11 Descriptors ...................................................................................................................................247
11.11.1 Standard Descriptors ...............................................................................................................248
11.11.2 Class-specific Descriptors .......................................................................................................249
11.12 Requests........................................................................................................................................252
11.12.1 Standard Requests...................................................................................................................252
11.12.2 Class-specific Requests...........................................................................................................253
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Chapter 1
Introduction
1.1 Motivation
The motivation for the Universal Serial Bus comes from three interrelated considerations:
• Connection of the PC to the telephone
It is well understood that the merge of computing and communication will be the basis for the next
generation of productivity applications. The movement of machine-oriented and human-oriented
data types from one location or environment to another depends on ubiquitous and cheap
connectivity. Unfortunately, the computing and communication industries have evolved
independently. The Universal Serial Bus provides a ubiquitous link that can be used across a wide
range of PC to telephone interconnects.
• Ease of use
The lack of flexibility in reconfiguring the PC has been acknowledged as the Achilles heel to its
further deployment. The combination of user friendly graphical interfaces and the hardware and
software mechanisms associated with new generation bus architectures like PCI, PnP ISA, and
PCMCIA has made computers less confrontational and easier to reconfigure. However, from the end
user point of view, the PC’s I/O interfaces such as serial/parallel ports, keyboard/mouse/joystick
interfaces, etc., do not have the attributes of plug and play.
• Port expansion
The addition of external peripherals continues to be constrained by port availability. The lack of a
bi-directional, low-cost, low-to-mid speed peripheral bus has held back the creative proliferation of
peripherals such as telephone/fax/modem adapters, answering machines, scanners, PDA’s,
keyboards, mice, etc. Existing interconnects are optimized for one or two point products. As each
new function or capability is added to the PC, a new interface has been defined to address this need.
The Universal Serial Bus is the answer to connectivity for the PC architecture. It is a fast, bi-
directional, isochronous, low-cost, dynamically attachable serial interface that is consistent with the
requirements of the PC platform of today and tomorrow.
1.2 Objective of the Specification
This document defines an industry standard Universal Serial Bus. The specification describes the bus
attributes, the protocol definition, types of transactions, bus management, and the programming interface
required to design and build systems and peripherals that are compliant with this standard.
The goal is to enable such devices from different vendors to inter-operate in an open architecture. The
specification is intended as an enhancement to the PC architecture spanning portable, business desktops,
and home environments. It is intended that the specification allow system OEMs and peripheral
developers adequate room for product versatility and market differentiation without the burden of
carrying obsolete interfaces or losing compatibility.
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1.3 Scope of the Document
• Target audience
The specification is primarily targeted to peripheral developers and system OEMs, but provides
valuable information for platform operating system/ BIOS/ device driver, adapter IHVs/ISVs, and
platform/adapter controller vendors.
• Benefit
This version of the Universal Serial Bus specification can be used for planning new products,
engineering an early prototype, and preliminary software development. All final products are
required to be compliant with the Universal Serial Bus Specification 1.0.
1.4 Document Organization
Chapters 1 through 5 provide an overview for all readers, while Chapters 6 through 11 contain detailed
technical information defining the Universal Serial Bus.
Peripheral implementers should particularly read Chapters 5 through 11.
Universal Serial Bus Host Controller implementers should particularly read Chapters 5, 6, 7, 8, 10, and
11.
Universal Serial Bus device driver implementers should particularly read Chapters 5, 9, and 10.
This document is complemented and referenced by the following related documents, which will be
released shortly:
• The Universal Serial Bus Device Class Specification
• The Universal Serial Bus Design Guide
Please contact the USB Implementers Forum for further details.
Readers are also requested to contact operating system vendors for operating system bindings specific to
the USB.
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Chapter 2
Terms and Abbreviations
This chapter lists and defines terms and abbreviations used throughout this specification.
Access.bus The Access.bus is developed by the Access.bus Industry Group, based on the
Phillips I2 C technology and a DEC software model. Revision 2.2 specifies
the bus for 100 kbs operation, but the technology has headroom to go up to
400 kbs.
ACK Acknowledgment. Handshake packet indicating a positive acknowledgment.
Active Device A device that is powered and not in the suspend state.
ADB See Apple Desktop Bus.
APM An acronym for Advanced Power Management. APM is a specification for
managing suspend and resume operations to conserve power on a host
system.
Apple Desktop Bus An expansion bus used by personal computers manufactured by Apple
Computer, Inc.
Asynchronous Data Data transferred at irregular intervals with relaxed latency requirements.
Asynchronous RA The incoming data rate, Fsi, and the outgoing data rate, Fso, of the RA
process are independent (i.e., no shared master clock).
Asynchronous SRC The incoming sample rate, Fsi, and outgoing sample rate, Fso, of the SRC
process are independent (i.e., no shared master clock).
Audio Device A device that sources or sinks sampled analog data.
AWG# The measurement of a wire’s cross section as defined by the American Wire
Gauge standard.
Babble Unexpected bus activity that persists beyond a specified point in a frame.
Bandwidth The amount of data transmitted per unit of time, typically bits per second
(bps) or bytes per second (Bps).
Big Endian A method of storing data that places the most significant byte of multiple
byte values at a lower storage addresses. For example, a word stored in big
endian format places the least significant byte at the higher address and the
most significant byte at the lower address. See Little Endian.
Bit A unit of information used by digital computers. Represents the smallest
piece of addressable memory within a computer. A bit expresses the choice
between two possibilities and is typically represented by a logical one (1) or
zero (0).
Bit Stuffing Insertion of a “0” bit into a data stream to cause an electrical transition on the
data wires allowing a PLL to remain locked.
bps Transmission rate expressed in bits per second.
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Bps Transmission rate expressed in bytes per second.
Buffer Storage used to compensate for a difference in data rates or time of
occurrence of events, when transmitting data from one device to another.
Bulk Transfer Nonperiodic, large bursty communication typically used for a transfer that
can use any available bandwidth and also be delayed until bandwidth is
available.
Bus Enumeration Detecting and identifying Universal Serial Bus devices.
Byte A data element that is eight bits in size.
Capabilities Those attributes of a Universal Serial Bus device that are administerable by
the host.
Characteristics Those qualities of a Universal Serial Bus device that are unchangeable; for
example, the device class is a device characteristic.
CHI An acronym for Concentration Highway Interface. CHI is a full duplex time
division multiplexed serial interface for digitized voice transfers in
communications systems. The current specification supports data transfer
rates up to 4.096 Mbs.
Client Software resident on the host that interacts with host software to arrange data
transfer between a function and the host. The client is often the data provider
and consumer for transferred data.
COM Port Communications port. On personal computers, an eight-bit asynchronous
serial port is typically used.
Configuring
Software The host software responsible for configuring a Universal Serial Bus device.
This may be a system configurator or software specific to the device.
Control Pipe Same as a message pipe.
Control Transfer One of four Universal Serial Bus Transfer Types. Control transfers support
configuration/command/status type communications between client and
function.
CRC See Cyclic Redundancy Check.
CTI Computer Telephony Integration.
Cyclic Redundancy
Check A check performed on data to see if an error has occurred in transmitting,
reading, or writing the data. The result of a CRC is typically stored or
transmitted with the checked data. The stored or transmitted result is
compared to a CRC calculated for the data to determine if an error has
occurred.
Default Address An address defined by the Universal Serial Bus Specification and used by a
Universal Serial Bus device when it is first powered or reset. The default
address is 00h.
Default Pipe The message pipe created by Universal Serial Bus system software to pass
control and status information between the host and a Universal Serial Bus
device’s Endpoint 0.
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Device A logical or physical entity that performs a function. The actual entity
described depends on the context of the reference. At the lowest level,
device may refer to a single hardware component, as in a memory device. At
a higher level, it may refer to a collection of hardware components that
perform a particular function, such as a Universal Serial Bus interface
device. At an even higher level, device may refer to the function performed
by an entity attached to the Universal Serial Bus; for example, a data/FAX
modem device. Devices may be physical, electrical, addressable, and
logical.
When used as a non-specific reference, a Universal Serial Bus device is
either a hub or a function.
Device Address The address of a device on the Universal Serial Bus. The Device Address is
the Default Address when the Universal Serial Bus device is first powered or
reset. Hubs and functions are assigned a unique Device Address by
Universal Serial Bus software.
Device Endpoint A uniquely identifiable portion of a Universal Serial Bus device that is the
source or sink of information in a communication flow between the host and
device.
Device Resources Resources provided by Universal Serial Bus devices, such as buffer space
and endpoints. See Host Resources and Universal Serial Bus Resources.
Device Software Software that is responsible for using a Universal Serial Bus device. This
software may or may not also be responsible for configuring the device for
use.
DMI An acronym for Desktop Management Interface. A method for managing
host system components developed by the Desktop Management Task Force.
Downstream The direction of data flow from the host or away from the host. A
downstream port is the port on a hub electrically farthest from the host that
generates downstream data traffic from the hub. Downstream ports receive
upstream data traffic.
Driver When referring to hardware, an I/O pad that drives an external load. When
referring to software, a program responsible for interfacing to a hardware
device; that is, a device driver.
DWORD Double word. A data element that is 2 words, 4 bytes, or 32 bits in size.
Dynamic Insertion
and Removal The ability to attach and remove devices while the host is in operation.
E2PROM See EEPROM.
EEPROM Electrically Erasable Programmable Read Only Memory. Non-volatile
rewritable memory storage technology.
End User The user of a host.
Endpoint See Device Endpoint.
Endpoint Address The combination of a Device Address and an Endpoint Number on a
Universal Serial Bus device.
Endpoint Number A unique pipe endpoint on a Universal Serial Bus device.
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EOF1 End of frame timing point #1. Used by the hub to monitor and disconnect
bus activity persisting near or past the end of a frame.
EOF2 End of frame timing point #2. Used by hubs to detect bus activity near the
end of frame.
EOP End of packet.
Fs See Sample Rate.
False EOP A spurious, usually noise induced, event that is interpreted by a packet
receiver as an end of packet.
FireWire Apple Computer’s implementation of the IEEE P1394 bus standard.
Frame The time from the start of one SOF token to the start of the subsequent SOF
token; consists of a series of transactions.
Frame Pattern A sequence of frames that exhibit a repeating pattern in the number of
samples transmitted per frame. For a 44.1 kHz audio transfer, the frame
pattern could be nine frames containing 44 samples followed by one frame
containing 45 samples.
Full-duplex Computer data transmission occurring in both directions simultaneously.
Function A Universal Serial Bus device that provides a capability to the host. For
example, an ISDN connection, a digital microphone, or speakers.
GeoPort A serial bus developed by Apple Computer, Inc. Current specification of the
GeoPort supports data transfer rates up to 2 Mbs and provides point to point
connectivity over a radius of 4 ft.
Handshake Packet A packet that acknowledges or rejects a specific condition. For examples,
see ACK and NACK.
Host The host computer system where the Universal Serial Bus host controller is
installed. This includes the host hardware platform (CPU, bus, etc.) and the
operating system in use.
Host Controller The host’s Universal Serial Bus interface.
Host Controller
Driver The Universal Serial Bus software layer that abstracts the host controller
hardware. Host Controller Driver provides an SPI for interaction with a host
controller. Host Controller Driver hides the specifics of the host controller
hardware implementation.
Host Resources Resources provided by the host, such as buffer space and interrupts. See
Device Resources and Universal Serial Bus Resources.
Hub A Universal Serial Bus device that provides additional connections to the
Universal Serial Bus.
Hub Tier The level of connect within a USB network topology given as the number of
hubs that that the data has to flow through.
I2CAcronym for the Inter-Integrated Circuits serial interface. The I2C interface
was invented by Philips Semiconductors.
IEEE P1394 A high performance serial bus. The P1394 is targeted at hard disk and video
peripherals, which may require bus bandwidth in excess of 100 Mb/s. The
bus protocol supports both isochronous and asynchronous transfers over the
same set of four signal wires.
Universal Serial Bus Specification Revision 1.0
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Industry Standard
Architecture The 8 and/or 16 bit expansion bus for IBM AT or XT compatible computers.
Integrated Services
Data Network An internationally accepted standard for voice, data, and signaling using
public, switched telephone networks. All transmissions are digital from end-
to-end. Includes a standard for out-of-band signaling and delivers
significantly higher bandwidth than POTS.
Interrupt Request A hardware signal that allows a device to request attention from a host. The
host typically invokes an interrupt service routine to handle the condition
which caused the request.
Interrupt Transfer One of four Universal Serial Bus Transfer Types. Interrupt transfers
characteristics are small data, non periodic, low frequency, bounded latency,
device initiated communication typically used to notify the host of device
service needs.
IRQ See Interrupt Request.
ISA See Industry Standard Architecture.
ISDN See Integrated Services Data Network.
Isochronous Data A stream of data whose timing is implied by its delivery rate.
Isochronous Device An entity with isochronous endpoints, as defined in the USB specification,
that sources or sinks sampled analog streams or synchronous data streams.
Isochronous Sink
Endpoint An endpoint that is capable of consuming an isochronous data stream.
Isochronous Source
Endpoint An endpoint that is capable of producing an isochronous data stream.
Isochronous
Transfer One of four Universal Serial Bus Transfer Types. Isochronous transfers are
used when working with isochronous data. Isochronous transfers provide
periodic, continuous communication between host and device.
Jitter A tendency toward lack of synchronization caused by mechanical or
electrical changes. More specifically, the phase shift of digital pulses over a
transmission medium.
kbs Transmission rate expressed in kilobits per second.
kBs Transmission rate expressed in kilobytes per second.
Line Printer Port A port used to access a printer. On most personal computers, an eight-bit
parallel interface is typically used.
Little Endian Method of storing data that places the least significant byte of multiple byte
values at lower storage addresses. For example, a word stored in little endian
format places the least significant byte at the lower address and the most
significant byte at the next address. See Big Endian.
LOA Loss of bus activity characterized by a start of packet without a
corresponding end of packet.
LPT Port See Line Printer Port.
LSB Least Significant Bit.
Mbs Transmission rate expressed in megabits per second.
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MBs Transmission rate expressed in megabytes per second.
Message Pipe A pipe that transfers data using a request/data/status paradigm. The data has
an imposed structure which allows requests to be reliably identified and
communicated.
Micro Channel
Architecture A 32 bit expansion bus used on some IBM PS/2 compatible computers.
Modem An acronym for Modulator/Demodulator. Component that converts signals
between analog and digital. Typically used to send digital information from
a computer over a telephone network which is usually analog.
MSB Most Significant Bit.
NACK Negative Acknowledgment. Handshake packet indicating a negative
acknowledgment.
Non Return to Zero
Invert A method of encoding serial data in which ones and zeroes are represented
by opposite and alternating high and low voltages where there is no return to
zero (reference) voltage between encoded bits. Eliminates the need for clock
pulses.
NRZI See Non Return to Zero Invert.
Object Host software or data structure representing a Universal Serial Bus entity.
Packet A bundle of data organized in a group for transmission. Packets typically
contain three elements: control information (e.g., source, destination, and
length), the data to be transferred, and error detection and correction bits.
Packet Buffer The logical buffer used by a Universal Serial Bus device for sending or
receiving a single packet. This determines the maximum packet size the
device can send or receive.
Packet ID A field in a Universal Serial Bus packet that indicates the type of packet, and
by inference the format of the packet and the type of error detection applied
to the packet.
PBX See Private Branch eXchange.
PCI See Peripheral Component Interconnect.
PCMCIA See Personal Computer Memory Card Industry Association.
Peripheral
Component
Interconnect
A 32- or 64-bit, processor independent, expansion bus used on personal
computers.
Personal Computer
Memory Card
International
Association
The organization that standardizes and promotes PC Card technology.
Phase A token, data, or handshake packet; a transaction has three phases.
Physical Device A device that has a physical implementation; e.g. speakers, microphones, and
CD players.
PID See Packet ID.
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Pipe A logical abstraction representing the association between an endpoint on a
device and software on the host. A pipe has several attributes; for example, a
pipe may transfer data as streams (Stream Pipe) or messages (Message Pipe).
Plain Old
Telephone Service Basic service supplying standard single line telephones, telephone lines, and
access to public switched networks.
Plug and Play A technology for configuring I/O devices to use non-conflicting resources in
a host. Resources managed by Plug and Play include I/O address ranges,
memory address ranges, IRQs, and DMA channels.
PnP See Plug and Play.
Polling Asking multiple devices, one at a time, if they have any data to transmit.
POR See Power On Reset.
Port Point of access to or from a system or circuit. For Universal Serial Bus, the
point where a Universal Serial Bus device is attached.
POTS See Plain Old Telephone Service.
Power On Reset Restoring a storage device, register, or memory to a predetermined state
when power is applied.
PLL Phase Locked Loop. A circuit that acts as a phase detector to keep an
oscillator in phase with an incoming frequency.
Private Branch
eXchange A privately owned telephone switching system which is not regulated as part
of the public telephone network.
Programmable
Data Rate Either a fixed data rate (single frequency endpoints), a limited number of
data rates (32 kHz, 44.1 kHz, 48 kHz, …), or a continuously programmable
data rate. The exact programming capabilities of an endpoint must be
reported in the appropriate class-specific endpoint descriptors.
Protocol A specific set of rules, procedures, or conventions relating to format and
timing of data transmission between two devices.
RA See Rate Adaptation.
Rate Adaptation The process by which an incoming data stream, sampled at Fsi is converted
to an outgoing data stream, sampled at Fso with a certain loss of quality,
determined by the rate adaptation algorithm. Error control mechanisms are
required for the process. Fsi and Fso can be different and asynchronous. Fsi
is the input data rate of the RA; Fso is the output data rate of the RA.
Request A request made to a Universal Serial Bus device contained within the data
portion of a SETUP packet.
Retire The action of completing service for a transfer and notifying the appropriate
software client of the completion.
Root Hub A Universal Serial Bus hub directly attached to the host controller. This hub
is attached to the host; tier 0.
Root Port The upstream port on a hub.
Sample The smallest unit of data on which an endpoint operates; a property of an
endpoint.
Sample Rate (Fs) The number of samples per second, expressed in Hertz.
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Sample Rate
Conversion A dedicated implementation of the RA process for use on sampled analog
data streams. The error control mechanism is replaced by interpolating
techniques.
SCSI See Small Computer Systems Interface.
Service A procedure provided by an SPI.
Service Interval The period between consecutive requests to a Universal Serial Bus endpoint
to send or receive data.
Service Jitter The deviation of service delivery from its scheduled delivery time.
Service Rate The number of services to a given endpoint per unit time.
Small Computer
Systems Interface A local I/O bus that allows peripherals to be attached to a host using generic
system hardware and software.
SOF An acronym for Start of Frame. The SOF is the first transaction in each
frame. SOF allows endpoints to identify the start of frame and synchronize
internal endpoint clocks to the host.
SPI See System Programming Interface.
SRC See Sample Rate Conversion.
Stage One part of the sequence composing a control transfer; i.e., the setup stage,
the data stage, and the status stage.
Stream Pipe A pipe that transfers data as a stream of samples with no defined Universal
Serial Bus structure.
Synchronization
Type A classification that characterizes an isochronous endpoint’s capability to
connect to other isochronous endpoints.
Synchronous RA The incoming data rate, Fsi, and the outgoing data rate, Fso, of the RA process
are derived from the same master clock. There is a fixed relation between
Fsi and Fso.
Synchronous SRC The incoming sample rate, Fsi, and outgoing sample rate, Fso, of the SRC
process are derived from the same master clock. There is a fixed relation
between Fsi and Fso.
System
Programming
Interface
A defined interface to services provided by system software.
TDM See Time Division Multiplexing.
Termination Passive components attached at the end of cables to prevent signals from
being reflected or echoed.
Time Division
Multiplexing A method of transmitting multiple signals (data, voice, and/or video)
simultaneously over one communications medium by interleaving a piece of
each signal one after another.
Time-out The detection of a lack of bus activity for some predetermined interval.
Token Generator See Initiator.
Token Packet A type of packet that identifies what transaction is to be performed on the
bus.
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Transaction The delivery of service to an endpoint; consists of a token packet, optional
data packet, and optional handshake packet. Specific packets are
allowed/required based on the transaction type.
Transfer One or more bus transactions to move information between a software client
and its function.
Transfer Type Determines the characteristics of the data flow between a software client and
its function. Four Transfer types are defined: control, interrupt, bulk, and
isochronous.
Turnaround Time The time a device needs to wait to begin transmitting a packet after a packet
has been received to prevent collisions on Universal Serial Bus. This time is
based on the length and propagation delay characteristics of the cable and the
location of the transmitting device in relation to other devices on Universal
Serial Bus.
Universal Serial
Bus A collection of Universal Serial Bus devices and the software and hardware
that allow them to connect the capabilities provided by functions to the host.
Universal Serial
Bus Device Includes hubs and functions. See device.
Universal Serial
Bus Interface The hardware interface between the Universal Serial Bus cable and a
Universal Serial Bus device. This includes the protocol engine required for
all Universal Serial Bus devices to be able to receive and send packets.
Universal Serial
Bus Resources Resources provided by Universal Serial Bus, such as bandwidth and power.
See Device Resources and Host Resources.
Universal Serial
Bus Software The host-based software responsible for managing the interactions between
the host and the attached Universal Serial Bus devices.
USB See Universal Serial Bus.
USBD See Universal Serial Bus Driver.
Universal Serial
Bus Driver The host resident software entity responsible for providing common services
to clients that are manipulating one or more functions on one or more Host
Controllers.
Upstream The direction of data flow towards the host. An upstream port is the port on
a device electrically closest to the host that generates upstream data traffic
from the hub. Upstream ports receive downstream data traffic.
Virtual Device A device that is represented by a software interface layer; e.g., a hard disk
with its associated device driver and client software that makes it able to
reproduce an audio .WAV file.
WFEOF2 Wait for EOF2 point. One of the four hub repeater states.
WFEOP Wait for end of packet. One of the four hub repeater states.
WFSOF Wait for start of frame. One of the four hub repeater states.
WFSOP Wait for start of packet. One of the four possible hub repeater states.
Word A data element that is two bytes or 16 bits in size.
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Chapter 3
Background
This chapter presents a brief description of the background of the Universal Serial Bus including design
goals, features of the bus, and existing technologies.
3.1 Goals for the Universal Serial Bus
The Universal Serial Bus is specified to be an industry standard extension to the PC architecture with a
focus on Computer Telephony Integration (CTI), consumer, and productivity applications. The following
criteria were applied in defining the architecture for the Universal Serial Bus:
• Ease of use for PC peripheral expansion
• Low-cost solution that supports transfer rates up to 12 Mbs
• Full support for the real-time data for voice, audio, and compressed video
• Protocol flexibility for mixed-mode isochronous data transfers and asynchronous messaging
• Integration in commodity device technology
• Comprehend various PC configurations and form factors
• Provide a standard interface capable of quick diffusion into product
• Enable new classes of devices that augment the PC’s capability
3.2 Taxonomy of Application Space
Figure 3-1 describes a taxonomy for the range of data traffic workloads that can be serviced over a
Universal Serial Bus. As can be seen, a 12 Mbs bus comprehends the mid-speed and low-speed data
ranges. Typically, mid-speed data types are isochronous and low-speed data comes from interactive
devices. The Universal Serial Bus being proposed is primarily a desktop bus but can be readily applied
to the mobile environment. The software architecture allows for future extension of the Universal Serial
Bus by providing support for multiple Universal Serial Bus host controllers.
Universal Serial Bus Specification Revision 1.0
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LOW SPEED
•Interactive Devices
•10-100 Kb/s
MEDIUM SPEED
•Phone, Audio,
Compressed Video
500Kb/s - 10Mbp/s
HIGH SPEED
•Video, Disk
•25-500 Mb/s
PERFORMANCE APPLICATIONS ATTRIBUTES
Ke y bo ard , Mo us e
Stylus
Game peripherals
Virtual Reality peripherals
Monitor Configuration
ISDN
PBX
POTS
Audio
Video
Disk
Dynamic Attach- Detach
Lower cost
H ot plug -u nplug
Ease of use
Multiple peripherals
Low cost
Ease of use
Guaranteed late nc y
Guaranteed Bandwidth
Multiple devices
High Bandwidth
Guaranteed late nc y
Ease of use
Figure 3-1. Application Space Taxonomy
3.3 Feature List
The Universal Serial Bus specification provides a selection of attributes that can achieve multiple
price-performance integration points and can enable functions that allow differentiation at the system and
component level. Features are categorized by benefits below:
Easy to use for end user
• Single model for cabling and connectors
• Electrical details isolated from end user; e.g., bus terminations
• Self identifying peripherals, automatic mapping of function to driver, and configuration
• Dynamically attachable and reconfigurable peripherals
Universal Serial Bus Specification Revision 1.0
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Wide range of workloads and applications
• Suitable for device bandwidths ranging from a few kbs to several Mbs
• Supports isochronous as well as asynchronous transfer types over the same set of wires
• Multiple Connections: Support for concurrent operation of many devices
• Support for up to 127 physical devices
• Supports transfer of multiple data and message streams between the host and devices
• Allows compound devices; i.e., peripherals composed of many functions
• Lower protocol overhead resulting in high bus utilization
Isochronous bandwidth
• Guaranteed bandwidth and low latencies appropriate for telephony, audio, etc.
• Isochronous workload may use entire bus bandwidth
Flexibility
• Wide range of packet sizes, allowing a range of device buffering options
• Wide range of device data rates by accommodating packet buffer size and latencies
• Flow control for buffer handling built into protocol
Robustness
• Error handling/fault recovery mechanism built into protocol
• Dynamic insertion and removal of devices identified in user perceived real-time
• Support for identification of faulty devices
Synergy with PC industry
• Simple protocol to implement and integrate
• Consistent with the PC Plug and Play architecture
• Leverages existing operating system interfaces
Low-cost implementation
• Low cost sub-channel at 1.5 Mbs
• Optimized for integration in peripheral and host hardware
• Suitable for development of low cost peripherals
• Low cost cables and connectors
• Utilizes commodity technologies
Universal Serial Bus Specification Revision 1.0
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Upgrade path
• Architecture upgradeable to support multiple Universal Serial Bus host controllers in a system
3.4 Some Existing Technologies
There are several technologies that are commonly considered to be serial buses. Each of these buses
were defined for a specific range of application(s). A few of them are listed below:
• Apple desktop bus (ADB)
This is a proprietary minimalist serial interface that provides a simple read/write protocol to up to 16
devices. The cost of hardware interface is estimated to be very low. The ADB supports data rates up
to 90 kbs, just enough to communicate with keyboards, pointing devices, or other desktop I/O
devices.
• Access.bus (A.b)
The Access.bus is being developed by the Access.bus Industry Group, based on the Philips I2C
technology and a DEC software model. The application space for the Access.bus is primarily
keyboards and pointing devices; however, A.b is more versatile then the ADB. The protocol has
well defined specifications for the dynamic attach, arbitration, data packets, configuration, and
software interface. While addressing is provided for up to 127 devices, the practical loading is
limited by cable lengths and power distribution considerations. Revision 2.2 of the A.b specification
specifies the bus for 100 kbs operation, but the technology has headroom to go up to 400 kbs using
the same separate clock and data wires.
• IEEE P1394
The IEEE P1394 is a high performance serial bus. The application space for P1394 is primarily hard
disk and video peripherals, which may require bus bandwidth in excess of 100 Mbs. The protocol
supports both isochronous and asynchronous transfers over the same set of four signal wires, broken
up as differential pair of clock and data signals. The P1394 specification is very well defined and the
first generation devices, based on the IEEE specification, are just coming to market. Current pricing
of P1394 solutions is considered competitive relative to SCSI disk interfaces, but not for generic
desktop connectivity.
• CHI
The Concentration Highway Interface (CHI) was developed by AT&T for terminals and digital
switches. CHI is a full duplex time division multiplexed serial interface for digitized voice transfers
in communications systems. The protocol consists of a number of fixed time slots that can carry
voice data and control information. The current specification supports data transfer rates up to
4.096 Mbs. The CHI bus has four signal wires: Clock, Framing, Receive data, and Transmit data.
Both, the Framing and the Clock signals are generated centrally (i.e., PBX switch).
• GeoPort
The GeoPort was originally developed by Apple Computer, Inc. to primarily enable Macintosh
telephony applications. Current specification of the GeoPort supports data transfer rates up to 2 Mbs
and provides point to point connectivity over a radius of 4 ft. The standard GeoPort specifies a 9-pin
connector (8 pins and an optional 9th power pin) and uses RS-422 signaling. Additionally, Apple
has defined an alternate 14-pin connector for extended cable lengths. The GeoPort protocol provides
three different operating modes: Beaconing, TDM, and Packetized transfer modes. Apple is
currently licensing the GeoPort specification.
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Chapter 4
Architectural Overview
This chapter presents an overview of the Universal Serial Bus architecture and key concepts. USB is a
cable bus that supports data exchange between a host computer and a wide range of simultaneously
accessible peripherals. The attached peripherals share USB bandwidth through a host scheduled token
based protocol. The bus allows peripherals to be attached, configured, used, and detached while the host
and other peripherals are in operation. This is referred to as dynamic (or hot) attachment and removal.
Later chapters describe the various components of the USB in greater detail.
4.1 USB System Description
A USB system is described by three definitional areas:
• USB interconnect
• USB devices
• USB host
The USB interconnect is the manner in which USB devices are connected to and communicate with the
host. This includes:
• Bus Topology: Connection model between USB devices and the host.
• Inter-layer Relationships: In terms of a capability stack, the USB tasks that are performed at each
layer in the system.
• Data Flow Models: The manner in which data moves in the system over the USB between producers
and consumers.
• Scheduling the USB: USB provides a shared interconnect. Access to the interconnect is scheduled
in order to support isochronous data transfers.
USB devices and the USB host are described in detail in subsequent sections.
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4.1.1 Bus Topology
The Universal Serial Bus connects USB devices with the USB host. The USB physical interconnect is a
tiered star topology. A hub is at the center of each star. Each wire segment is a point-to-point
connection between the host and a hub or function, or a hub connected to another hub or function.
Figure 4-1 illustrates the topology of the USB.
Host (Root Tier)
Tier 1
Tier 2
Tier 3
Tier 4
Hub 1
Hub 2 Node
Host
RootHub
Node
Hub 3 Hub 4 Node Node
Node
Node
Node
Figure 4-1. Bus Topology
4.1.1.1 The USB Host
There is only one host on any USB system. The USB interface to the host computer system is referred to
as the host controller. The host controller may be implemented in a combination of hardware, firmware,
or software. A root hub is integrated within the host system to provide one or more attachment points.
Additional information concerning the host may be found in Section 4.9 and in Chapter 10, USB Host:
Hardware and Software.
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4.1.1.2 USB Devices
USB devices are:
• Hubs, which provide additional attachment points to the USB
• Functions, which provide capabilities to the system; for example, an ISDN connection, a digital
joystick, or speakers
USB devices present a standard USB interface in terms of their:
• Comprehension of the USB protocol
• Response to standard USB operations such as configuration and reset
• Standard capability descriptive information
Additional information concerning USB devices may be found in Section 4.8 and in Chapter 9, USB
Devices.
4.2 Physical Interface
The physical interface of the USB is described in the electrical (Chapter 7) and mechanical (Chapter 6)
specifications for the bus.
4.2.1 Electrical
USB transfers signal and power over a four wire cable, shown in Figure 4-2. The signaling occurs over
two wires and point-to-point segments. The signals on each segment are differentially driven into a cable
of 90 Ω intrinsic impedance. The differential receiver features input sensitivity of at least 200 mV and
sufficient common mode rejection.
There are two modes of signaling. The USB full speed signaling bit rate is 12 Mbs. A limited capability
low speed signaling mode is also defined at 1.5 Mbs. The low speed method relies on less EMI
protection. Both modes can be simultaneously supported in the same USB system by mode switching
between transfers in a device transparent manner. The low speed mode is defined to support a limited
number of low bandwidth devices such as mice, since more general use would degrade the bus
utilization.
The clock is transmitted encoded along with the differential data. The clock encoding scheme is NRZI
with bit stuffing to ensure adequate transitions. A SYNC field precedes each packet to allow the
receiver(s) to synchronize their bit recovery clocks.
...
...
5 meters max
VBus
GND
D+
D-
VBus
GND
D+
D-
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
Figure 4-2. USB Cable
The cable also carries VBus and GND wires on each segment to deliver power to devices. VBus is
nominally +5 V at the source. USB allows cable segments of variable lengths up to several meters by
choosing the appropriate conductor gauge to match the specified IR drop and other attributes such as
device power budget and cable flexibility. In order to provide guaranteed input voltage levels and proper
termination impedance, biased terminations are used at each end of the cable. The terminations also
Universal Serial USB Specification Revision 1.0
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permit the detection of attach and detach at each port and differentiate between full speed and low speed
devices.
4.2.2 Mechanical
The mechanical specifications for cables and connectors are provided in Chapter 6. All devices have an
upstream connection. Upstream and downstream connectors are not mechanically interchangeable, thus
eliminating illegal loopback connections at hubs. The cable has four conductors: a twisted signal pair of
standard gauge and a power pair in a range of permitted gauges. The connector is four position, with
shielded housing, specified robustness, and ease of attach-detach characteristics.
4.3 Power
The specification covers two aspects of power:
• Power distribution over the USB deals with the issues of how USB devices consume power provided
by the host over the USB.
• Power management deals with how USB software and devices fit into the host-based power
management system.
4.3.1 Power Distribution
Each USB segment provides a limited amount of power over the cable. The host supplies power for use
by USB devices that are directly connected. In addition, any USB device may have its own power
supply. USB devices that rely totally on power from the cable are called bus-powered devices. In
contrast, those that have an alternate source of power are called self-powered devices. A hub also
supplies power for its connected USB devices. The architecture permits bus-powered hubs within certain
constraints of topology that are discussed later in Chapter 11. Self-powered devices must implement
prescribed power decoupling safety mechanisms. In Figure 4-4, the keyboard, pen, and mouse can all be
bus-powered devices.
4.3.2 Power Management
A USB host has a power management system which is independent of the USB. USB system software
interacts with the host’s power management system to handle system power events such as SUSPEND or
RESUME. Additionally, USB devices can carry USB-defined power management information which
allow them to be power managed by system software or generic device drivers.
The power distribution and power management features of USB allow it to be designed into power
sensitive systems such as battery based notebook computers.
4.4 Bus Protocol
All bus transactions involve the transmission of up to three packets. Each transaction begins when the
host controller, on a scheduled basis, sends a USB packet describing the type and direction of transaction,
the USB device address, and endpoint number. This packet is referred to as the Token Packet. The USB
device that is addressed selects itself by decoding the appropriate address fields. In a given transaction,
data is transferred either from the host to a device or from a device to the host. The direction of data
transfer is specified in the token packet. The source of the transaction then sends a Data Packet or
indicates it has no data to transfer. The destination in general responds with a Handshake Packet
indicating whether the transfer was successful.
The USB data transfer model between a source or destination on the host and an endpoint on a device is
referred to as a pipe. There are two types of pipes: stream and message. Stream data has no USB
defined structure while message data does. Additionally, pipes have associations of data bandwidth,
Universal Serial Bus Specification Revision 1.0
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transfer service type, and endpoint characteristics like directionality and buffer sizes. Pipes come into
existence when a USB device is configured. One message pipe, Control Pipe 0, always exists once a
device is powered in order to provide access to the device’s configuration, status, and control
information.
The transaction schedule allows flow control for some stream mode pipes. At the hardware level, this
prevents buffers from underrun or overrun situations by using a NACK handshake to throttle the data
rate. The token for a NACK’ed transaction is reissued when bus time is available. The flow control
mechanism permits the construction of flexible schedules that accommodate concurrent servicing of a
heterogeneous mix of stream mode pipes. Thus, multiple stream mode pipes can be serviced at different
intervals and with packets of different sizes.
4.5 Robustness
There are several attributes of the USB that contribute to its robustness:
• Signal integrity using differential drivers, receivers, and shielding
• CRC protection over control and data fields
• Detection of attach and detach and system-level configuration of resources
• Self-recovery in protocol, using time-outs for lost or broken packets
• Flow control for streaming data to ensure isochrony and hardware buffer management
• Data and control pipe constructs for ensuring independence from adverse interactions between
functions
4.5.1 Error Detection
The core bit error rate of the USB medium is expected to be close to that of a backplane and any glitches
will very likely be transient in nature. To provide protection against such transients, each of these
packets includes error protection fields. When data integrity is required, such as with lossless data
devices, an error recovery procedure may be invoked in hardware or software.
The protocol includes separate CRCs for control and data fields of each packet. A failed CRC is
considered to indicate a corrupted packet. The CRC gives 100% coverage on single and double bit
errors.
4.5.2 Error Handling
The protocol optionally allows for error handling in hardware or software. Hardware handling includes
reporting and retry of failed transfers. The host controller will retry an error three times before informing
the client software of the error. The client software can recover in an implementation specific way.
4.6 System Configuration
The USB supports USB devices attaching to and detaching from the USB at any point in time.
Consequently, enumerating the USB is an on-going activity which must accommodate dynamic changes
in the physical bus topology.
4.6.1 Attachment of USB Device
All USB devices attach to the USB via a port on specialized USB devices known as hubs. Hubs indicate
the attachment or removal of a USB device in its per port status. The host queries the hub to determine
the reason for the notification. The hub responds by identifying the port used to attach the USB device.
The host enables the port and addresses the USB device with a control pipe using the USB Default
Universal Serial USB Specification Revision 1.0
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Address. All USB devices are addressed using the USB Default Address when initially connected or
after they have been reset.
The host determines if the newly attached USB device is a hub or a function and assigns a unique USB
address to the USB device. The host establishes a control pipe for the USB device using the assigned
USB address and endpoint number zero.
If the attached USB device is a hub and USB devices are attached to its ports, then the above procedure is
followed for each of the attached USB devices.
If the attached USB device is a function, then attachment notifications will be dispatched by USB
software to interested host software.
4.6.2 Removal of USB Device
When a USB device has been removed from one of its ports, the hub automatically disables the port and
provides an indication of device removal to the host. Then the host removes knowledge of the USB
device from any host data structures.
If the removed USB device is a hub, the removal process must be performed for all of the USB devices
that were previously attached to the hub.
If the removed USB device is a function, removal notifications are sent to interested host software.
4.6.3 Bus Enumeration
Bus enumeration is the activity that identifies and addresses devices attached to a bus. For many buses,
this is done at startup time and the information collected is static. Since the USB allows USB devices to
attach to or detach from the USB at any time, bus enumeration for this bus is an on-going activity.
Additionally, bus enumeration for the USB also includes detection and processing of removals.
4.6.4 Inter-Layer Relationship
USB devices are logically divided into a USB device interface portion, a device portion, and a functional
portion. The host is logically partitioned into the USB host interface portion, the aggregate system
software portion (USB system software and host system software), and the device software portion.
Each of these portions is defined such that a particular USB task is the responsibility of only one portion.
The USB host and USB device portions correspond as shown in Table 4-1.
Table 4-1. Correlation Between Host and Device Layers
USB Host Portion USB Device Portion
Device Software Function
System Software Device
USB Interface USB Interface
4.7 Data Flow Types
The USB supports functional data and control exchange between the USB host and a USB device as a set
of either uni- or bi-directional fashions. USB data transfers take place between host software and a
particular endpoint on a USB device. A given USB device may support multiple data transfer endpoints.
The USB host treats communications with any endpoint of a USB device independently from any other
endpoint. Such associations between the host software and a USB device endpoint are called pipes. As
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an example, a given USB device could have an endpoint which would support a pipe for transporting data
to the USB device and another endpoint which would support a pipe for transporting data from the USB
device.
The USB architecture comprehends four basic types of data transfers:
• Control transfers that are used to configure a device at attach time and can be used for other device
specific purposes
• Bulk data transfers which are generated or consumed in relatively large and bursty quantities and has
wide dynamic latitude in transmission constraints
• Interrupt data transfers such as characters or coordinates with human perceptible echo or feedback
response characteristics
• Isochronous or streaming real time data transfers which occupy a prenegotiated amount of USB
bandwidth with a prenegotiated delivery latency
Any given pipe supports exactly one of the types of transfers described above. The USB data flow model
is described in more detail in Chapter 5.
4.7.1 Control Transfers
Control data is used by USB software to configure devices when they are first attached. Other driver
software can choose to used control transfers in implementation specific ways. Data delivery is lossless.
4.7.2 Bulk Transfers
Bulk data typically consists of larger amounts of data such as that used for printers or scanners. Bulk
data is sequential. Reliable exchange of data is ensured at the hardware level by using error detection in
hardware and, optionally, invoking a limited hardware retry. Also, the bandwidth taken up by bulk data
can be whatever is available and not being used for other transfer types.
4.7.3 Interrupt Transfers
A small, spontaneous data transfer from a device is referred to as interrupt data. Such data may be
presented for transfer by a device at any time and is delivered by the USB at a rate no slower than as is
specified by the device.
Interrupt data typically consists of event notification, characters, or coordinates that are organized as one
or more bytes. An example of interrupt data is the coordinates from a pointing device. Although an
explicit timing rate is not required, interactive data may have response time bounds which the USB must
support.
4.7.4 Isochronous Transfers
Isochronous data is continuous and real-time in creation, delivery, and consumption. Timing related
information is implied by the steady rate at which isochronous data is received and transferred.
Isochronous data must be delivered at the rate received to maintain its timing. In addition to delivery
rate, isochronous data may also be sensitive to delivery delays. For isochronous pipes, the bandwidth
required is typically based upon the sampling characteristics of the associated function. The latency
required is related to the buffering available at each endpoint.
A typical example of isochronous data is voice. If the delivery rate of these data streams is not
maintained, glitches in the data stream will occur due to buffer or frame underruns or overruns. Even if
data is delivered at the appropriate rate, delivery delays may degrade applications requiring real-time turn
around, such as telephony-based audio conferencing.
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The timely delivery of isochronous data is ensured at the expense of potential transient losses in the data
stream. In other words, any error in electrical transmission is not corrected by hardware mechanisms
such as retries. In practice, the core bit error rate of the USB is expected to be small enough not to be an
issue. USB isochronous data streams are allocated a dedicated portion of USB bandwidth to ensure that
data can be delivered at the desired rate. The USB is also designed for minimal delay of isochronous
data transfers.
4.7.5 Allocating USB Bandwidth
USB bandwidth is allocated among pipes. The USB allocates bandwidth for some pipes when a pipe is
established. USB devices are required to provide some buffering of data. It is assumed that USB devices
requiring more bandwidth are capable of providing larger sized buffers. The goal for the USB
architecture is to ensure that buffering induced hardware delay is bounded to within a few milliseconds.
USB’s bandwidth capacity can be allocated among many different data streams. This allows a wide
range of devices to be attached to the USB. For example, telephony devices ranging from 1B+D all the
way up to T1 capacity can be accommodated. Further, different device bit rates, with a wide dynamic
range, can be concurrently supported.
USB bandwidth allocation is blocking; i.e., if allocating an additional pipe would disturb preexisting
bandwidth or latency allocations, further pipe allocations are denied or blocked. When a pipe is closed,
the allocated bandwidth is freed up and may be reallocated to another pipe.
The USB Specification defines the rules for how each transfer type is allowed access to the bus.
4.8 USB Devices
USB devices are divided into device classes such as hub, locator, or text device. The hub device class
indicates a specially designated USB device which provides additional USB attachment points (refer to
Chapter 11). USB devices are required to carry information for self-identification and generic
configuration. They are also required at all times to display behavior consistent with defined USB device
states.
4.8.1 Device Characterizations
All USB devices are accessed by a unique USB address. Each USB device additionally supports one or
more endpoints with which the host may communicate. All USB devices must support a specially
designated Endpoint 0 to which the USB device’s USB control pipe will be attached.
Associated with Endpoint 0 is the information required to completely describe the USB device. This
information falls into the following categories:
• Standard. This is information whose definition is common to all USB devices and includes items
such as vendor identification, device class, and power management. Device, configuration,
interface, and endpoint descriptions carry configuration related information about the device.
Detailed information about these descriptors can be found in Chapter 9.
• Class. The definition of this information varies depending on the device class of the USB device.
• USB Vendor. The vendor of the USB device is free to put any information desired here. The
format, however, is not determined by this specification.
Additionally, each USB device carries USB control and status information. All USB devices support a
common access method via their USB control pipe.
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4.8.2 Device Descriptions
Two major divisions of device classes exist: hubs and functions. Only hubs have the ability to provide
additional USB attachment points. Functions provide additional capabilities to the host.
4.8.2.1 Hubs
Hubs are a key element in the plug-and-play architecture of USB. Figure 4-3 shows a typical hub. Hubs
serve to simplify USB connectivity from the user’s perspective and provide robustness at low cost and
complexity.
Hubs are wiring concentrators and enable the multiple attachment characteristics of USB. Attachment
points are referred to as ports. Each hub converts a single attachment point into multiple attachment
points. The architecture supports concatenation of multiple hubs.
The upstream port of a hub connects the hub towards the host. Each of the other downstream ports of a
hub allows connection to another hub or function. Hubs can detect attach and detach at each downstream
port and enable the distribution of power to downstream devices. Each downstream port can be
individually enabled and configured as either full or low speed. The hub isolates low speed ports from
full speed signaling.
A hub consists of two portions: the Hub Controller and the Hub Repeater. The repeater is a protocol
controlled switch between the upstream port and downstream ports. It also has hardware support for reset
and suspend/resume signaling. The controller provides the interface registers to allow communication
to/from the host. Hub specific status and control commands permit the host to configure a hub and to
monitor and control its ports.
HUB
Upstream
Port
Port
#1
Port
#7 Port
#6 Port
#5
Port
#4
Port
#2 Port
#3
Figure 4-3. A Typical Hub
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Figure 4-4 illustrates how hubs provide connectivity in a desktop computer environment.
Keyboard Monitor PC
Pen Mouse Speaker Mic Phone Hub
Host/HubHub/FunctionHub/Function
Function Function Function Function Function Hub
Figure 4-4. Hubs in a Desktop Computer Environment
4.8.2.2 Functions
A function is a USB device that is able to transmit or receive data or control information over the bus. A
function is typically implemented as a separate peripheral device with a cable that plugs into a port on a
hub. However, a physical package may implement multiple functions and an embedded hub with a
single USB cable. This is known as a compound device. A compound device appears to the host as a
hub with one or more permanently attached USB devices.
Each function contains configuration information that describes its capabilities and resource
requirements. Before a function can be used, it must be configured by the host. This configuration
includes allocating USB bandwidth and selecting function specific configuration options.
Examples of functions are:
• A locator device such as a mouse, tablet, or light pen
• An input device such as a keyboard
• An output device such as a printer
• A telephony adapter such as ISDN
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4.9 USB Host: Hardware and Software
The USB Host interacts with USB devices through the host controller. The host is responsible for the
following:
• Detecting the attachment and removal of USB devices
• Managing control flow between the host and USB devices
• Managing data flow between the host and USB devices
• Collecting status and activity statistics
• Providing a limited amount of power to attached USB devices
USB system software on the host manages interactions between USB devices and host-based device
software. There are five areas of interactions between USB system software and device software, they
are:
• Device enumeration and configuration
• Isochronous data transfers
• Asynchronous data transfers
• Power management
• Device and bus management information
Whenever possible, USB software uses existing host system interfaces to manage the above interactions.
For example, if a host system uses Advanced Power Management (APM) for power management, USB
system software connects to the APM message broadcast facility to intercept suspend and resume
notifications.
4.10 Architectural Extensions
The USB architecture comprehends extensibility at the interface between the Host Controller Driver and
USB driver. Implementations with multiple host controllers, and associated Host Controller Drivers, are
possible.
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Chapter 5
USB Data Flow Model
This chapter presents information about how data is moved across the USB that affects all implementers.
The information presented is at a level above the signaling and protocol definitions of the system.
Chapter 7, Electrical and Chapter 8, Protocol Layer should be consulted for more details about their
respective parts of the USB system. This chapter provides framework information that is further
expanded in Chapter 9, USB Device Framework, Chapter 10, USB Host: Hardware and Software, and
Chapter 11, Hub Specification. This chapter should be read by all implementers to understand key
concepts of the USB.
5.1 Implementer Viewpoints
The USB provides communication services between a host and attached USB devices. However, the
simple view an end user sees of attaching one or more USB devices to a host, as in Figure 5-1, is in fact a
little more complicated to implement than as indicated by the figure. Different views of the system are
required to explain specific USB requirements from the perspective of different implementers. Several
important concepts and features must be supported to provide the end user with the reliable operation
demanded from today’s personal computers. USB is presented in a layered fashion to ease explanation
and allow implementers of particular USB products to focus on the details related to their product.
USB Hos t USB Devi ce
Figure 5-1. Simple USB Host/Device View
Figure 5-2 shows a deeper overview of USB identifying the different layers of the system that will be
described in more detail in the remainder of the specification. In particular, there are four focus
implementation areas:
• USB Physical Device - A piece of hardware on the end of a USB cable that performs some useful
end user function.
• Client Software - Software that executes on the host corresponding to a USB device. This client
software is typically supplied with the operating system or provided along with the USB device.
• USB System Software - Software that supports USB in a particular operating system. Typically
supplied with the operating system independently of particular USB devices or client software.
• USB Host Controller (Host Side Bus Interface) - The hardware and software that allows USB devices
to be attached to a host.
There are shared rights and responsibilities between the four USB system components. The remainder of
this specification describes the details required to support robust, reliable communication flows between
a function and its client.
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Client SW
USB Host
Controller
USB Logical
Device
Function
Host Physical DeviceInterconnect
USB Bus
Interface
USB System SW
Actual communications flow
Logical communications flow
Implementation Focus Area
Function Layer
USB Device
Layer
USB Bus
Interface Layer
Figure 5-2. USB Implementation Areas
As shown in Figure 5-2, the simple connection of a host to a device requires interaction between a
number of layers and entities. The USB Bus Interface layer provides physical/signaling/packet
connectivity between the host and a device. The USB Device Layer is the view the USB System
software has for performing generic USB operations with a device. The Function Layer provides
additional capabilities to the host via an appropriate matched client software layer. The USB Device and
Function layers each have a view of logical communication within their layer that actually uses the USB
Bus Interface Layer to accomplish data transfer.
The physical view of USB communication as described in Chapters 6, 7, and 8 is related to the logical
communication view presented in Chapters 9 and 10. This chapter describes those key concepts that
affect USB implementers and should be read by all before proceeding to the remainder of the
specification to find those details most relevant to their product.
To describe and manage USB communication, the following concepts are important:
• Bus Topology: Section 5.2 presents the primary physical and logical components of USB and how
they interrelate.
• Communication Flow Models: Sections 5.3 through 5.8 describe how communication flows
between the host and devices through the USB and defines the four USB transfer types.
• Bus Access Management: Section 5.9 describes how bus access is managed within the host to
support a broad range of communication flows by USB devices.
• Special Consideration for Isochronous Transfers: Section 5.10 presents features of USB specific to
devices requiring isochronous data transfers. Device implementers for non-isochronous devices will
not need to read Section 5.10.
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5.2 Bus Topology
There are four main parts to USB topology:
• Host and Devices: The primary components of a USB system.
• Physical Topology: How USB elements are connected.
• Logical Topology: The roles and responsibilities of the various USB elements and how the USB
appears from the perspective of the host and a device.
• Client software to function relationships: How client software and its related function interfaces on a
USB device view each other.
5.2.1 USB Host
The host’s logical composition as shown in Figure 5-3 is:
• The USB host controller
• The aggregate USB system software (USB driver, host controller driver, and host software)
• The client
Client SW
USB Host
Controller
Host
USB System SW
Actual communications flow
Logical communications flow
Figure 5-3. Host Composition
The USB host occupies a unique position as the coordinating entity for the USB. In addition to its special
physical position, the host has specific responsibilities with regard to the USB and its attached devices.
The host controls all access to the USB. A USB device only gains access to the bus by being granted
access by the host. The host is also responsible for monitoring the topology of the USB.
For a complete discussion of the host and its duties, refer to Chapter 10, USB Host: Software and
Hardware.
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5.2.2 USB Devices
A USB physical device’s logical composition as shown in Figure 5-4 is:
• USB bus interface
• USB logical device
• Function
USB physical devices provide additional functionality to the host. The types of functionality provided by
USB devices vary widely. However, all USB logical devices present the same basic interface to the host.
This allows the host to manage the USB-relevant aspects of different USB devices in the same manner.
To assist the host in identifying and configuring USB devices, each device carries and reports
configuration related information. Some of the information reported is common among all logical
devices. Other information is specific to the functionality provided by the device. The detailed format of
this information varies depending on the device class of the device.
For a complete discussion of USB devices, refer to Chapter 9, USB Device Framework.
USB Logical
Device
Function
Physical Device
USB Bus
Interface
Actual communications flow
Logical communications flow
Figure 5-4. Physical Device Composition
5.2.3 Physical Bus Topology
Devices on the USB are physically connected to the host via a tiered star topology, as illustrated in
Figure 5-5. USB attachment points are provided by a special class of USB device known as a hub. The
additional attachment points provided by a hub are called ports. A host includes an embedded hub called
the root hub. The host provides one or more attachment points via the root hub. USB devices which
provide additional functionality to the host are known as functions. To prevent circular attachments, a
tiered ordering is imposed on the star topology of the USB. This results in the tree-like configuration
illustrated in Figure 5-5.
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RootHUB
HUB
HUB
Device
Compound device
HOST
Device
Device
Device
Device
Device
Device
Figure 5-5. USB Physical Bus Topology
Multiple functions may be packaged together in what appears to be a single physical device. For
example, a keyboard and a trackball might be combined in a single package. Inside the package, the
individual functions are permanently attached to a hub and it is the internal hub that is connected to the
USB. When multiple functions are combined with a hub in a single package, they are referred to as a
compound device. From the host’s perspective, a compound device is the same as a separate hub with
multiple functions attached. Figure 5-5 also illustrates a compound device.
5.2.4 Logical Bus Topology
While devices physically attach to the USB in a tiered, star topology, the host communicates with each
logical device as if it were directly connected to the root port. This creates the logical view illustrated in
Figure 5-6 that corresponds to the physical topology shown in Figure 5-5. Hubs are logical devices also,
but are not shown in Figure 5-6 to simplify the picture. Even though most host/logical device activities
use this logical perspective, the host maintains an awareness of physical topology to support processing
the removal of hubs. When a hub is removed, all of the devices attached to the hub must be removed
from the host’s view of the logical topology. A more complete discussion of hubs can be found in
Chapter 11, Hub Specification.
Host
Logical
Device
Logical
Device
Logical
Device
Logical
Device Logical
Device
Logical
Device
Logical
Device
Figure 5-6. USB Logical Bus Topology
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5.2.5 Client Software to Function Relationship
Even though the physical and logical topology of the USB reflects the shared nature of the bus, client
software(CSw) manipulating a USB function interface is presented with the view that it deals only with
its interface(s) of interest. Client software for USB functions must use USB software programming
interfaces to manipulate their functions as opposed to directly manipulating their functions via memory
or I/O accesses as with other buses (e.g., PCI, EISA, PCMCIA, etc.). During operation, client software
should be independent of other devices that may be connected to USB. This allows the designer of the
device and client software to focus on the hardware/software interaction design details. Figure 5-7
illustrates a device designer’s perspective of the relationships of client software and USB functions with
respect to the USB logical topology of Figure 5-6.
Client
Software
Func Func Func
Func
Func
Func Func
CSw
CSw
CSw
CSw
CSw
CSw
Figure 5-7. Client Software to Function Relationships
5.3 USB Communication Flow
USB provides a communication service between software on the host and its USB function. Functions
can have different communication flow requirements for different client to function interactions. USB
provides better overall bus utilization by allowing the separation of the different communication flows to
a USB function. Each communication flow makes use of some bus access to accomplish communication
between client and function. Each communication flow is terminated at an endpoint on a device. Device
endpoints are used to identify aspects of each communication flow.
The diagram in Figure 5-8 shows a more detailed view of Figure 5-2. The complete definition of the
actual communication flows of Figure 5-2 supports the logical device and function layer communication
flows. These actual communication flows cross several interface boundaries. Chapters 6, 7, and 8
describe the mechanical, electrical, and protocol interface definitions of the USB “wire.” Chapter 9
describes the USB device programming interface that allows a USB device to be manipulated from the
host side of the wire. Chapter 10 describes two host side software interfaces:
• Host Controller Driver (HCD) - the software interface between the USB host controller and USB
system software. This interface allows a range of host controller implementations without requiring
all host software to be dependent on any particular implementation. One USB Driver can support
different host controllers without requiring specific knowledge of a host controller implementation.
A host controller implementer provides an HCD implementation that supports the host controller.
• USB Driver (USBD) - the interface between USB system software and the client software. This
interface provides clients with convenient functions for manipulating USB devices.
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SIESIE
Host
Controller
USB Bus
Interface USB Bus
Interface
USB System SW
manages devices
USB L o gical
Device
a collection of
endpoints
Interconnect Physical DeviceHost
USB Wire
Buffers
Transfers
Transactions
Data Per
Endpoint
Interface
Specific
Function
a collection of
interfaces
Default Pipe
to Endpoint Zero
Pipe Bundl e
to an interface
Pipe, represents connection abstraction
between two horizontal entities
Data transport mechanism
USB-relevant format of transported data
No USB
Format
USB
Framed
Data
USB Framed
Data
USB
Framed
Data
No USB
Format
Interf ace x
Endpoint
Zero
Client SW
manages an interface
Mechanical,
Electrical,
Protocol
(Chapter 6,7,8)
USB Device
(Cha pter 9)
USB Host
(Cha pter 10)
Figure 5-8. USB Host/Device Detailed View
A USB logical device appears to the USB system as a collection of endpoints. Endpoints are grouped
into endpoint sets which implement an Interface. Interfaces are views to the function. System software
manages the device using the Default Pipe (associated with Endpoint 0). Client software manages an
Interface using pipe bundles (associated with an Endpoint Set). Client software requests that data be
moved across the USB between a buffer on the host and an endpoint on the USB device. The host
controller (or USB device depending on transfer direction) packetizes the data to move it over the USB.
The host controller also coordinates when bus access is used to move the packet of data over the USB.
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Figure 5-9 illustrates how communication flows are carried over pipes between endpoints and host side
memory buffers. The following sections describe endpoints, pipes, and communication flows in more
detail.
Client
Software
Interface
Endpoints
Comm Flows
Buffers
USB Logical D evice
Host
Pipes
Figure 5-9. USB Communication Flow
Software on the host communicates with a logical device via a set of communication flows. The set of
communication flows are selected by the device software/hardware designer(s) to efficiently match the
communication requirements of the device to the transfer characteristics provided by USB.
5.3.1 Device Endpoints
An endpoint is a uniquely identifiable portion of a USB device that is the terminus of a communication
flow between the host and device. Each USB logical device is composed of a collection of independently
operating endpoints. Software may only communicate with a USB device via one or more endpoints.
Each logical device has a unique address assigned by the system at device attachment time. Each
endpoint on a device has a device (design time) determined unique identifier, the endpoint number. The
combination of the device address and the endpoint number allows each endpoint to be uniquely
referenced.
An endpoint has characteristics that determine the type of transfer service required between the endpoint
and the client software. Endpoints describe themselves by:
• Their bus access frequency/latency requirements
• Their bandwidth requirements
• Their endpoint number
• The error handling behavior requirements
• Maximum packet size that the endpoint is capable of sending or receiving
• The transfer type for the endpoint (refer to Section 5.4 for details)
• For bulk and isochronous transfer types, the direction data is transferred between the endpoint and
the host
Endpoints are in an unknown state before being configured. Endpoints must not be accessed by the host
before being configured.