FM75M8X - Fairchild Semiconductor

December 2006

FM75 Rev. 1.0.8

FM75 Low-Voltage Two-Wire Digital Temperature Sensor with Thermal Alarm

FM75

Low-Voltage Two-Wire Digital Temperature Sensor with

Thermal Alarm

Features

■User Configurable to 9, 10, 11 or 12-bit Resolution

■Precision Calibrated to ±1°C, 0°C to 100°C

Typical

■Temperature Range: -40°C to 125°C

■Low Operating Current (less than 250µA)

■Low Self Heating (0.2°C max. in still air)

■Operating Voltage Range: 2.7V to 5.5V

Applications

■Battery Management

■FAX Management

■Printers

■Portable Medical Instruments

■HVAC Systems

■Power Supply Modules

■Disk Drives

■Computers

■Automotive Components

Description

The FM75 contains a high-precision CMOS temperature

sensor, a Delta-Sigma analog-to-digital converter, and a

SMBus-compatible serial digital interface. Typical accu-

racy is ±2°C over the full temperature range of 40°C to

125°C and to ±1°C over the range of 0°C to 100°C, with

9- to 12-bit resolution (default is 9).

Thermal alarm output, over-limit signal (OS) supports

interrupt and comparator modes. OS is active if the user-

programmable trip-temperature is exceeded. When the

temperature falls below the trip temperature, plus the

user-programmable hysteresis limit, the OS is disabled.

Available in a surface mount SOIC-8 (SOP-8) package.

Application Diagram

Figure 1. Typical Application Diagram

Ordering Information

FM75

SDA

SCL

8-Pin

Configuration

User

Programmable

Address

SMBus

Interface

2.7 to 5.5V

Part Number Package Temperature Range Packing Method

FM75M8x 8-Lead SOIC -40°C to +125°C 2500 Units, Tape and Reel

FM75 Low-Voltage Two-Wire Digital Temperature Sensor with Thermal Alarm

FM75 Rev. 1.0.8 2

Pin Assignments

Figure 2. Pin Assignments

Pin Descriptions

Pin # Name Direction Description

1 SDA Input/Output Serial Data. Open drain to I/O-data pin for two-wire interface.

2SCLInputSerial Clock. Clock for two-wire serial interface.

3 OS Output Over-Limit Signa l. Open drain thermostat output that indicates if

the temperature exceeds user-programmable limits. Default is

active LOW.

4 GND Supply Ground

5, 6, 7 A0, A1, A2 Input Address Least Significant Bits (LSBs). User selectable address

pins for the three LSBs of the serial interface address.

DD Supply Supply Voltage

VDD

SDA

SCL

GND

FM75

FM75 Low-Voltage Two-Wire Digital Temperature Sensor with Thermal Alarm

FM75 Rev. 1.0.8 3

Absolute Maximum Ratings

The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed.

The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics

tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditio ns” table defines

the conditions for actual device operation.

Note:

1. Human Body Model: 100pF capacitor discharged through a 1.5kΩ resistor into each pin. Machine Model: 200pF

capacitor discharged directly into each pi n.

Electrical Characteristics(2)

-40°C ð TA ð +125°C, VCC = 5.0V unless otherwise noted. Specifications are subject to change without notice.

Notes:

2. These specifications are guaranteed only for the test conditions listed.

3. This specification only indicates how often temperature information is updated to the temperature register.

The FM75 can be read at any time without interrupting the temperature conversion process.

4. Accuracy (expressed in °C) = the difference between the FM75 output temperature and the measured temperature.

Parameter Min. Typ. Max. Units

Supply Voltage +7 V

Output Voltage VCC + 0.5 V

Output Current 10 mA

Storage Temperature Range -60 +150 °C

Lead Soldering Temperature 220 °C

ESD(1)

Human Body Model

Machine Model 2000

250 V

Symbol Parameter Conditions Min. Typ. Max. Units

TMIN, TMAX Specified Temperature Range -40 +125 °C

Temperature Conversion Time(3) 90 ms

Accuracy(4) TA = +25°C

TA = +100°C

TA = -40°C (TMIN)

TA = +125°C (TMAX)

-2

-3

-4

°C

FM75 Low-Voltage Two-Wire Digital Temperature Sensor with Thermal Alarm

FM75 Rev. 1.0.8 4

Logic Electrical Characteristics

Symbol Parameter Conditions Min. Typ. Max. Units

VIH Minimum Input Voltage

Logic HIGH VDD x 0.7 VDD + 0.5 V

VIL Maximum Input Voltage

Logic LOW -0.3 VDD x 0.3 V

VOL Maximum Output Voltage

Logic LOW VDD = 5V, IOL = -3mA

VDD = 3V, IOL = -1.5mA 0.36

0.36 V

IDD Quiescent Supply Current Interface Inactive R/W

Activity on SDA 250

350 500

700 µA

IDD-SD Shutdown Current Interface Inactive R/W

Activity on SDA 0.15

83 1

150 µA

IIN Input Leakage Current VIN = 0V or 5V, TA = 25°C

-40°C < TA < 125°C ±0.1

±1.0 µA

IOL Output Sink Current TA = 25°C, VOL = 0.4V 3 mA

ILEAK Output Leakage Current VOH = 5V, VDD = 0V 0.001 5 µA

tFOutput Transition Time CL = 400pF, IOL = -3mA 250 ns

CIN Input Capacitance All Digital Inputs 20 pF

FM75 Low-Voltage Two-Wire Digital Temperature Sensor with Thermal Alarm

FM75 Rev. 1.0.8 5

Serial Port Timing

Figure 3. Serial Port Timing Diagram

Symbol Parameter Conditions Min. Typ. Max. Units

tSCL SCL Clock Period 1.0 100 µs

tT:LH, tT:HL SCL Clock Transition Time 300 ns

tLOW SCL Clock LOW Period 0.470 µs

tHIGH SCL Clock HIGH Period 0.400 50 µs

tBUF Bus free time between a Stop and

a new Start Condition 1.0 µs

tSU:DAT Data In Set-up to SCL HIGH 100 ns

tHD:DAT Data In Hold Time 100 ns

tHD Data Out Stable after SCL LOW 0 ns

tSU:STA SCL LOW Set-up to SDA LOW

(Repeated Start Condition) 100 ns

tHD:STA SCL HIGH Hold after SDA LOW

(Start Condition) 100 ns

tSU:STO SDA HIGH after SCL HIGH

(Stop Condition) 100 ns

tPOR Time in which a FM75 must be

operational after a power-on reset 500 ms

SDA

Data In

tHD:STA

tSCL

tSU:STO

tSU:DAT

tHD

tHD:DAT

SCL

SDA

Data Out

SCL

10% 10%

90%

T:LH

tT:HL

tLOW tHIGH

tBUF

tSU:STA

90%

FM75 Low-Voltage Two-Wire Digital Temperature Sensor with Thermal Alarm

FM75 Rev. 1.0.8 6

Basic Operation

The FM75 temperature sensing circuitry continuously

produces analog voltage proportion al to the device tem-

perature. At regular intervals, the FM75 converts the

analog voltage to a two’s complement digital value,

which is placed into the temperature register.

The FM75 has an SMBus-compatible digital serial inter-

face that allows access to the data in the temperature

vides access to all other FM75 registers to customize

operation of the device.

The FM75 temperature-to-dig ital conversion can have 9,

10, 11, or 12-bit resolution selected, providing 0.5°C,

0.25°C, 0.125°C, and 0.0625°C temperature resolution,

respectively. At power-up, the default conversion resolu-

tion is 9-bits. The conversion resolution is controlled by

the R0 and R1 bits in the configuration register.

Table 1 gives examples of the relationship between the

output digital data and the external temperature. The

9-bit, 10-bit, 11-bit, and 12-bi t col umns in Table 1 indicate

the right-most bit in the outp ut data stream that can co n-

tain temperature information for each conversion accu-

racy. Since the output digital data is in two’s-complement

format, the most significant bit of the temperature is the

“sign” bit. If the sign bit is zero, the temp erature is posi-

tive; if the sign bit is one, the temperature is negative.

The FM75 has a shutdown mode that reduces the oper-

ating current to 150nA. This mode is controlled by the

SD bit in the configuration register.

Power-Up Default Conditions

The FM75 powers up in the following de fault state:

• Thermostat mode: comparator mode

• OS polarity: active LOW

• Fault tolerance: 1 fault (i.e., F0 = 0 and F1 = 0 in the

configuration register)

•T

OS: 80°C

•T

HYST: 75°C

• Register pointer: 00 (temperature register)

• Conversion resolution: 9 bits (i.e., R0 = 0 and R1 = 0

in the configuration register)

After power-up, these conditions can be reprogrammed

via the serial interface. Refer to the Serial Data Bus

Operation section for FM75 programming instructions.

Thermal Alarm Function

The FM75 thermal alarm function provides programma-

ble thermostat capability and allows the FM75 to function

as a stand-alone thermostat without using the serial

interface. The Over-Limit Signal (OS) outp ut is the alarm

output. This signal is an open-drain output and, at

power-up, this pin is configured with active-low polarity.

Table 1. Relationship Between Temperature

and Digital Output

The OS polarity is controlled by the POL bit in the config-

uration register. The programmable upper tri p-point tem-

perature for the thermal alarm is stored in the TOS

the lower trip point) is stored in the THYST register.

The thermal a larm has two modes of o peration: compar-

ator mode and interrupt mode. At power-up, the default

is comparator mode. The alarm mode is controlled by the

CMP/INTR bit in the configuration register.

Fault Tolerance

For both comparator and Interrupt modes, the alarm

“fault tolerance” setting pl ays a role in determi ning when

the OS output is activated. Fault tolerance refers to the

number of consecutive ti mes an error condition must be

detected before the user is notified. Higher fault toler-

ance settings ca n help eliminate false al arms caused by

noise in the system. The alarm fault tolerance is con-

trolled by bits F0 and F1 in the configuration register.

These bits can be used to set the fault tolerance to 1, 2,

4, or 6, as shown in Table 4. At power-up, these bits both

default to 0 (fau l t to le rance = 1).

Temperature

Digital Output

giS

forebmuN

desustib

noisrevnoc

noituloser

tib

syawlA

orez

llA

serutarepmeT

noituloseRtiB-21 0000

noituloseRtiB-11 00000

noituloseRtiB-10 00 0000

noituloseRtiB-90000000

C521+ 011110110000 0000

C5260.001+ 001100100001 0000

C521.05+ 011001000010 0000

C52.21+ 000000110100 0000

C0 000000000000 0000

C5.02- 101111011000 0000

C52.33- 110101111100 0000

C5260.54- 110101001111 0000

C55- 100110010000 0000

FM75 Low-Voltage Two-Wire Digital Temperature Sensor with Thermal Alarm

FM75 Rev. 1.0.8 7

Comparator Mode

In comparator mode, each time a temperature-to-digital

(T-to-D) temperature conversion occurs, the new digital

temperature is compared to the value stored in the TOS

and THYST registers. If a fault tolerance number of con-

secutive temperature measurements are greater than

the value stored in the TOS register , the OS output is acti-

vated. For example, if bits F1 and F0 are equal to “10”

(fault tolerance = 4), four consecutive tempe rature mea-

surements must exceed TOS to activate the OS output.

Once the OS output is active, it remains active until the

first time the measured temperature drops below the

temperature stored in the THYST register. The operation

of the alarm in comparator mode with fault tolerance = 2

is illustrated in Figure 4.

Interrupt Mode

In interrupt mode, the OS output first becomes active

after a fault tolerance number of consecutive tempera-

ture measurements exceed the value stored in the TOS

it can only be cleared by a user read from any of the

FM75 registers (temperature, configuration, TOS, or

THYST) or by putting the F M75 into shutdown mode (i.e.,

by setting the shutdown bit in the configuration register to

“1”). Once cleared, the OS output can only be activated

the next time by a fault tolerance numb er of consecutive

temperature measurements lower than the value stored

in THYST. Once it is activated, the OS output can on ly be

deactivated by a user read or shutdown. In interrupt

mode, the activate/clear cycle for OS has the following

pattern: temperature > TOS, clear, temperature < THYST,

clear, temperature > TOS, clear, etc. The operation of the

alarm in interrupt mode with fault tolerance = 2 is illus-

trated in Figure 4.

Figure 4. Thermal Alarm Operation in Comparator and Interrup t Modes

For this example:

Fault Tolerance = 2

Output Polarity = Active Low

Read (or Shutdown)

HYST

Temperature-to-Digital

Conversion

O S (Comparator Mode)

O S (Interrupt Mode)

FM75 Low-Voltage Two-Wire Digital Temperature Sensor with Thermal Alarm

FM75 Rev. 1.0.8 8

Registers

The FM75 contains the following five registers:

■Command Register

■Temperature Register

■Configuration Reg ister

■Over-Limit-Signal Temperature Register (TOS)

■Hysteresis Temperature Register (THYST)

All of these registers can be accessed by the user via the

digital serial interface at any time (see Serial Interface

Operation for instructions). A detailed description of

these registers and their fun ctions is provided in the fol-

lowing sections. A diagram of the register hierarchy is

shown in Figure 5.

Figure 5. Register Hierarchy

Command Register

The command register is a one-byte (8-bit) write-only

cates which of the other registers (temperature, con figu-

ration, TOS, or THYST) to read from or write to during a n

upcoming operation. The command register “points” to

the selected register, as shown in Figure 11.

The command register is illustrated in Figure 9. The P1

and P0 bits of the command register determine which

Significant Bits (MSBs) of the command register must

always be zero. Writing a one into any of these bits

causes the current operation to be terminated.

The command register retains pointer information

between operations; therefore, this register only needs

to be updated once for consecutive read operations from

the same register. All bits in the command register

default to zero at power-up.

Figure 6. Command Register Format

Table 2. Register Assignments for Command

Bits P1 and P2

Serial Interface

Command Register

1-byte Write Only

Temperature Register

2-byte Read Only

Command Reg. = 00000000

Configuration Register

1-byte Read/Write

Command Reg. = 00000001

HYST

2-byte Read/Write

Command Reg. = 00000010

2-byte Read/Write

Command Reg. = 00000011

Command

(Pointer)

Data

Read/Write

Data

SDA SCL

Temperature Register 0 0

Configuration Register 0 1

THYST Register 1 0

TOS Register 1 1

000000

P1 P0

MSB LSB

FM75 Low-Voltage Two-Wire Digital Temperature Sensor with Thermal Alarm

FM75 Rev. 1.0.8 9

Temp era tur e Re gi st er

The temperature register is a two-byte (16-bit) re ad-only

are stored in the temperature register in two’s comple-

ment format and the contents of this register are updated

at regular intervals, each time the T-to-D conversion is

finished.

The user can read data from the temperature register at

any time. When a T-to-D conversion is completed, the

new data is loaded into a comparator buffer to evaluate

fault conditions and updates the temp erature register if a

read cycle is not ongoing. The FM75 is continuously

evaluating fault conditions regardless of read or write

activity on the bus. If a read is ongoing, the previous

temperature is read. The readable temperature is

updated upon the completion of the next T-to-D conver-

sion not masked by a read cycle.

The temperature register is illustrated in Figure 7.

Depending on the resolution of the T-to-D conversion,

the 9, 10, 11, or 12 MSBs of the register contain temper-

ature data. All unused bits following the digital tempera-

ture are zero. The MSB position of the temperature

perature and bit 14 contains the temperature MSB. Bits

in the temperature register default to zero at power-up.

SB = Two’s complement sign bit

TMSB = Temperature MSB

T = Temperature data

9-bit LSB = Temperature LSB for 9-bit conversions

10-bit LSB = Temperature LSB for 10-bit conversions

11-bit LSB = Temperature LSB for 11-bit conversions

12-bit LSB = Temperature LSB for 12-bit conversions

Figure 7. Temperature Register Format

Configuration Register

The configuration register is a one-byte (8-bit) read/write

control the FM75 shutdown mode as well as the follow-

ing thermal alarm features: polarity, operating mode, and

fault tolerance. The configuration register contains two

bits that set the fault tolerance trip point. The fault toler-

ance trip point is the number of consecutive times the

internal circuit rea ds the temperature and finds the tem-

perature outside the limits programmed. The pro-

grammed limits are defined by the TOS register for the

upper limit and by the THYST register for the lower limit.

Table 4 shows the relationship between F1 and F0 and

the number of consecutive errors or “trips” needed to

activate the alarm. The configuration register also con-

tains the two bits that set the T-to-D conversion resolu-

tion to 9, 10, 11, or 12 bits. Table 3 shows the

relationship betwe en R1 and T0 a nd the conversion res-

olution. All bits in the configuration register default to

zero at power-up.

R1 = Resolution bit 1 (see Table 3).

R0 = Resolution bit 0 (see Table 3).

F1 = Fault tolerance bit 1 (see Table 4).

F0 = Fault tolerance bit 0 (see Table 4).

POL = OS output polarity: 0 = active low, 1 = active

high.

CMP/INT = thermostat mode: 0 = comparator mode ,

1 = inerrupt mode.

SD = shutdown: 0 = normal operation, 1 = shutdown

mode.

Figure 8. Configuration Register Format

Table 3. Conversion Resolution Settings

Table 4. Fault Tolerance Settings

SB TMSB TTTTTT

MSB 8

14 13 12 11 10 9

9-bit

LSB 0000

7LSB

654321

10-bit

LSB 11-bit

LSB 12-bit

LSB

A-to-D

Conversion Resolu tion R1 R0

9 Bits 0 0

10 Bits 0 1

11 Bits 1 0

12 Bits 1 1

Fault Tolerance R1 R0

100

201

410

611

XR1 R0 F1 F0 POL CMP/

INT SD

MSB LSB

654321

FM75 Low-Voltage Two-Wire Digital Temperature Sensor with Thermal Alarm

FM75 Rev. 1.0.8 10

Over-Limit Signal Temperature Register (TOS)

The TOS register is a two-byte (16-bit) read/write register

that stores the user-programmable upper trip-point tem-

perature for the thermal alarm in two’s-complement for-

mat. At power-up, this register defaults to 80°C (i.e. 0101

0000 0000 0000).

The format of the TOS register is identical to that of the

temperature register (see Figure 9). The four LSBs of the

TOS register are hardwired to zero, so data written to

these register bits is ignored. The MSB position of the

TOS register contains the sign bit for the digital tempera-

ture and bit 14 contains the temperature MSB.

The resolution setting for the T-to-D conversion deter-

mines how many bits of the TOS register are used by the

thermal alarm. For example, for 9-bit conversions, the

trip-point temperature is defined by the nine MSBs of the

TOS register and all remaining bits are ignored.

Hysteresis Temperature Register (THYST)

The THYST register is a two-byte (1 6-bit) read /write regi s-

ter that stores the programmable lower trip-point temper-

ature for the thermal alarm in two’s-complement format.

At power-up, this register defaults to 75°C (i.e. 0100

1011 0000 0000).

The THYST register is illustrated in Figure 9. The format

of this register is the same as that of the temperature

wired to zero, so data written to these bits is ignored.

The resolution setting for the T-to-D conversion deter-

mines how many bits of the THYST register are used by

the thermal alarm. For example, for 9-bit conversions,

the hysteresis temperature is defined by the nine MSBs

of the THYST register and all remaining bits are ignored.

Figure 9. THYST Register and TOS Register Format

TMSB

TTTTTT

MSB 8

14 13 12 11 10 9

9-bit

LSB

0000

7LSB

654321

10-bit

LSB

11-bit

LSB

12-bit

LSB

SB = Two’s complement sign bit

TMSB = Temperature MSB

T = Temperat ure data

9-bit LSB = Temperature LSB for 9-bit conversions

10-bit LSB = Temperature LSB for 10-bit conversions

11-bit LSB = Temperature LSB for 11-bit conversions

12-bit LSB = Temperature LSB for 12-bit conversions

FM75 Low-Voltage Two-Wire Digital Temperature Sensor with Thermal Alarm

FM75 Rev. 1.0.8 11

Serial Data Bus Operation

General Operation

Writing to and reading from the FM75 registers is accom-

plished via the SMBus-compatible two-wire serial inter-

face. SMBus protocol requires that one device on the

bus initiates and controls all read and write operations.

This device is called the “master” device. The master

device also generates the SCL signal, whi ch is the clock

signal for all other devices on the bus. All other devices

on the bus are called “slave” devices. The FM75 is a

slave device. Both the master and slave devices can

send and receive data on the bus.

During SMBus operations, one data bit is transmitted per

clock cycle. All SMBus operations follow a repeating nine

clock-cycle pattern that consists of eight bits (one byte)

of transmitted data followed by an acknowledge (ACK) or

not acknowledge (NACK) from the receiving device.

Note that there are no unused clock cycles during any

operation—therefore there must be no breaks in the

stream of

data and ACKs/NACKs during data transfers.

Conversely,

too few clock cycles can lead to incorrect

operation if an inadvertent 8-bit read fro m a 16-bit regis-

ter occurs.

For most operations, SMBus protocol requires the SDA

line to remain stable (unmoving) whenever SCL is HIGH—

i.e., transitions on the SDA line can only occur when SCL

is LOW. The exceptions to this rule are when the master

device issues a start or stop signal. The slave device

cannot issue a start or stop signal.

Start Condition: This condition occurs when the SDA

line transitions from HIGH to LOW while SCL is HIGH.

The master device uses this condition to indicate that a

data transfer is about to begin.

Stop Condition: This condition occurs when the SDA

line transitions from LOW to HIGH while SCL is HIGH.

The master device uses this condition to signal the end

of a data transfer.

Acknowledge and Not Acknowledge: When data is

transferred to the slave d evice, it sends an acknow ledge

(ACK) after receiving every byte of data. A master device

sends an acknowledge (ACK) following only the first byte

read from a two-byte register. The receiving device

sends an ACK by pulling SDA LOW for one clock cycle.

Following the last byte, a master device sends a “not

acknowledge” (NACK) followed by a stop condition. A

NACK is indicated by leaving SDA HIGH during the clock

after the last byte.

Slave Address

Each slave device on the bus has a unique 7-bit address

so the master can identify which device is sending or

receiving data.

The FM75 address is as follows:

The four MSBs of the FM75 address are hardwired to

1001. The three LSBs are user con figurable by tying the

A0, A1, and A2 pins to either VDD or ground. This pro-

vides eight different FM75 addresses, which allows up to

eight FM75s to be connected to the same bus.

Writing t o and Reading from the FM75

All read and write operations must begin with a start sig-

nal generated by the master device. After the start condi-

tion, the master device must immediately send a slave

address (7 bits), followed by a read/write bit. If the slave

address matches the address of the FM75, the FM75

sends an ACK after receiving the read/write bit by pulling

the SDA line LOW for one clock cycle. Figures 11 -16

provide timing diagrams for all FM75 operations.

Setting the Pointer

For all operations, the pointer stored in the command

configuration, TOS or THYST) that is going to be written to

or read from. To change the pointer value in the com-

mand register, the read/write bit following the address

must be 0. This indicates that the master will write new

information into the command register.

After the FM75 sends an ACK in response to receiving

the address and read/write bit, the master device must

transmit an appropriate 8-bit pointer value, as explained

in the Registers section. The FM75 sends an ACK after

receiving the new pointer data.

The pointer set operation is ill ustrated in Figure 11. Any-

time a pointer set is performed, it must be immediately

followed by a read or write operation. Note that the six

MSBs of the pointer value must be zero. If the six MSBs

are not zero, the FM75 does not send an ACK and inter-

nally terminates the operation. The command register

retains the current pointer value between operations;

therefore, once a register is indicated, subsequent read

operations do not require a pointer set cycle. Write oper-

ations always require the pointer be reset.

1001A1A2 A0

FM75 Low-Voltage Two-Wire Digital Temperature Sensor with Thermal Alarm

FM75 Rev. 1.0.8 12

Reading

If the pointer is already pointing to the desired register,

the master can read from that register by setting the

read/write bit (following the slave address) to a one. After

sending an ACK, the FM75 begins transmitting data dur-

ing the following clock cycle. If the configuration register

is being read, the FM75 transmits one byte of data (see

Figure 13). The master should respond with a NACK, fol-

lowed by a stop condition. If the temperature, TOS, or

THYST register is being read, the FM75 transmits two

bytes of data (see Figure 12). The master must respond

to the first byte of data with an ACK and to the second

byte of data with a NACK followed by a stop condition.

To read from a register other than the one currently indi-

cated by the command register, a pointer to the desired

set, the master must perform a repeat start condition

(see Figure 11 and Figure 15), which indicates to the

FM75 that a new operation is about to occur. If the

repeat start condition does not occur , the FM75 assumes

that a write is taking place and the selected register is

overwritten by the upcoming d ata on the data bus. After

the start condition, the master must again send the

device address and read/write bit. This time, the read/

write bit must be set to one to indicate a read. The rest of

the read cycle is the same as described in the previous

paragraph for reading from a preset pointer location.

Writing

All writes must be proceeded by a pointer set, even if the

pointer is already pointing to the desired register.

Immediately following the pointer set, the master must

begin transmitting the data to be written. If the master is

writing to the configuration register, one byte of data

must be sent (see Figure 16). If the TOS or THYST regis-

ter is being written, the master must send two bytes of

data (see Figure 14). After transmitting each byte of

data, the master must release the Serial Data (SDA) line

for one clock cycle to allow the FM75 to acknowledge

receiving the byte. The write operation should be termi-

nated by a stop signal from the master.

Caution: Inadvertent 8-Bit Read from a

16-Bit Register

An inadvertent 8-bit read from a 16-bit register, with the

D7 bit LOW, can cause the FM75 to pause in a state

where the SDA line is pulled LOW by the output data and

is incapable of receiving either a sto p or a start condi ti on

from the master. T he only way to remove the FM75 from

this state is to continue clocking for nine cycles until SDA

goes HIGH, at which time issuing a stop co ndition resets

the FM75, shown in Figure 10.

Figure 10. Inadvertent 8-Bit Read from 16-Bit Register Where D7 = 0 and Forces Outpu t LOW

D7 D6 D5 D4 D3 D2 D1 D0 D7

Address Byte Most Significant

Data Byte

(from FM75)

1 0 0 1 A2 A1 A0 R/W

Master must

detect error

condition on

FM75

Nine additional clock cycles to reset the FM75

Ack

from

FM75

No Ack

from

Master

No Ack

from

Master

Start

from

Master

SCL

SDA

Stop intended by

Master, but FM75

SDA line locked

low

D6 D5 D4 D3 D2 D1 D0 N

Stop

Condition

from

Master

FM75 Low-Voltage Two-Wire Digital Temperature Sensor with Thermal Alarm

FM75 Rev. 1.0.8 13

Timing Diagrams

Figure 11. Pointer Set Followed by Immediate Read from a Two-byte Register

(Temperature, TOS, or THYST Register)

Figure 12. Two-byte Read from Preset Pointer Location (Temperature, TOS, or THYST Register)

Figure 13. One-byte Read from Configuration Register with Preset Pointer

000 000P1 P0

A2 A1 A0

Address Byte Pointer Byte

1100 R/W

SAA

Ack

from

FM75

Ack

from

aTS75

. . . .

Note: This segment of this timing diagram is a generic

pointer set cycle that must be followed by either an

immediate read cycle or write cycle, as shown in this

figure and in figures 10, 11, and 12.

SCL

SDA

Most Significant Data

Byte

(

from FM75

)

Least Significant Data Byte

(from FM75)

D7 D6 D5 D4 D3 D2 D1 D0

A2 A1 A0 D7 D6 D5 D4 0000

Address Byte

1100R/W

SPAAN

Ack

from

FM75

Ack

from

Master

No Ack

from

Master

Repeat

Start

from

Master

. . .

SCL

SDA

D7 D6 D5 D4 D3 D2 D1 D0A2 A1 A0 D7 D6 D5 D4 0 0 0 0

Address

Byte Most Significant Data

Byte

(from FM75)

110 0 R/W

Least Significant Data

Byte

(from FM75)

S PAAN

Ack

from

FM75

Ack

from

Master

No Ack

from

Master

SCL

SDA

XD6D5D4D3D2D1D0A2 A1 A0

Address Byte Data Byte

(

from FM75

)

110 0 R/W

S PAN

Ack

from

FM75

No Ack

from

Master

SCL

SDA

FM75 Low-Voltage Two-Wire Digital Temperature Sensor with Thermal Alarm

FM75 Rev. 1.0.8 14

Timing Diagrams (Continued)

Figure 14. Pointer Set Followed by Immediate Write to A 2-byte Register (TOS or THYST Register)

Figure 15. Pointer Set Foll owed by Immediate Re ad from Configuration Register

Figure 16. Pointer Set Followed by Immediate Write to the Configuration Register

SCL

Ack

from

FM75

000000

P1 P0A2 A1 A0

Address Byte Pointer Byte

1100 R/W

Ack

from

FM75

D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 0 0 0 0

Most Significant Data Byte

(from Master) Least Significant Data Byte

(from Master)

PA A

Ack

from

FM75

Ack

from

FM75

. . . .

SDA

A2 A1 A0

Address Byte

110 0 R/W

Repeat Start

from

Master

000000P1

A2 A1 A0

Address Byte Pointer Byte

110 0 R/W

SAA

Ack

from

FM75

Ack

from

FM75

A2 A1 A0

Address Byte

(repeated here for

clarity, transmitted only

once in the actual sequence

)

10 R/W A

Ack

from

FM75

XD6 D5D4 D3 D2 D1 D0

Data Byte

(from FM75)

No Ack

from

Master

SCL

SDA

. . . .

Data Byte

(

from Master

)

Address Byte

XD6 D5 D4 D3 D2 D1 D0 P

Ack

from

FM75

000000P1

A2 A1 A0

Pointer Byte

1100 R/W

SAA

Ack

from

FM75

Ack

from

FM75

SCL

SDA

FM75 Low-Voltage Two-Wire Digital Temperature Sensor with Thermal Alarm

FM75 Rev. 1.0.8 15

Mechanical Dimensions

Dimensions are in inches (millimeters) unless otherwise noted.

Figure 17. Molded Package, Small Outline, 0.15 Wide, 8-Lead (M8)

FM75 Low-Voltage Two-Wire Digital Temperature Sensor with Thermal Alarm

FM75 Rev. 1.0.8 16