LT4250L/LT4250H Negative 48V Hot Swap Controller FEATURES DESCRIPTION n The LT(R)4250L/LT4250H are 8-pin, negative 48V Hot SwapTM controllers that allow a board to be safely inserted and removed from a live backplane. Inrush current is limited to a programmable value by controlling the gate voltage of an external N-channel pass transistor. The pass transistor is turned off if the input voltage is less than the programmable undervoltage threshold or greater than the overvoltage threshold. A programmable current limit protects the system against shorts. After a 500s timeout the current limit activates the electronic circuit breaker. The PWRGD (LT4250L) or PWRGD (LT4250H) signal can be used to directly enable a power module. The LT4250L is designed for modules with a low enable input and the LT4250H for modules with a high enable input. n n n n n n n n Allows Safe Board Insertion and Removal from a Live -48V Backplane Circuit Breaker Immunity to Voltage Steps and Current Spikes Programmable Inrush and Short-Circuit Current Limits Pin Compatible With LT1640L/LT1640H Operates from -18V to -80V Programmable Overvoltage Protection Programmable Undervoltage Lockout Power Good Control Output Bell-Core Compatible ON/OFF Threshold APPLICATIONS n n n The LT4250L/LT4250H are available in 8-pin PDIP and SO packages Central Office Switching -48V Distributed Power Systems Negative Power Supply Control L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. Hot Swap is a trademark of Linear Technology Corporation. TYPICAL APPLICATION Voltage Step on Input Supply -48V RTN (SHORT PIN) -48V RTN UV = 38.5V UV RELEASE AT 43V OV = 71V R4 549k 1% 8 VDD 3 R5 6.49k 1% R6 10k 1% UV PWRGD LT4250L 2 VEE AND DRAIN 20V/DIV 1 OV VEE GATE SENSE 4 5 DRAIN 6 ID (Q1) 5A/DIV 7 R3 1k, 5% * -48V INPUT 1 0.1F 10V R1 0.02 5% C1 470nF 25V R2 10 5% * DIODES INC. SMAT70A THESE COMPONENTS ARE APPLICATION SPECIFIC AND MUST BE SELECTED BASED UPON OPERATING CONDITIONS AND DESIRED PERFORMANCE. SEE APPLICATIONS INFORMATION. C3 0.1F 100V + 500s/DIV 4250 TA01b 2 Q1 IRF530 -48V INPUT 2 C2 15nF 100V C4 100F 100V ON/OFF 1 9 VOUT+ VIN+ 8 SENSE+ 7 TRIM 6 SENSE- 4 - 5 - VOUT VIN LUCENT JW050A1-E 5V + C5 100F 16V 4250 TA01a 4250lhfa 1 LT4250L/LT4250H ABSOLUTE MAXIMUM RATINGS (Note 1), All Voltages Referred to VEE Supply Voltage (VDD - VEE) ...................... -0.3V to 100V PWRGD, PWRGD Pins ............................. -0.3V to 100V SENSE, GATE Pins ..................................... -0.3V to 20V UV, OV Pins ................................................ -0.3V to 60V DRAIN Pin ................................................... -2V to 100V Maximum Junction Temperature........................... 125C Operating Temperature Range LT4250LC/LT4250HC ............................... 0C to 70C LT4250LI/LT4250HI.............................. -40C to 85C Storage Temperature Range................... -65C to 150C Lead Temperature (Soldering, 10 sec) .................. 300C PIN CONFIGURATION TOP VIEW TOP VIEW PWRGD 1 8 VDD OV 2 7 UV 3 6 VEE 4 5 PWRGD 1 8 VDD DRAIN OV 2 7 DRAIN GATE UV 3 6 GATE SENSE VEE 4 5 SENSE N8 PACKAGE 8-LEAD PDIP N8 PACKAGE S8 PACKAGE 8-LEAD PDIP 8-LEAD PLASTIC SO TJMAX = 125C, JA = 120C/W (N8) TJMAX = 125C, JA = 150C/W (S8) S8 PACKAGE 8-LEAD PLASTIC SO TJMAX = 125C, JA = 120C/W (N8) TJMAX = 125C, JA = 150C/W (S8) ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE LT4250LCN8#PBF LT4250LCN8#TRPBF 4250L 8-Lead PDIP 0C to 70C LT4250LCS8#PBF LT4250LCS8#TRPBF 4250L 8-Lead PLASTIC SO 0C to 70C LT4250LIN8#PBF LT4250LIN8#TRPBF 4250LI 8-Lead PDIP -40C to 85C LT4250LIS8#PBF LT4250LIS8#TRPBF 4250LI 8-Lead PLASTIC SO -40C to 85C LT4250HCN8#PBF LT4250HCN8#TRPBF 4250H 8-Lead PDIP 0C to 70C LT4250HCS8#PBF LT4250HCS8#TRPBF 4250H 8-Lead PLASTIC SO 0C to 70C LT4250HIN8#PBF LT4250HIN8#TRPBF 4250HI 8-Lead PDIP -40C to 85C LT4250HIS8#PBF LT4250HIS8#TRPBF 4250HI 8-Lead PLASTIC SO -40C to 85C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ 4250lhfa 2 LT4250L/LT4250H ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. (Note 2), VDD = 48V, VEE = 0V unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS DC VDD Supply Voltage Operating Range IDD Supply Current VUVL Undervoltage Lockout l UV = 3V, OV = VEE, SENSE = VEE 18 l 1.6 80 V 5 mA 15.4 V VCL Current Limit Trip Voltage VCL = (VSENSE - VEE) l 40 50 60 mV IPU GATE Pin Pull-Up Current Gate Drive On, VGATE = VEE l -30 -45 -60 A IPD GATE Pin Pull-Down Current Gate Drive OFF 24 50 70 mA ISENSE SENSE Pin Current VSENSE = 50mV VGATE External Gate Drive (VGATE - VEE), 18V VDD 80V l VUVH UV Pin High Threshold Voltage UV Increasing VUVL UV Pin Low Threshold Voltage UV Decreasing VUVHY UV Pin Hysteresis IINUV UV Pin Input Current VUV = VEE l VOVH OV Pin High Threshold Voltage OV Increasing l OV Decreasing l -20 A 10 13.5 18 l 1.24 1.255 1.27 V l 1.105 1.125 1.145 V 130 VOVL OV Pin Low Threshold Voltage VOVHY OV Pin Hysteresis IINOV OV Pin Input Current VOV = VEE VDL DRAIN Low Threshold VDRAIN - VEE, DRAIN Decreasing VGH GATE High Threshold VGATE - VGATE Decreasing IDRAIN Drain Input Bias Current VDRAIN = 48V l VOL PWRGD Output Low Voltage PWRGD (LT4250L), (VDRAIN - VEE) < VDL IOUT = 1mA IOUT = 5mA PWRGD Output Low Voltage (PWRGD - DRAIN) V mV -0.02 -0.5 A 1.235 1.255 1.275 V 1.21 1.235 1.255 20 l 1.1 -0.03 -0.5 A 1.6 2.3 V 1.3 V 80 500 A l l 0.48 1.2 0.8 3 V V PWRGD (LT4250H), VDRAIN = 5V IOUT = 1mA l 0.75 1 V Output Leakage PWRGD (LT4250L), VDRAIN = 48V, VPWRGD = 80V PWRGD (LT4250H), VDRAIN = 0V, VPWRGD = 80V l l 0.05 0.05 10 10 A A tPHLOV OV High to GATE Low Figures 1a, 2 1.7 s tPHLUV UV Low to GATE Low Figures 1a, 3 1.5 s tPLHOV OV Low to GATE High Figures 1a, 2 5.5 s tPLHUV UV High to GATE High Figures 1a, 3 6.5 tPHLSENSE SENSE High to Gate Low Figures 1a, 4a 1 tPHLCB Current Limit to GATE Low Figures 1b, 4b 500 s tPHLDL DRAIN Low to PWRGD Low (LT4250L) Figures 1a, 5a DRAIN Low to (PWRGD - DRAIN) High (LT4250H) Figures 1a, 5a 1 1 s s tPHLGH GATE High to PWRGD Low (LT4250L) Figures 1a, 5b GATE High to (PWRGD - DRAIN) High (LT4250H) Figures 1a, 5b 1.5 1.5 s s IOH 10 V mV AC Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. s 3 s Note 2: All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to VEE unless otherwise specified. 4250lhfa 3 LT4250L/LT4250H TYPICAL PERFORMANCE CHARACTERISTICS Supply Current vs Supply Voltage Supply Current vs Temperature 1.8 VDD = 48V 1.5 1.4 1.3 1.2 13 GATE VOLTAGE (V) 1.6 1.4 1.3 1.2 11 10 9 8 7 20 0 40 80 60 SUPPLY VOLTAGE (V) 1.0 -50 100 -25 0 25 50 TEMPERATURE (C) 75 6 100 0 15.0 55 48 54 47 13.0 12.5 GATE PULL-UP CURRENT (A) TRIP VOLTAGE (mV) 14.5 53 52 51 50 49 12.0 -50 -25 25 50 0 TEMPERATURE (C) 75 -25 50 0 25 TEMPERATURE (C) 75 55 43 42 49 46 43 75 100 4250 G07 -25 0 25 50 TEMPERATURE (C) 75 PWRGD Output Impedance vs Temperature (LT4250H) 8 VDRAIN - VEE > 2.4V IOUT = 1mA 7 0.4 0.3 0.2 0.1 0 -50 100 4250 G06 OUTPUT IMPEDANCE (k) PWRGD OUTPUT LOW VOLTAGE (V) 52 0 50 25 TEMPERATURE (C) 44 40 -50 100 0.5 -25 45 PWRGD Output Low Voltage vs Temperature (LT4250L) Gate Pull-Down Current vs Temperature 40 -50 46 4250 G05 4250 G04 VGATE = 2V VGATE = 0V 41 48 -50 100 100 Gate Pull-Up Current vs Temperature VDD = 48V 13.5 80 60 40 SUPPLY VOLTAGE (V) 4250 G03 Current Limit Trip Voltage vs Temperature Gate Voltage vs Temperature 14.0 20 4250 G02 4250 G01 GATE VOLTAGE (V) 12 1.1 1.1 GATE PULL-DOWN CURRENT (mA) TA = 25C 14 1.5 SUPPLY CURRENT (mA) SUPPLY CURRENT (mA) 15 TA = 25C 1.7 0 Gate Voltage vs Supply Voltage 1.6 6 5 4 3 -25 25 50 0 TEMPERATURE (C) 75 100 4250 G08 2 -50 -25 0 25 50 TEMPERATURE (C) 75 100 4250 G09 4250lhfa 4 LT4250L/LT4250H PIN FUNCTIONS PWRGD/PWRGD (Pin 1): Power Good Output Pin. This pin will latch a power good indication when VDRAIN is within VDL of VEE and VGATE is within VGH of VGATE. This pin can be connected directly to the enable pin of a power module. When the DRAIN pin of the LT4250L is above VEE by more than VDL or VGATE is more than VGH from VGATE, the PWRGD pin will be high impedance, allowing the pull-up current of the module's enable pin to pull the pin high and turn the module off. When VDRAIN drops below VDL and VGATE rises above VGH, the PWRGD pin sinks current to VEE, pulling the enable pin low and turning on the module. This condition is latched until the GATE pin is turned off via the UV, OV, UVLO or the electronic circuit breaker. When the DRAIN pin of the LT4250H is above VEE by more than VDL or VGATE is more than VGH from VGATE, the PWRGD pin will sink current to the DRAIN pin which pulls the module's enable pin low, forcing it off. When VDRAIN drops below VDL and VGATE rises above VGH, the PWRGD sink current is turned off, allowing the module's pull-up current to pull the enable pin high and turn on the module. This condition is latched until the GATE pin is turned off via the UV, OV, UVLO or the electronic circuit breaker. OV (Pin 2): Analog Overvoltage Input. When OV is pulled above the 1.255V threshold, an overvoltage condition is detected and the GATE pin will be immediately pulled low. The GATE pin will remain low until OV drops below the 1.235V threshold. UV (Pin 3): Analog Undervoltage Input. When UV is pulled below the 1.125V threshold, an undervoltage condition is detected and the GATE pin will be immediately pulled low. The GATE pin will remain low until UV rises above the 1.255 threshold. The UV pin is also used to reset the electronic circuit breaker. If the UV pin is cycled low and high following the trip of the circuit breaker, the circuit breaker is reset and a normal power-up sequence will occur. The response time for this pin is 1.5s. Add an external capacitor to this pin for additional filtering. VEE (Pin 4): Negative Supply Voltage Input. Connect to the lower potential of the power supply. SENSE (Pin 5): Circuit Breaker Sense Pin. With a sense resistor placed in the supply path between VEE and SENSE, the overcurrent condition will pull down the GATE pin and regulate the voltage across the resistor to be 50mV. If the overcurrent condition exists for more than 500s the electronic circuit breaker will trip and turnoff the external MOSFET. If the current limit value is set to twice the normal operating current, only 25mV is dropped across the sense resistor during normal operation. To disable the current limit feature, VEE and SENSE can be shorted together. GATE (Pin 6): Gate Drive Output for the External N-channel MOSFET. The GATE pin will go high when the following start-up conditions are met: the UV pin is high, the OV pin is low, (VSENSE - VEE) < 50mV and the VDD pin is greater than VUVLOH. The GATE pin is pulled high by a 45A current source and pulled low with a 50mA current source. During current limit the GATE pin is pulled low using a 100mA current source. DRAIN (Pin 7): Analog Drain Sense Input. Connect this pin to the drain of the external N-channel MOSFET and the V- pin of the power module. When the DRAIN pin is below VDL, the PWRGD/PWRGD pin will latch to indicate the switch is on. VDD (Pin 8): Positive Supply Voltage Input. Connect this pin to the higher potential of the power supply inputs and the V+ pin of the power module. An undervoltage lockout circuit disables the chip until the VDD pin is greater than the 16V VUVLOH threshold. 4250lhfa 5 LT4250L/LT4250H BLOCK DIAGRAM VDD - UV UVLO + VCC AND REFERENCE GENERATOR VCC REF OUTPUT DRIVE REF - OV + PWRGD/PWRGD LOGIC 50mV -+ - + 500s DELAY GATE DRIVER + + - - VDL VEE + - +- VGH VGATE 4250 BD VEE SENSE GATE DRAIN 4250lhfa 6 LT4250L/LT4250H TEST CIRCUIT R 5k V+ 5V PWRGD/PWRGD OV VOV VDD + - DRAIN UV OV VDRAIN LT4250L/LT4250H + - DRAIN 20V 48V LT4250L/LT4250H 10k 10 GATE UV VUV VEE + - PWRGD/PWRGD VDD 48V 0.1F VUV SENSE IRF530 GATE VEE SENSE VSENSE 10 4250 F01a 4250 F01b Figure 1a. Test Circuit 1 Figure 1b. Test Circuit 2 TIMING DIAGRAM 2V 1.255V OV 2V 1.235V 1.125V UV 0V 1.255V 0V tPHLOV GATE tPLHOV 1V 1V tPHLUV GATE tPLHUV 1V 4250 F02 Figure 2. OV to GATE Timing 1V 4250 F03 Figure 3. UV to GATE Timing 100mV 60mV SENSE UV VEE tPHLCB tPHLSENSE GATE GATE 1V 1V 1V 4250 F04b 4250 F04a Figure 4a. SENSE to GATE Timing Figure 4b. Active Current Limit Timeout 1.4V DRAIN VGATE - VGATE = 0 1.4V GATE VEE tPHLDL tPHLGH PWRGD PWRGD 1V 1V VEE VEE 1.4V DRAIN VGATE - VGATE = 0 GATE 1.4V VEE tPHLDL PWRGD VPWRGD - VDRAIN = 0V tPHLGH PWRGD 1V 4250 F05a Figure 5a. DRAIN to PWRGD/PWRGD Timing VPWRGD - VDRAIN = 0 1V 4250 F05b Figure 5b. GATE to PWRGD/PWRGD Timing 4250lhfa 7 LT4250L/LT4250H APPLICATIONS INFORMATION where CL is the total load capacitance = C3 + C4 + module input capacitance. Hot Circuit Insertion When circuit boards are inserted into a live -48V backplane, the bypass capacitors at the input of the board's power module or switching power supply can draw huge transient currents as they charge up. The transient currents can cause permanent damage to the board's components and cause glitches on the system power supply. Capacitor C1 and resistor R3 prevent Q1 from momentarily turning on when the power pins first make contact. Without C1 and R3, capacitor C2 would pull the gate of Q1 up to a voltage roughly equal to VEE * C2/CGS(Q1) before the LT4250 could power up and actively pull the gate low. By placing capacitor C1 in parallel with the gate capacitance of Q1 and isolating them from C2 using resistor R3 the problem is solved. The value of C1 is given by: The LT4250 is designed to turn on a board's supply voltage in a controlled manner, allowing the board to be safely inserted or removed from a live backplane. The chip also provides undervoltage, overvoltage and overcurrent protection while keeping the power module off until its input voltage is stable and within tolerance. V V C1= INMAX TH * (C2+CGD ) VTH C1 35 * C2 for VINMAX = 72V Power Supply Ramping where VTH is the MOSFET's minimum gate threshold and VINMAX is the maximum operating input voltage. The input to the power module on a board is controlled by placing an external N-channel pass transistor (Q1) in the power path (Figure 6a). R1 provides current fault detection and R2 prevents high frequency oscillations. Resistors R4, R5 and R6 provide undervoltage and over-voltage sensing. By ramping the gate of Q1 up at a slow rate, the inrush current charging load capacitors C3 and C4 can be limited to a safe value when the board makes connection. R3 should not exceed a value that produces an R3 * C2 time-constant of 150s. A 1k value for R3 will ensure this for C2 values up to 150nF. The waveforms are shown in Figure 6b. When the power pins make contact, they bounce several times. While the contacts are bouncing, the LT4250 senses an undervoltage condition and the GATE is immediately pulled low when the power pins are disconnected. Resistor R3 and capacitor C2 act as a feedback network to accurately control the inrush current. The C2 capacitor can be calculated with the following equation: Once the power pins stop bouncing, the GATE pin starts to ramp up. When Q1 turns on, the GATE voltage is held constant by the feedback network of R3 and C2. When the C2 = (45A * CL)/IINRUSH -48V RTN (SHORT PIN) -48V RTN R4 549k 1% UV = 38.5V OV = 71V R5 6.49k 1% R6 10k 1% C3 0.1F 100V 8 VDD 3 UV LT4250H 2 PWRGD 1 VICOR VI-J30-CY C4 + 100F 100V SENSE 5 4 * R1 0.02 5% 3 GATE 6 GATE IN C1 470nF 25V VIN- VOUT- DRAIN R3 1k, 5% R2 10 5% 4 7 1 * DIODES INC. SMAT70A 2 5V + C5 100F 16V DRAIN 50V/DIV VEE 50V/DIV CONTACT BOUNCE BOUNCE 25ms/DIV 4250 F06b C2 15nF 100V 4250 F06a -48V GATE -VEE 10V/DIV VIN+ VOUT+ OV VEE MODULE TURN-ON MODULE TURN-ON INRUSH CURRENT 500mA/DIV Figure 6b. Inrush Control Waveforms Q1 IRF530 Figure 6a. Inrush Control Circuitry 4250lhfa 8 LT4250L/LT4250H APPLICATIONS INFORMATION DRAIN voltage has finished ramping, the GATE pin then ramps to its final value. Current Limit/Electronic Circuit Breaker The LT4250 features a current limit function that protects against short circuits or excessive supply currents. If the current limit is active for more than 500s the electronic circuit breaker will trip. By placing a sense resistor between the VEE and SENSE pin, the current limit will be activated whenever the voltage across the sense resistor is greater than 50mV. Note that the current limit threshold should be set sufficiently high to account for the sum of the load current and the inrush current. The maximum value of the inrush current is given by: 40mV IINRUSH 0.8 * - ILOAD, RSENSE where the 0.8 factor is used as a worst case margin combined with the minimum trip voltage (40mV). In the case of a short circuit, the current limit circuitry activates and immediately pulls the GATE low, servos the SENSE voltage to 50mV, and starts a 500s timer. The MOSFET current is limited to 50mV/RSENSE (see Figure 7). If the short circuit persists for more than 500s, the circuit breaker trips and pulls the GATE pin low, shutting off the MOSFET. The circuit breaker is reset by pulling UV low, or by cycling power to the part. If the short circuit clears before the 500s timing interval the current limit will deactivate and release the GATE. DRAIN 50V/DIV GATE 10V/DIV The LT4250 guards against voltage steps on the input supply. A positive voltage step (increasing in magnitude) on the input supply causes an inrush current that is proportional to the voltage slew rate I = CL * V/T. If the inrush exceeds 50mV/RSENSE, the current limit will activate as shown in Figure 8. The GATE pin pulls low, limiting the current to 50mV/RSENSE. At this level the MOSFET drain will not follow the source as the input voltage rapidly changes, but instead remains at the voltage stored on the load capacitance. The load capacitance begins to charge at a current of 50mV/RSENSE, but not for long. As the load capacitance charges, C2 pushes back on the gate and limits the MOSFET current in a manner identical to the initial startup condition which is less than the short circuit limiting value of 50mV/RSENSE. Thus the circuit breaker does not trip. To ensure correct operation under input voltage step conditions, RSENSE must be chosen to provide a current limit value greater than the sum of the load current and the dynamic current in the load capacitance. For C2 values less than 10nF a positive voltage step increasing in magnitude on the input supply can result in the Q1 turning off momentarily due to current limit overshoot which can shut down the output. By adding an additional resistor and diode, Q1 remains on during the voltage step. This is shown as D1 and R7 in Figure 9. The purpose of D1 is to shunt current around R7 when the power pins first make contact and allow C1 to hold the GATE low. The value of R7 should be sized to generate an R7 * C1 time constant of 33s. Under some conditions, a short circuit at the output can cause the input supply to dip below the UV threshold. The LT4250 turns off once and then turns on until the electronic circuit breaker is tripped. This can be minimized by adding a deglitching delay to the UV pin with a capacitor from UV to VEE. This capacitor forms an RC time constant with the resistors at UV, allowing the input supply to recover before the UV pin resets the circuit breaker. ID (Q1) 5A/DIV 1ms/DIV Figure 7. Short-Circuit Protection Waveforms 4250lhfa 9 LT4250L/LT4250H APPLICATIONS INFORMATION A circuit that automatically resets the circuit breaker after a current fault is shown in Figure 10. Transistors Q2 and Q3 along with R7, R8, C4 and D1 form a programmable one-shot circuit. Before a short occurs, the GATE pin is pulled high and Q3 is turned on, pulling node 2 to VEE. Resistor R8 turns off Q2. When a short occurs, the GATE pin is pulled low and Q3 turns off. Node 2 starts to charge C4 and Q2 turns on, pulling the UV pin low and resetting the circuit breaker. As soon as C4 is fully charged, R8 turns off Q2, UV goes high and the GATE starts to ramp up. Q3 turns back on and quickly pulls node 2 back to VEE. Diode D1 clamps node 3 one diode drop below VEE. The duty cycle is set to 10% to prevent Q1 from overheating. -48V RTN (SHORT PIN) -48V RTN 8 R4 549k 1% VEE AND DRAIN 20V/DIV R5 6.49k 1% ID (Q1) 5A/DIV C3 0.1F 100V VDD 3 UV LT4250H 2 PWRGD + OV R6 10k 1% SENSE VEE GATE 5 4 6 4250 08 500s/DIV R7 220 5% * Figure 8. Voltage Step on Input Supply Waveforms R1 0.02 5% 3 -48V 1 1 DRAIN R3 1k 5% R2 10 5% D1 BAT85 C4 22F 100V 7 C2 3.3nF 100V C1 150nF 25V 4 2 Q1 IRF530 * DIODES INC. SMAT70A 4250 F09 Figure 9. Circuit for Input Steps with Small C2 (<10nF) -48V RTN (SHORT PIN) -48V RTN R7 1M 5% R6 549k 1% 2 R4 549k 1% C4 1F 100V Q2 2N2222 8 VDD 3 UV R9 10k 1% 3 R5 16.5k 1% OV VEE D1 1N4148 R8 510k 5% 5 1 * DIODES INC. SMAT70A 6 DRAIN 4 2 Q1 IRF530 1 + C3 100F 100V 7 R3 1k, 5% R2 10 5% C1 470nF 25V R1 0.02 5% 3 -48V GATE SENSE 4 Q3 ZVN3310 * PWRGD LT4250L 2 C2 15nF 100V 4250 F10a NODE 2 50V/DIV GATE 2V/DIV 1s/DIV 4250 F10 Figure 10. Automatic Restart After Current Fault 4250lhfa 10 LT4250L/LT4250H APPLICATIONS INFORMATION Undervoltage and Overvoltage Detection The UV (Pin 3) and OV (Pin 2) pins can be used to detect undervoltage and overvoltage conditions at the power supply input. The UV and OV pins are internally connected to analog comparators with 130mV and 20mV of hysteresis respectively. When the UV pin falls below its threshold or the OV pin rises above its threshold, the GATE pin is immediately pulled low. The GATE pin will be held low until UV is high and OV is low. The undervoltage and overvoltage trip voltages can be programmed using a three resistor divider as shown in Figure 11. With R4 = 549k, R5 = 6.49k and R6 = 10K, the undervoltage threshold is set to 38.5V (with a 43V release from undervoltage) and the overvoltage threshold is set to 71V. The resistor divider will also gain up the hysteresis at the UV pin and OV pin to 4.5V and 1.2V at the input respectively. PWRGD/PWRGD Output The PWRGD/PWRGD output can be used to directly enable a power module when the input voltage to the module is within tolerance. The LT4250L has a PWRGD output for modules with an active low enable input, and the LT4250H has a PWRGD output for modules with an active high enable input. When the DRAIN voltage of the LT4250H is high with respect to VEE (Figure 12) or the GATE voltage is low, the internal transistor Q3 is turned off and I1 and Q2 clamp the PWRGD pin one SAT drop (0.3V) above the DRAIN pin.Transistor Q2 sinks the module's pull-up current and the module turns off. When the DRAIN voltage drops below VDL and the GATE voltage is high, Q3 will turn on, shorting the bottom of I1 to DRAIN and turning Q2 off. The pull-up current in the module pulls the PWRGD pin high and enables the module. When the DRAIN voltage of the LT4250L is high with respect to VEE or the GATE voltage is low, the internal pull-down transistor Q2 is off and the PWRGD pin is in a high impedance state (Figure 13). The PWRGD pin will be pulled high by the module's internal pull-up current source, turning the module off. When the DRAIN voltage drops below VDL and the GATE voltage is high, Q2 will turn on and the PWRGD pin will pull low, enabling the module. The PWRGD signal can also be used to turn on an LED oroptoisolator to indicate that the power is good as shown in Figure 14. Gate Pin Voltage Regulation When the supply voltage to the chip is more than 18V, the GATE pin voltage is regulated at 13.5V above VEE. The gate voltage will be no greater than 18V for supply voltages up to 80V. ACTIVE HIGH ENABLE MODULE -48V RTN (SHORT PIN) -48V RTN (SHORT PIN) VIN+ VOUT+ -48V RTN -48V RTN 8 8 R4 ( ( R4 + R5+ R6 VUV = 1.255 R5 + R6 VOV = 1.255 R4 + R5+ R6 R6 ) ) 3 2 R6 -48V 3 UV LT4250L/LT4250H R5 GATE UV R5 2 OV VEE R6 OV - VGH + + - VGATE 4 VDD LT4250H R4 VDD + Q2 - Q3 VEE DRAIN 7 SENSE GATE 5 6 C1 3 -48V VIN- VOUT- VEE - * Figure 11. Undervoltage and Overvoltage Sensing ON/OFF C3 + VDL 4 4250 F11 PWRGD 1 I1 + R2 R3 C2 4 R1 4250 F12 * DIODES INC. SMAT70A 1 2 Q1 Figure 12. Active High Enable Module 4250lhfa 11 LT4250L/LT4250H APPLICATIONS INFORMATION ACTIVE LOW ENABLE MODULE -48V RTN (SHORT PIN) VIN+ VOUT+ -48V RTN 8 VDD LT4250L R4 3 UV 2 OV R6 - VGH + + - VGATE + VDL VEE C3 7 GATE SENSE 5 6 C1 R2 R3 C2 4 R1 1 ON/OFF VIN- VOUT- DRAIN * 3 Q2 VEE - 4 -48V * DIODES INC. SMAT70A 1 + - R5 PWRGD + GATE 2 4250 F13 Q1 Figure 13. Active Low Enable Module -48V RTN (SHORT PIN) PWRGD -48V RTN R4 549k 1% R5 6.49k 1% R6 10k 1% 3 UV PWRGD LT4250L 2 OV VEE SENSE 3 GATE 5 4 R1 0.02 5% 1 * DIODES INC. SMAT70A R2 10 5% 4 2 1 MOC207 DRAIN 6 C1 470nF 25V * -48V R7 51k 5% 8 VDD R3 1k, 5% 7 C3 + 100F 100V C2 15nF 100V Q1 IRF530 4250 F14 Figure 14. Using PWRGD to Drive an Optoisolator 4250lhfa 12 LT4250L/LT4250H PACKAGE DESCRIPTION N8 Package 8-Lead PDIP (Narrow .300 Inch) (Reference LTC DWG # 05-08-1510) .300 - .325 (7.620 - 8.255) .065 (1.651) TYP +.035 .325 -.015 ( .130 .005 (3.302 0.127) .045 - .065 (1.143 - 1.651) .008 - .015 (0.203 - 0.381) +0.889 8.255 -0.381 .400* (10.160) MAX 7 6 5 1 2 3 4 .255 .015* (6.477 0.381) .120 (3.048) .020 MIN (0.508) MIN .018 .003 .100 (2.54) BSC ) 8 (0.457 0.076) N8 1002 NOTE: 1. DIMENSIONS ARE INCHES MILLIMETERS *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm) S8 Package 8-Lead Plastic Small Outline (Narrow .150 Inch) (Reference LTC DWG # 05-08-1610) .189 - .197 (4.801 - 5.004) NOTE 3 .045 .005 .050 BSC 8 .245 MIN 7 6 5 .160 .005 .150 - .157 (3.810 - 3.988) NOTE 3 .228 - .244 (5.791 - 6.197) .030 .005 TYP 1 RECOMMENDED SOLDER PAD LAYOUT .010 - .020 x 45 (0.254 - 0.508) .008 - .010 (0.203 - 0.254) 3 4 .053 - .069 (1.346 - 1.752) .004 - .010 (0.101 - 0.254) 0- 8 TYP .016 - .050 (0.406 - 1.270) NOTE: 1. DIMENSIONS IN 2 .014 - .019 (0.355 - 0.483) TYP INCHES (MILLIMETERS) 2. DRAWING NOT TO SCALE 3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm) .050 (1.270) BSC SO8 0303 4250lhfa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 13 LT4250L/LT4250H TYPICAL APPLICATION application using the Lucent FLTR100V10 filter module is shown in Figure 15. When using a filter, an optoisolator is required to prevent common mode transients from destroying the PWRGD and ON/OFF pins. Using an EMI Filter Module Many applications place an EMI filter module in the powerpath to prevent switching noise of the module from being injected back onto the power supply. A typical -48V RTN (SHORT PIN) -48V RTN R7 51k 5% 8 VDD R4 549k 1% R5 6.49k 1% PWRGD 3 DRAIN UV 1 7 LT4250L 2 R6 10k 1% OV GATE VIN+ C2 15nF 100V 5 4 R1 0.02 5% * 3 1 C3 0.1F 100V R3 1k 5% SENSE VEE -48V 6 LUCENT JW050A1-E MOC207 C1 470nF 25V R2 10 5% - 2 VOUT+ LUCENT FLTR100V10 VIN 1N4003 1 VOUT C4 0.1F 100V + C5 100F 100V - C6 0.1F 100V 4 VIN+ 9 VOUT+ ON/OFF 7 TRIM CASE + C7 100F 16V 6 SENSE- 5 VOUT- VIN- 5V 8 SENSE+ CASE 3 4250 F15 4 2 Q1 IRF530 * DIODES INC. SMAT70A Figure 15. Typical Application Using a Filter Module RELATED PARTS PART NUMBER (R) DESCRIPTION COMMENTS LTC 1421 Dual Hot Swap Controller with Additional -12V Control Operates from 3V to 12V LTC1422 Hot Swap Controller in SO-8 System Reset Output With Programmable Delay LT1640AH/LT1640AL -48V Hot Swap Controller in SO-8 LT4250 is a Pin-Compatible Upgrade to LT1640 LT1641-1/LT1641-2 48V Hot Swap Controller in SO-8 Foldback Current Limit, 9V to 80V, Auto-Retry/Latch-Off LTC1642 Fault Protected Hot Swap Controller Operates Up to 16.5V, Protected to 33V LTC1643 PCI Hot Swap Controller 3.3V, 5V, 12V, -12V Supplies for PCI Bus LTC1645 Dual Hot Swap Controller Operates from 1.2V to 12V, Power Sequencing LTC1646 Dual CompactPCI Hot Swap Controller 3.3V, 5V Supplies With Precharge and Local PCI Reset Logic LTC1647 Dual Hot Swap Controller Dual ON Pins for Supplies from 3V to 15V LTC4211 Hot Swap Controller With Multifunction Current Control 2.5V to 16.5V Supplies, Active Inrush Current Limiting LTC4251 -48 Hot Swap Controller in SOT-23 Active Current Limiting, Fast Comparator for Catastrophic Faults LTC4252 -48 Hot Swap Controller in MSOP Active Current Limiting, Fast Comparator for Catastrophic Faults, Separate UV/0V Pins, Power-Good Output 4250lhfa 14 Linear Technology Corporation LT 0309 REV A * PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 FAX: (408) 434-0507 www.linear.com (c) LINEAR TECHNOLOGY CORPORATION 2001