AS1355 3 0 0 m A , Tri p l e L D O 1 General Description Accuracy: 1.0% The AS1355 is a high-performance triple CMOS low-dropout voltage regulator in a single QFN package. The efficient set of programmable power supplies is optimized to deliver the best compromise between quiescent current and regulator performance for mobile phones, PDAs, MP3 players, and other battery powered devices. PSRR: 70dB at 1kHz, 60dB at 100kHz Load Regulation: 3mV (0 to 300mA) Supply Range: 2.3V to 5.5V 0.1V Dropout Voltage @ Iload = 200mA Stability is guaranteed with ceramic output capacitors of only 1F (20% - X5R) up to 4.7F (20% - X5R). The low equivalent series resistance (ESR) of these capacitors ensures low output impedance at high frequencies. Shutdown Current: 1A Regulation performance is excellent even under low dropout conditions, when the power transistor has to operate in linear mode. Stable with low ESR Ceramic Capacitors from 1F to 4.7F The low-noise performance allows direct connection of noise sensitive circuits without additional filtering networks. Thermal Protection Supply Current Without Load: 160A Softstart for Low Inrush Current Low Noise: 40V rms @10Hz to 100kHz Bandwidth Over-Current Protection The AS1355 is available in a 16-pin QFN 3x3 package. Temperature Range: -40C to +85C Packages: 2 Key Features - 16-pin QFN 3x3 - 16-pin TQFN 3x3 3 Independent Voltage Regulators with Shutdown 3 Applications Output Current: 300mA each LDO Programmable Output Voltage Range: 1.25V to 3.6V in 50mV Steps The AS1355 is ideal for cordless and mobile phones, MP3 players, CD and DVD players, PDAs, hand-held computers, digital cameras, and any other hand-held battery-powered device. Figure 1. AS1355 - Typical Application Diagram +5V VDD1 3.3V VOUT1 1F VDD2 1F 1F VDD3 AS1355 1.5V VOUT3 1F REF VDDA CREF = 100nF (Improved Noise Performance) EN1 P 1.8V VOUT2 EN2 GND EN3 www.ams.com/LDOs/AS1355 Revision 1.3 1 - 12 AS1355 Datasheet - P i n A s s i g n m e n t s 4 Pin Assignments Figure 2. Pin Assignments (Top View) EN1 1 VDDA 2 VDD1 3 VDD2 4 EN2 EN3 NC REF 16 15 14 13 12 GND 11 GND AS1355 10 NC 17 5 6 7 VOUT1 VOUT2 VOUT3 9 VDD3 8 NC 4.1 Pin Descriptions Table 1. Pin Descriptions Pin Number Pin Name 1 EN1 Description 2 VDDA Analog Power Supply Voltage 3 VDD1 Unregulated Input Voltage 1 4 VDD2 Unregulated Input Voltage 2 5 VOUT1 Regulated Output Voltage 1 6 VOUT2 Regulated Output Voltage 2 7 VOUT3 Regulated Output Voltage 3 Active-High Enable Input 1. Pull this pin to GND to disable the regulated output voltage VOUT1. Not Connected 8 NC 9 VDD3 10 NC 11, 12 GND Ground. Note: All GND pins must be connected together externally. 13 REF Reference Voltage. Note: Connect to a 100nF capacitor during normal operation. 14 NC Not Connected 15 EN3 Active-High Enable Input 3. Pull this pin to GND to disable the regulated output voltage VOUT3. 16 EN2 Active-High Enable Input 2. Pull this pin to GND to disable the regulated output voltage VOUT2. 17 NC Exposed Pad. This pad is not connected internally, it can be connected to GND. www.ams.com/LDOs/AS1355 Unregulated Input Voltage 3 Not Connected Revision 1.3 2 - 12 AS1355 Datasheet - A b s o l u t e M a x i m u m R a t i n g s 5 Absolute Maximum Ratings Stresses beyond those listed in Table 2 may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 2. Absolute Maximum Ratings Parameter Min Max Units Comments Electrical Parameters VDDx, ENx to GND -0.3 7 V VOUTx to GND -0.3 5 V All other pins to GND -0.3 VDD + 0.3 V Electrostatic Discharge Electrostatic Discharge HBM 2 kV Norm: MIL 883 E method 3015 on PCB Temperature Ranges and Storage Conditions Thermal Resistance JA 33 C/W Junction Temperature +125 C +125 C Storage Temperature Range -55 Package Body Temperature Humidity non-condensing Moisture Sensitive Level www.ams.com/LDOs/AS1355 5 +260 C 85 % 3 The reflow peak soldering temperature (body temperature) specified is in accordance with IPC/ JEDEC J-STD-020"Moisture/Reflow Sensitivity Classification for Non-Hermetic Solid State Surface Mount Devices". Represents a max. floor life time of 168h Revision 1.3 3 - 12 AS1355 Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s 6 Electrical Characteristics VDD = 4V, COUT = 1F, typical values are for TAMB = 25C (unless otherwise specified); Table 3. Electrical Characteristics Symbol Parameter TAMB Operating Temperature Range VDD Max Unit -40 85 C Supply Voltage Range 2.3 5.5 V VOUT Output Voltage Range 1.25 3.6 V RON On Resistance PSRR 1 Power Supply Rejection Ratio f = 1kHz, CREF = 100nF 70 f = 100kHz, CREF = 100nF 60 IOFF Shut Down Current ENx = Low, TAMB = +25C IVDD Supply Current Without Load tset 1 Output Voltage Settling Time tstart 1 Start-up Time 2 VOUT Output Voltage Tolerance VLINEREG Line Regulation, Static VLOADREG 1 Load Regulation, Static VIH Enable Input Voltage High VIL Enable Input Voltage Low ILOAD Output Current ILIMIT Output Current Limitation VNoise Output Noise Voltage Conditions Min Typ 0.5 dB 1 A 240 A ILOAD Switched from 0 to 100mA 50 s CREF = 100nF Pre-charged 300 s 160 CREF = 0nF Uncharged 200 s CREF = 100nF Uncharged 15 ms ILOAD = 0mA, TAMB = 25C -1 1 % ILOAD = 0mA -2 2 % VOUT(NOM)+0.3V to 5.4V -1 1 % ILOAD = 0 to 50 mA 0.5 2.5 mV ILOAD = 0 to 300 mA 3 10 mV 1.5 V 0 10Hz to 100kHz, CREF = 100nF Thermal Protection 0.4 V 300 mA 450 mA 40 VRMS 150 C 1. Guaranteed by design and verified by lab evaluation. 2. Startup is performed if any EN pin goes high. Note: All limits are guaranteed. The parameters with min and max values are guaranteed with production tests or SQC (Statistical Quality Control) methods. www.ams.com/LDOs/AS1355 Revision 1.3 4 - 12 AS1355 Datasheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s 7 Typical Operating Characteristics VDD = 4V, VOUT = 3.3V, COUT = 1F, TAMB = +25C (unless otherwise specified); Figure 3. Load Regulation; VOUT vs. IOUT Figure 4. Line Regulation; VOUT vs. VIN 1.84 3.36 1.83 Output Voltage (V) 3.32 3.3 3.28 3.26 1.82 1.81 1.8 1.79 1.78 1.77 3.24 1.76 50 100 150 200 250 2 300 2.5 Output Current (mA) 4 4.5 5 5.5 75 90 Figure 6. Quiescent Current vs. Temperature 240 3.36 220 Quiescent Current (A) 3.34 Output Voltage (V) 3.5 Input Voltage (V) Figure 5. Output Voltage vs. Temp.; IOUT = 1mA 3.32 3.3 3.28 3.26 3.24 -45 -30 -15 3 200 180 160 140 120 100 0 15 30 45 60 75 80 -45 -30 -15 90 Temperature (C) 1V/Div VDD VOUT VDD VOUT 15 30 45 60 Figure 8. Startup; RLOAD = 11, no CREF 2V/Div Figure 7. Startup; no Load, no CREF 50s/Div www.ams.com/LDOs/AS1355 0 Temperature (C) 2V/Div 0 1V/Div Output Voltage (V) 3.34 50s/Div Revision 1.3 5 - 12 AS1355 Datasheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s 2ms/Div 2V/Div EN VOUT 20s/Div 10s/Div 20mV/Div IOUT = 300 to 100mA/Div VOUT IOUT Figure 14. Load Transient Response; 0mA 20mV/Div IOUT = 0 to 100mA/Div VOUT IOUT 1V/Div 2V/Div 1V/Div EN VOUT Figure 12. Startup; RLOAD = 11, CREF = 100nF (pre-charged) 20s/Div www.ams.com/LDOs/AS1355 2V/Div 2ms/Div Figure 11. Startup; no Load, CREF = 100nF (pre-charged) Figure 13. Load Transient Response; 300mA 1V/Div VOUT 2V/Div 1V/Div VOUT VDD Figure 10. Startup; RLOAD = 11, CREF = 100nF VDD Figure 9. Startup; no Load, CREF = 100nF 500s/Div Revision 1.3 6 - 12 AS1355 Datasheet - D e t a i l e d D e s c r i p t i o n 8 Detailed Description Figure 15. AS1355 - Block Diagram VDD1 VOUT1 Thermal Overcurrent Softstart VREF EN1 Control VDD2 VOUT2 Thermal Overcurrent Softstart VREF EN2 Control VDD3 VOUT3 Thermal Overcurrent Softstart VREF EN3 Control Reference Voltage VDDA AS1355 www.ams.com/LDOs/AS1355 Revision 1.3 REF GND 7 - 12 AS1355 Datasheet - Ty p i c a l A p p l i c a t i o n 9 Typical Application Figure 16. Typical Application +5V VDD1 VOUT1 3.3V 1F VDD2 VOUT2 1F 1.8V 1F 1.5V VOUT3 VDD3 1F REF VDDA CREF = 100nF (Improved Noise Performance) AS1355 EN1 EN2 GND Microprocessor EN3 www.ams.com/LDOs/AS1355 Revision 1.3 8 - 12 AS1355 Datasheet - P a c k a g e D r a w i n g s a n d M a r k i n g s 10 Package Drawings and Markings Figure 17. 16-pin QFN 3x3 Package Marking: YYWWIZZ. YY WW X ZZ last two digits of the current year manufacturing week plant identifier free choice / traceability code www.ams.com/LDOs/AS1355 Revision 1.3 9 - 12 AS1355 Datasheet - P a c k a g e D r a w i n g s a n d M a r k i n g s Figure 18. 16-pin TQFN 3x3 Package www.ams.com/LDOs/AS1355 Revision 1.3 10 - 12 AS1355 Datasheet - O r d e r i n g I n f o r m a t i o n 11 Ordering Information The devices are available as the standard products shown in Table 4. Table 4. Ordering Information Ordering Code Marking AS1355-BQFT-WGD ASSG Output Description Delivery Form Package 300mA, Triple LDO Tape and Reel 16-pin QFN 3x3 300mA, Triple LDO Tape and Reel 16-pin QFN 3x3 300mA, Triple LDO Tape and Reel 16-pin TQFN 3x3 300mA, Triple LDO Tape and Reel 16-pin QFN 3x3 VOUT1 = 3.3V VOUT2 = 1.8V VOUT3 = 1.5V VOUT1 = 3.3V AS1355-BQFT-WWW VOUT2 = 3.3V ASSV VOUT3 = 3.3V VOUT1 = 3.3V AS1355-BQFT-WWD2 VOUT2 = 3.3V ASTD VOUT3 = 1.5V VOUT1* AS1355-BQFT-xyz* ____ VOUT2* VOUT3* * These devices are available in factory-set output voltages from 1.25V to 3.6V in 100mV increments. Choose the desired VOUT suffix from Table 5 and insert it instead of "xyz" in the part number. On request also non-standard devices with output voltages between 1.25V and 3.6V in 50mV steps are available. Table 5. Output Voltage Suffix Guide Suffix Min Typ Max Suffix Min Typ Max Suffix Min Typ A 1.25 J 2.1 S 3.0 B 1.3 K 2.2 T 3.1 C 1.4 L 2.3 V 3.2 D 1.5 M 2.4 W 3.3 E 1.6 N 2.5 X 3.4 F 1.7 O 2.6 Y 3.5 G 1.8 P 2.7 Z 3.6 H 1.9 Q 2.8 2 thin QFN I 2.0 R 2.9 Max Note: All products are RoHS compliant and ams green. Buy our products or get free samples online at www.ams.com/ICdirect Technical Support is available at www.ams.com/Technical-Support For further information and requests, email us at sales@ams.com (or) find your local distributor at www.ams.com/distributor www.ams.com/LDOs/AS1355 Revision 1.3 11 - 12 AS1355 Datasheet - O r d e r i n g I n f o r m a t i o n Copyrights Copyright (c) 1997-2013, ams AG, Tobelbaderstrasse 30, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered (R). All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. 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