SFDMB3945F Specifications and Applications Information Smar or ce LED Smartt F For orce Driver 03/29/11 Package Configuration The ERG Smart Force Series of LED Drivers are specifically designed for applications which require high efficiency, small footprint and LCD brightness stability over a wide input voltage range. The SFDMB3945F is designed to provide backlight power for the NEC NL10276BC20-18 display. Less than 5 mm in height Wide input voltage range Constant LED current With external PWM dimming signal, up to 1000:1 dimming ratio Open and short circuit protection High efficiency Separate enable and dimming function Soft start One year warranty Input Connector Vin(+) Vin(+) GND GND Enable PWM N/C Fault Indicator (output) 1 Connectors Output Connector * Molex 53261-0871 J1-1 J1-2 J1-3 J1-4 J1-5 J1-6 J1-7 J1-8 .685 [17,40] Molex 53261-0471 J2-1 J2-2 J2-3 J2-4 .125 [3,18] Dia. (2x) 2.19 [55,6] 1.206 [30,63] .350 [8,89] 1 .135 [3,43] Input .96 [24,4] Cathode 1 Anode 1 Cathode 2 Anode 2 * Requires harness: ERG part number H11404152 recommended Output PCB components are shown for reference only. Actual product may differ from that shown. Designed, manufactured and supported within the USA, the SFDM features: Mass: 7 grams typ. page 1 of 5. SFDMB3945F Absolute Maximum R atings R ating Symbol Value U nits Input Voltage Range Vin -0.3 to +20.0 V dc Storage Temperature Tstg -40 to +85 Enable Input Voltage VEnable 0 to Vi n V dc PWM Input Voltage VPWM 0 to +5.0 V dc V FL 0 to +4.0 V dc Symbol Min Typ Max U nits V in +8.0 +12.0 +20.0 V dc Temperature (Note 1) Ts -40 - +80 Input C urrent I in 0.30 0.35 0.40 A dc V LE D 26.0 (Note 3) - 38.5 V dc h - 87 - % I out 57 60 63 mAdc Turn-on Threshold Vthon - - 3.5 V dc Turn-off Threshold Vthoff 0.8 - - V dc REnable - 9.0 - kOhms Turn-on Threshold Vthon - - 2.0 V dc Turn-off Threshold Vthoff 0.9 - - V dc PWM Input Impedance (Note 8) RPWM - 9.0 - kOhms Frequency (Notes 9, 10) FPWM 130 - 40,000 Hz Fault Indi cator o C Operating C haracteristics Unless otherwi se noted Vi n = 12.00 Volts dc and Ta = 25oC . C haracteristic Input Voltage C omponent Surface LED Stri ng Voltage (Note 2) Effi ci ency (Note 4) Output C urrent (per stri ng) o C Enable Pin (Note 5) Enable Input Impedance (Note 6) PWM Pin (Note 7) (Operating Characteristics and notes are continued on next page.) page 2 of 5. SFDMB3945F Operating Characteristics (continued) Characteristic Symbol Min Typ Max Units VNFL - 2.5 - V dc V FL Specifications subject to change without notice. - 0.3 - V dc Fault Indicator No Fault Level (Note 11) Fault Level (Note 11) Note 1 Note 2 Note 3 Surface temperature must not exceed 80C, except U1, which cannot exceed 95C. Exceeding maximum string voltage specification will damage the LED driver. The LED driver is capable of driving strings less than the minimum string voltage specification, although doing so will limit the maximum input voltage. To determine max Vin: minimum LED string voltage (1.3) x (Vin maximum) Note 4 Note 5 Note 6 Note 7 Note 8 Note 9 Note 10 Note 11 Efficiency is calculated using a 30.4V LED string. The Enable pin is internally pulled up above the turn-on threshold. Enable pin input impedance is 9k to 10V with a 12V input voltage. PWM pin is internally pulled up above the turn-on threshold. PWM pin input impedance is 9k to 4V with a 12V input voltage. Operating outside of this frequency range may cause the driver to shut down or malfunction. Minimum pulse width required for reliable operation is 5s. Loading with an impedance less than 100k to Vcc or to ground may cause the default levels to change. page 3 of 5. SFDMB3945F Application Information The ERG SFDMB3945F has been designed to be configured in multiple ways: NO DIMMING * OPERATION: The SFD can be configured to operate without dimming by floating the Enable (J1-5) and PWM (J1-6) pins. * Pins 1 and 2 of connector J1 must be connected to +Vin, between 8 and 20 Vdc. Pins 3 and 4 of connector J1 must be connected to GND. * DISABLING DRIVER: Pulling the Enable pin (J1-5) below the minimum turn-off threshold of 0.8V will disable the driver. Disabling the driver will require the ability to sink 2mA below the turn-off threshold. This pin may be driven by an open collector stage or a totem pole stage. EXTERNAL PWM DIMMING * * * * OPERATION: External PWM configuration as shown in Figure 1 allows the user to control display brightness with an externally generated PWM signal. The user is responsible to provide the PWM signal. A dimming ratio up to 1000:1 is possible with this configuration. The minimum pulse width is 5s. DIMMING: Dimming is accomplished by applying a PWM signal to the PWM pin (J1-6). PWM on and off levels are specified in the Operating Characteristics section of the data sheet. Display brightness is modulated by controlling the PWM duty cycle as shown in Graph 1. Pin 6 may be driven by an open collector stage capable of sinking >1mA, or a totem pole stage. Pins 1 and 2 of connector J1 must be connected to +Vin, between 8 and 20 Vdc. Pins 3 and 4 of connector J1 must be connected to GND. Pin 5 must either be floating or above the full on threshold if being driven by a totem pole stage. DISABLING DRIVER: Pulling the Enable pin (J1-5) below the minimum turn-off threshold of 0.8V will disable the driver. Disabling the driver will require the ability to sink 2mA below the turn-off threshold. This pin may be driven by an open collector stage or a totem pole stage. FAULT INDICATOR * The Fault Indicator pin (J1-8) may be used as a feedback signal that will fall below the fault level of 0.3V in the case of an open string, a shorted string, an output overvoltage condition, or an over temperature condition. If used, this pin should be loaded with a high impedance stage as specified in the Operating Characteristics. Do not drive this pin with a voltage, as it will damage the driver. page 4 of 5. SFDMB3945F EXTERNAL PWM DIMMING Graph 1 J1 +12V J2 1,2 + (1) 3,4 Vin Anode 1 GND ON OFF 5 Cathode 1 Enable Duty Cycle 0%-100% 5V 6 0V PWM Anode 2 Cathode 2 (output) 8 Fault Figure 1 search Gr Re R 13 M (R) c. RE UL p, In ou Endi co tt (1) Low ESR type input by-pass capacitor (10 uF - 220 uF) may be required to reduce reflected ripple and to improve power supply response. IS G I I O S TE RE D F 3 900 A3 1 Endicott Research Group, Inc. (ERG) reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by ERG is believed to be accurate and reliable. However, no responsibility is assumed by ERG for its use. page 5 of 5.