Connectors
03/29/11
Specifications and
Applications Information
page 1 of 5.
The ERG Smart Force SeriesSmart Force Series
Smart Force SeriesSmart Force Series
Smart Force Series of LED Drivers are specifically
designed for applications which require high efficiency, small
footprint and LCD brightness stability over a wide input voltage
range. The SFDMB3945F is designed to provide backlight
power for the NEC NL10276BC20-18 display.
Designed, manufactured and supported within the USA, the
SFDM features:
Less than 5 mm in height
Wide input voltage range
Constant LED current
With external PWM dimming signal, up to 1000:1
dimming ratio
Open and short circuit protection
High efficiency
Separate enable and dimming function
Soft start
One year warranty
J1-1 Vin(+)
J1-2 Vin(+)
J1-3 GND
J1-4 GND
J1-5 Enable
J1-6 PWM
J1-7 N/C
J1-8 Fault Indicator
(output)
J2-1 Cathode 1
J2-2 Anode 1
J2-3 Cathode 2
J2-4 Anode 2
Output Connector *
Molex
53261-0471
SmarSmar
SmarSmar
Smart Ft F
t Ft F
t Foror
oror
orce LEDce LED
ce LEDce LED
ce LED
DriverDriver
DriverDriver
Driver
Input Connector
Molex
53261-0871
Package Configuration
PCB components are shown for reference only. Actual product may differ from that shown.
Mass: 7 grams typ.
SFDMB3945F
1Output
.125
[3,18]
Dia. (2x)
1.206
[30,63]
.350
[8,89]
.135
[3,43] Input
.96
[24,4]
2.19
[55,6]
.685
[17,40]
1
* Requires harness:
ERG part number H11404152 recommended
page 2 of 5.
(Operating Characteristics and notes are continued on next page.)
SFDMB3945F
sgnitaRmumixaMetulosbA
gnitaRlobmySeulaVstinU
egnaRegatloVtupnI V
ni
0.02+ot3.0-cdV
erutarepmeTegarotS T
gts
58+ot04-
o
C
egatloVtupnIelbanE V
elbanE
niVot0cdV
egatloVtupnIMWP V
MWP
0.5+ot0cdV
rotacidnItluaF V
LF
0.4+ot0cdV
scitsiretcarahCgnitarepO
52=aTdnacdstloV00.21=niVdetonesiwrehtosselnU
o
.C
citsiretcarahClobmySniMpyTxaMstinU
egatloVtupnI V
ni
0.8+0.21+0.02+cdV
ecafruStnenopmoC
erutarepmeT
)1etoN(
T
s
04--08+
o
C
tnerruCtupnI I
ni
03.053.004.0cdA
egatloVgnirtSDEL
)2etoN(
V
DEL
0.62
)3etoN(
-5.83cdV
ycneiciffE
)4etoN(
hh
h
hh -78-%
)gnirtsrep(tnerruCtuptuOI
tuo
750636cdAm
niPelbanE
)5etoN(
dlohserhTno-nruT V
noht
-- 5.3cdV
dlohserhTffo-nruT V
ffoht
8.0-- cdV
ecnadepmItupnIelbanE
)6etoN(
R
elbanE
-0.9- smhOk
niPMWP
)7etoN(
dlohserhTno-nruT V
noht
-- 0.2cdV
dlohserhTffo-nruT V
ffoht
9.0-- cdV
ecnadepmItupnIMWP
)8etoN(
R
MWP
-0.9- smhOk
ycneuqerF
)01,9setoN(
F
MWP
031- 000,04zH
page 3 of 5.
SFDMB3945F
Note 1 Surface temperature must not exceed 80°C, except U1, which cannot exceed 95°C.
Note 2 Exceeding maximum string voltage specification will damage the LED driver.
Note 3 The LED driver is capable of driving strings less than the minimum string voltage specification,
although doing so will limit the maximum input voltage.
To determine max Vin:
minimum LED string voltage
≥≥
≥≥
≥
(1.3) x (Vin maximum)
Note 4 Efficiency is calculated using a 30.4V LED string.
Note 5 The Enable pin is internally pulled up above the turn-on threshold.
Note 6 Enable pin input impedance is 9kΩ to 10V with a 12V input voltage.
Note 7 PWM pin is internally pulled up above the turn-on threshold.
Note 8 PWM pin input impedance is 9kΩ to 4V with a 12V input voltage.
Note 9 Operating outside of this frequency range may cause the driver to shut down or malfunction.
Note 10 Minimum pulse width required for reliable operation is 5μs.
Note 11 Loading with an impedance less than 100kΩ to Vcc or to ground may cause the default levels to change.
Specifications subject to change without notice.
scitsiretcarahCgnitarepO )deunitnoc(
citsiretcarahClobmySniMpyTxaMstinU
rotacidnItluaF
leveLtluaFoN
)11etoN(
V
LFN
-5.2- cdV
leveLtluaF
)11etoN(
V
LF
-3.0- cdV
page 4 of 5.
SFDMB3945F
Application Information
The ERG SFDMB3945F has been designed to be configured in multiple ways:
NO DIMMING
•OPERATION: The SFD can be configured to operate without dimming by floating the Enable (J1-5) and
PWM (J1-6) pins.
•Pins 1 and 2 of connector J1 must be connected to +Vin, between 8 and 20 Vdc. Pins 3 and 4 of connector
J1 must be connected to GND.
•DISABLING DRIVER: Pulling the Enable pin (J1-5) below the minimum turn-off threshold of 0.8V will disable the
driver. Disabling the driver will require the ability to sink ≥2mA below the turn-off threshold. This pin may be driven
by an open collector stage or a totem pole stage.
EXTERNAL PWM DIMMING
•OPERATION: External PWM configuration as shown in Figure 1 allows the user to control display brightness
with an externally generated PWM signal. The user is responsible to provide the PWM signal. A dimming ratio up
to 1000:1 is possible with this configuration. The minimum pulse width is 5μs.
•DIMMING: Dimming is accomplished by applying a PWM signal to the PWM pin (J1-6). PWM on and off levels
are specified in the Operating Characteristics section of the data sheet. Display brightness is modulated by
controlling the PWM duty cycle as shown in Graph 1. Pin 6 may be driven by an open collector stage capable of
sinking >1mA, or a totem pole stage.
•Pins 1 and 2 of connector J1 must be connected to +Vin, between 8 and 20 Vdc. Pins 3 and 4 of connector
J1 must be connected to GND. Pin 5 must either be floating or above the full on threshold if being driven by a
totem pole stage.
•DISABLING DRIVER: Pulling the Enable pin (J1-5) below the minimum turn-off threshold of 0.8V will disable the
driver. Disabling the driver will require the ability to sink ≥2mA below the turn-off threshold. This pin may be driven
by an open collector stage or a totem pole stage.
FAULT INDICATOR
•The Fault Indicator pin (J1-8) may be used as a feedback signal that will fall below the fault level of 0.3V in the
case of an open string, a shorted string, an output overvoltage condition, or an over temperature condition. If
used, this pin should be loaded with a high impedance stage as specified in the Operating Characteristics. Do
not drive this pin with a voltage, as it will damage the driver.
page 5 of 5.
Graph 1
Figure 1
Enable
Cathode 1
J2
+12V
GND
Vin
Anode 1
1,2
3,4
5
5V
0V
Duty Cycle
0%-100%
EXTERNAL PWM DIMMING
J1
Cathode 2
Anode 2
6PWM
ON
OFF
SFDMB3945F
Fault
(output) 8
U
L
®
R
E
G
I
S
T
E
R
E
D
F
I
R
M
R
E
G
I
S
T
E
R
E
D
F
I
R
M
E
n
d
i
c
o
t
t
R
e
s
e
a
r
c
h
G
r
o
u
p
,
I
n
c.
I
S
O
9
0
0
1
A
3
3
1
3
Endicott Research Group, Inc. (ERG) reserves the right to make changes in circuit design and/or
specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets
are current before placing orders. Information furnished by ERG is believed to be accurate and
reliable. However, no responsibility is assumed by ERG for its use.
(1)
+
(1) Low ESR type input by-pass capacitor (10 uF - 220 uF) may be required to reduce reflected ripple
and to improve power supply response.
