© 1998, 2000
MOS FIELD EFFECT TRANSISTOR
2SK3225
SWITCHING
N-CHANNEL POWER MOS FET
INDUSTRIAL USE
DATA SHEET
Document No. D13798EJ3V0DS00 (3rd edition)
Date Published April 2001 NS CP(K)
Printed in Japan
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
The mark ★ shows major revised points.
DESCRIPTION
The 2SK3225 is N-Channel MOS Field Effect Transistor
designed for high current switching applications.
FEATURES
•Low On-state Resistance
RDS(on)1 = 18 mΩ MAX. (VGS = 10 V, ID = 17 A)
RDS(on)2 = 27 mΩ MAX. (VGS = 4.0 V, ID = 17 A)
•Low Ciss : Ciss = 2100 pF TYP.
•Built-in Gate Protection Diode
•TO-251/TO-252 package
ABSOLUTE MAXIMUM RATINGS (TA = 25°C)
Drain to Source Voltage VDSS 60 V
Gate to Source Voltage VGSS(AC) ±20 V
Gate to Source Voltage VGSS(DC) +20, −10 V
Drain Current (DC) ID(DC) ±34 A
Drain Current (Pulse) Note1 ID(pulse) ±136 A
Total Power Dissipation (TC = 25°C) PT40 W
Total Power Dissipation (TA = 25°C) PT1.0 W
Channel Temperature Tch 150 °C
Storage Temperature Tstg –55 to +150 °C
Single Avalanche Current Note2 IAS 15 A
Single Avalanche Energy Note2 EAS 22 mJ
Note1. PW ≤ 10
µ
s, Duty cycle ≤ 1%
2. Starting Tch = 25°C, VDD = 30 V, RG = 25 Ω, VGS = 20 V → 0 V
ORDERING INFORMATION
PART NUMBER PACKAGE
2SK3225 TO-251
2SK3225-Z TO-252
(TO-251)
(TO-252)
★
Data Sheet D13798EJ3V0DS
2
2SK3225
ELECTRICAL CHARACTERISTICS (TA = 25°C)
CHARACTE RISTI CS SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT
Drain to Sourc e On-state Res i stance RDS(on)1 VGS = 10 V, I D = 17 A 13 18 mΩ
RDS(on)2 VGS = 4.0 V, ID = 17 A 18 27 mΩ
Gate to Source Cut-off V ol tage VGS(off) VDS = 10 V, ID = 1 mA 1.0 1.5 2.0 V
Forward Transfer Adm i t tance | yfs |V
DS = 10 V, ID = 17 A 13 27 S
Drain Leakage Current IDSS VDS = 60 V, VGS = 0 V 10
µ
A
Gate to Source Leakage Current IGSS VGS = ±20 V, VDS = 0 V ±10
µ
A
Input Capac i t ance Ciss VDS = 10 V 2100 pF
Output Capaci tance Coss VGS = 0 V 550 pF
Reverse Transf er Capacitanc e Crss f = 1 MHz 220 pF
Turn-on Delay Time td(on) ID = 17 A 32 ns
Rise Time trVGS = 10 V 300 ns
Turn-off Del a y T i me td(off) VDD = 30 V 110 ns
Fall Time tfRG = 10 Ω140 ns
Total Gate Charge QGID = 34 A 45 nC
Gate to Source Charge QGS VDD = 48 V 7 nC
Gate to Drain Charge QGD VGS = 10 V 13 nC
Body Diode Forward Voltage VF(S-D) IF = 34 A , VGS = 0 V 0.94 V
Reverse Recovery T i me trr If = 34 A , VGS = 0 V 60 ns
Reverse Recovery Charge Qrr di/dt = 100 A /
µ
s95nC
TEST CIRCUIT 1 AVALANCHE CAPABILITY
R
G
= 25 Ω
50 Ω
PG.
L
V
DD
V
GS
= 20 → 0 V
BV
DSS
I
AS
I
D
V
DS
Starting T
ch
V
DD
D.U.T.
TEST CIRCUIT 3 GATE CHARGE
TEST CIRCUIT 2 SWITCHING TIME
PG. R
G
0
V
GS
D.U.T.
R
L
V
DD
τ = 1
s
µ
Duty Cycle ≤ 1%
V
GS
Wave Form
I
D
Wave Form
V
GS
10% 90%
10%
0
I
D
90%
90%
td(on) trtd(off) t
f
10%
τ
I
D
0
ton toff
PG. 50 Ω
D.U.T.
R
L
V
DD
I
G
= 2 mA
★
Data Sheet D13798EJ3V0DS 3
2SK3225
TYPICAL CHARACTERISTICS (TA = 25°C)
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
PW - Pulse Width - s
r
th(t)
- Transient Thermal Resistance - ˚C/W
10
0.001
0.01
0.1
1
100
1000
1
m10
m 100
m 1 10 100 1000 10
µµ
100
Single Pulse
R
th(ch-C)
= 3.13
˚C/W
R
th(ch-A)
= 125
˚C/W
★
DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
T
C
- Case Temperature - °C
dT - Percentage of Rated Power - %
020 40 60 80 100 120 140 160
20
40
60
80
100
0.1
1
10
100
1000
0.1 1 10 100
FORWARD BIAS SAFE OPERATING AREA
V
DS
- Drain to Source Voltage - V
I
D
- Drain Current - A
1
ms
10
ms
ID(DC)
ID(pulse)
R
DS(on)
Limited
(at V
GS
= 10 V)
T
C
= 25
˚C
Single Pulse
DC
µ
Pw = 10 s
µ
100 s
TOTAL POWER DISSIPATION vs.
CASE TEMPERATURE
T
C
- Case Temperature - °C
P
T
- Total Power Dissipation - W
020 40 60 80 100 120 140 160
70
60
50
40
30
20
10
Data Sheet D13798EJ3V0DS
4
2SK3225
FORWARD TRANSFER CHARACTERISTICS
VGS - Gate to Source Voltage - V
ID - Drain Current - A
Pulsed
14
23
1000
100
10
1
0.1 56
0
TA = −50˚C
25˚C
75˚C
150˚C
DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE
VDS - Drain to Source Voltage - V
ID - Drain Current - A
00234
160
200
1
Pulsed
VGS
=
10 V
VGS
=
4.0
V
120
80
40
FORWARD TRANSFER ADMITTANCE vs.
DRAIN CURRENT
ID - Drain Current - A
|
yfs
| - Forward Transfer Admittance - S
VDS
=
10
V
Pulsed
0.1 1
1
10
100
10 100
0.1
TA = 150˚C
75˚C
25˚C
−50˚C
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
GATE TO SOURCE VOLTAGE
V
GS
- Gate to Source Voltage - V
R
DS(on)
- Drain to Source On-state Resistance - mΩ
05
20
10
30
10 15
Pulsed
I
D
=
17
A
DRAIN TO SOURCE ON-STATE
RESISTANCE vs. DRAIN CURRENT
I
D
- Drain Current - A
RDS(on) - Drain to Source On-state Resistance - mΩ
10
101
20
30
100 1000
Pulsed
0
VGS = 4.0 V
10 V
GATE TO SOURCE CUT-OFF VOLTAGE vs.
CHANNEL TEMPERATURE
T
ch
- Channel Temperature - ˚C
V
GS(off)
- Gate to Source Cut-off Voltage - V
V
DS
= 10
V
I
D
= 1
mA
−50 0 50 100 150
0
1.0
2.0
1.5
0.5
Data Sheet D13798EJ3V0DS 5
2SK3225
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
Tch - Channel Temperature - ˚C
RDS(on) - Drain to Source On-state Resistance - mΩ
0−50
10
050 100 150
ID = 17
A
20
40
30 VGS = 4.0
V
VGS = 10
V
SOURCE TO DRAIN DIODE FORWARD VOLTAGE
1.0
ISD - Diode Forward Current - A
01.5
V
SD
- Source to Drain Voltage - V
0.5
Pulsed
0.1
1
10
100
1000
VGS = 0 V
VGS = 10 V
CAPACITANCE vs. DRAIN TO
SOURCE VOLTAGE
V
DS
- Drain to Source Voltage - V
C
iss
, C
oss
, C
rss
- Capacitance - pF
10
0.1
100
1000
10000
1 10 100
V
GS
= 0 V
f = 1
MHz
C
iss
C
oss
C
rss
SWITCHING CHARACTERISTICS
I
D
- Drain Current - A
t
d(on)
, t
r
, t
d(off)
, t
f
- Switching Time - ns
10
110.1
100
1000
10 100
t
f
t
r
t
d(on)
t
d(off)
VDD = 30
V
VGS = 10
V
RG = 10
Ω
REVERSE RECOVERY TIME vs.
DRAIN CURRENT
I
F
- Drain Current - A
t
rr
- Reverse Recovery Time - ns
di/dt
=
100
A
/
V
GS
=
0 V
µ
s
1
0.1
10
1 10 100
1000
100
VGS - Gate to Source Voltage - V
DYNAMIC INPUT/OUTPUT CHARACTERISTICS
QG - Gate Charge - nC
VDS - Drain to Source Voltage - V
020 40 60 80
20
40
60
80
2
4
6
8
0
VDD = 48 V
30 V
12 V
12
14
16
10
ID = 34
A
VGS = 10
V
V
GS
V
DS
Data Sheet D13798EJ3V0DS
6
2SK3225
SINGLE AVALANCHE ENERGY
DERATING FACTOR
Starting Tch - Starting Channel Temperature - ˚C
Energy Derating Factor - %
25 50 75 100
160
140
120
100
80
60
40
20
0
125 150
VDD = 30 V
RG = 25 Ω
VGS = 20 V → 0 V
IAS ≤ 15 A
SINGLE AVALANCHE CURRENT vs.
INDUCTIVE LOAD
L - Inductive Load - H
I
AS
- Single Avalanche Current - A
1.0
10
100
1
m10
m
R
G
= 25
Ω
V
DD
= 30
V
V
GS
= 20
V
→
0 V
Starting T
ch
= 25°C
I
AS
= 15
A
10
µ
100
µ
0.1
E
AS
=
22
mJ
★
Data Sheet D13798EJ3V0DS 7
2SK3225
PACKAGE DRAWINGS (Unit : mm)
1)TO-251 (MP-3) 2)TO-252 (MP-3Z)
EQUIVALENT CIRCUIT
Drain
Source
Gate
Gate Protection
Diode
Body
Diode
Remark The diode connected between the gate and source of the transistor serves as a protector against ESD.
When this device actually used, an additional protection circuit is externally required if a voltage
exceeding the rated voltage may be applied to this device.
1.Gate
2.Drain
3.Source
4.Fin (Drain)
213
6.5±0.2
5.0±0.2
4
1.5-
0.1
+0.2
5.5±0.27.0 MAX.
13.7 MIN.
2.32.3
0.75
0.5±0.1
2.3±0.2
1.6±0.2
1.1±0.2
0.5-
0.1
+0.2
0.5-
0.1
+0.2
1. Gate
2. Drain
3. Source
4. Fin (Drain)
123
4
6.5±0.2
5.0±0.2
4.3 MAX.0.8
2.3 2.3 0.9
MAX.
5.5±0.2
10.0 MAX.
2.0
MIN.
1.5-
0.1
+0.2
2.3±0.2
0.5±0.1
0.8
MAX.
0.8
1.0 MIN.
1.8TYP.
0.7
1.1±0.2
2SK3225
M8E 00. 4
The information in this document is current as of April, 2001. The information is subject to change
without notice. For actual design-in, refer to the latest publications of NEC's data sheets or data
books, etc., for the most up-to-date specifications of NEC semiconductor products. Not all products
and/or types are available in every country. Please check with an NEC sales representative for
availability and additional information.
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