www.ti.com SLOS369B - JULY 2002 - REVISED DECEMBER 2002 FEATURES D Maximum Battery Life and Minimum Heat - Efficiency With an 8- Speaker: - 84% at 400 mW - 79% at 100 mW - 2.8-mA Quiescent Current - 0.5-A Shutdown Current APPLICATIONS D Ideal for Wireless or Cellular Handsets and PDAs DESCRIPTION D Only Three External Components - Optimized PWM Output Stage Eliminates LC Output Filter - Internally Generated 250-kHz Switching Frequency Eliminates Capacitor and Resistor - Improved PSRR (-71 dB at 217 Hz) and Wide Supply Voltage (2.5 V to 5.5 V) Eliminates Need for a Voltage Regulator - Fully Differential Design Reduces RF Rectification and Eliminates Bypass Capacitor - Improved CMRR Eliminates Two Input Coupling Capacitors The TPA2005D1 is a 1.1-W high efficiency filter-free class-D audio power amplifier in a MicroStar Junior BGA package that requires only three external components. Features like 84% efficiency, -71-dB PSRR at 217 Hz, improved RF-rectification immunity, and 15 mm2 total PCB area make the TPA2005D1 ideal for cellular handsets. A fast start-up time of 9 ms with minimal pop makes the TP2005D1 ideal for PDA applications. In cellular handsets, the earpiece, speaker phone, and melody ringer can each be driven by the TPA2005D1. The device allows independent gain control by summing the signals from each function while minimizing noise to only 48 VRMS. APPLICATION CIRCUIT To Battery Internal Oscillator + RI Differential Input - RI CS IN- _ PWM CS VO+ H- Bridge VO- + IN+ GND SHUTDOWN Actual Solution Size (MicroStar Junior BGA) VDD Bias Circuitry TPA2005D1 2.5 mm RI RI 6 mm Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. MicroStar Junior is a trademark of Texas Instruments. !" !"#! !$%#"! ! &%" ! % "#! ! &# $ ' (& !" "#" $ # ' !#" ! " &#) *+ & $,!) " ( "%#( #%#" %" Copyright 2002, Texas Instruments Incorporated www.ti.com SLOS369B - JULY 2002 - REVISED DECEMBER 2002 This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ORDERING INFORMATION TA PACKAGE MicroStar Junior (GQY) -40C 40C to 85C Plastic small outline (DRB) (1) The GQY package is only available taped and reeled. PART NUMBER TPA2005D1GQYR(1) SYMBOL TPA2005D1DRBR BIQ PB051 ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range unless otherwise noted(1) S Supply l voltage, lt VDD TPA2005D1 UNIT In active mode -0.3 V to 6 V V In SHUTDOWN mode -0.3 V to 7 V V -0.3 V to VDD + 0.3 V V Input voltage, VI Continuous total power dissipation See Dissipation Rating Table Operating free-air temperature, TA -40 to 85 C Operating junction temperature, TJ -40 to 150 C Storage temperature, Tstg -65 to 150 C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260 C (1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. RECOMMENDED OPERATING CONDITIONS MIN Supply voltage, VDD MAX V VDD 0.8 V SHUTDOWN 2 Low-level input voltage, VIL SHUTDOWN 0 Input resistor, RI Gain 20 V/V (26 dB) 15 Common mode input voltage range, VIC VDD = 2.5 V, 5.5 V, CMRR -49 dB 0.5 -40 DERATING FACTOR TA 25C POWER RATING TA = 70C POWER RATING TA = 85C POWER RATING GQY 16 mW/C 2W 1.28 W 1.04 W DRB 21.8 mW/C 2.7 W 1.7 W 1.4 W MicroStar Junior is a trademark of Texas Instruments Incorporated. 2 V k VDD-0.8 85 PACKAGE DISSIPATION RATINGS PACKAGE UNIT 5.5 High-level input voltage, VIH Operating free-air temperature, TA NOM 2.5 V C www.ti.com SLOS369B - JULY 2002 - REVISED DECEMBER 2002 ELECTRICAL CHARACTERISTICS TA = 25C (unless otherwise noted) PARAMETER |VOS| Output offset voltage (measured differentially) PSRR Power supply rejection ratio CMRR Common mode rejection ratio IIH IIL High-level input current TEST CONDITIONS MIN TYP MAX VI = 0 V, AV = 2 V/V, VDD = 2.5 V to 5.5 V VDD = 2.5 V to 5.5 V VDD = 2.5 V to 5.5 V, VIC = VDD/2 to 0.5 V VIC = VDD/2 to VDD - 0.8 V UNIT 25 mV -75 -55 dB -68 -49 dB 50 A 1 A Low-level input current VDD = 5.5 V, VI = 5.8 V VDD = 5.5 V, VI = 0.3 V 3.4 Quiescent current VDD = 5.5 V, no load VDD = 3.6 V, no load 2.2 3.2 I(SD) Shutdown current VDD = 2.5 V, no load V(SHUTDOWN)= 0.8 V, VDD = 2.5 V to 5.5 V 0.5 2 Static drain-source drain source on-state on state resistance VDD = 2.5 V VDD = 3.6 V VDD = 5.5 V 770 rDS(on) I(Q) Output impedance in SHUTDOWN f(sw) Switching frequency 4.5 2.8 mA 590 A m 500 V(SHUTDOWN) = 0.8 V VDD = 2.5 V to 5.5 V >1 200 285 kW RI Gain k 250 300 kW RI 300 kHz 315 kW RI V V MAX UNIT OPERATING CHARACTERISTICS TA = 25C, Gain = 2 V/V, RL = 8 (unless otherwise noted) PARAMETER PO Output Out ut power ower TEST CONDITIONS THD + N= N 1%, 1% f = 1 kHz, kH RL = 8 MIN VDD = 5 V VDD = 3.6 V 1.18 0.58 VDD = 2.5 V VDD = 5 V, PO = 1 W, RL = 8 , f = 1 kHz THD+N Total harmonic distortion plus lus noise Supply ripple rejection ratio VDD = 3.6 V, Inputs ac-grounded with Ci = 2 F SNR Signal-to-noise ratio VDD = 5 V, Vn O t t voltage Output lt noise i CMRR Common mode rejection ratio ZI Input impedance Start-up time from shutdown PO = 1 W, VDD = 3.6 V, f = 20 Hz to 20 kHz, Inputs ac-grounded with Ci = 2 F VDD = 3.6 V VIC = 1 Vpp 0.18% 0.19% 0.20% f = 217 Hz, V(RIPPLE) = 200 mVpp RL = 8 -71 dB 97 dB No weighting 48 A weighting 36 f = 217 Hz -63 V VRMS 142 VDD = 3.6 V W 0.26 VDD = 3.6 V, PO = 0.5 W, RL = 8 , f = 1 kHz VDD = 2.5 V, PO = 200 mW, RL = 8 , f = 1 kHz kSVR TYP 150 9 dB 158 k ms 3 www.ti.com SLOS369B - JULY 2002 - REVISED DECEMBER 2002 DRB PACKAGE (TOP VIEW) MicroStar Juniort (GQY) Package (TOP VIEW) SHUTDOWN NC IN+ IN- (A1) (B1) (C1) (D1) (A4) (B4) (C4) (D4) (SIDE VIEW) VO- VDD VDD VO+ SHUTDOWN 1 8 V O- NC 2 7 GND IN+ 3 6 VDD IN- 4 5 VO+ GND NC - No internal connection NOTES:A. The shaded terminals are used for electrical and thermal connections to the ground plane. All the shaded terminals need to be electrical connected to ground. No connect (NC) terminals still need a pad and trace. B. The thermal pad of the DRB package should be electrically and thermally connected to a ground plane. TERMINAL FUNCTIONS TERMINAL NAME I/O DESCRIPTION GQY DRB D1 4 I Negative differential input IN+ C1 3 I Positive differential input VDD VO+ B4, C4 6 I Power supply D4 5 O Positive BTL output A2, A3, B3, C2, C3 D2, D3 7 I High-current ground VO- SHUTDOWN A4 8 O Negative BTL output A1 1 I Shutdown terminal (active low logic) NC B1 2 IN- GND No connect FUNCTIONAL BLOCK DIAGRAM Gain = 2 V/V VDD B4, C4 VDD 150 k IN- D1 _ + + _ Deglitch Logic Gate Drive + _ Deglitch Logic Gate Drive A4 VO- _ + _ + + _ IN+ C1 150 k SHUTDOWN A1 TTL SD Input Buffer A2, A3, B3, C2, C3, D2, D3 4 Biases and References Ramp Generator Startup Protection Logic D4 VO+ OC Detect GND www.ti.com SLOS369B - JULY 2002 - REVISED DECEMBER 2002 TYPICAL CHARACTERISTICS TABLE OF GRAPHS FIGURE PD Efficiency vs Output power 1, 2 Power dissipation vs Output power 3 Supply current vs Output power 4, 5 I(Q) I(SD) Quiescent current vs Supply voltage 6 Shutdown current vs Shutdown voltage 7 PO Output power THD+N vs Supply voltage 8 vs Load resistance 9, 10 vs Output power 11, 12 vs Frequency Total harmonic distortion plus lus noise 13, 14, 15, 16 vs Common-mode input voltage vs Frequency KSVR Supply voltage rejection ratio GSM power supply rejection CMRR Common mode rejection ratio Common-mode 17 18, 19, 20 vs Common-mode input voltage 21 vs Time 22 vs Frequency 23 vs Frequency 24 vs Common-mode input voltage 25 TEST SET-UP FOR GRAPHS CI TPA2005D1 RI + Measurement Output - IN+ CI OUT+ Load RI + IN- OUT- VDD GND 30 kHz Low Pass Filter + Measurement Input - 1 F VDD - Notes: (1) CI was Shorted for any Common-Mode input voltage measurement (2) A 33-H inductor was placed in series with the load resistor to emulate a small speaker for efficiency measurements. (3) The 30-kHz low-pass filter is required even if the analyzer has a low-pass filter. An RC filter (100 , 47 nF) is used on each output for the data sheet graphs. 5 www.ti.com SLOS369B - JULY 2002 - REVISED DECEMBER 2002 TYPICAL CHARACTERISTICS EFFICIENCY vs OUTPUT POWER EFFICIENCY vs OUTPUT POWER 100 0.7 90 80 RL = 8 , 33 H 70 70 Efficiency - % RL = 16 , 33 H 60 50 40 30 Class-AB, RL = 8 20 VDD = 5 V, RL = 8 , 33 H 80 10 VDD = 2.5 V, RL= 8 , 33 H 60 50 40 Class-AB, VDD = 5 V, RL = 8 30 20 10 VDD = 3.6 0 0 0 0.1 0.2 0.3 0.4 0.5 0.2 0.4 Figure 1 0.6 0.8 1 1.2 150 100 50 RL = 32 , 33 H 200 150 VDD = 5 V, RL = 8 , 33 H 100 VDD = 3.6 V, RL = 8 , 33 H VDD = 2.5 V, RL = 8 , 33 H 0 0.2 0.3 0.4 0.5 PO - Output Power - W 0 0.6 0.2 Figure 4 SHUTDOWN CURRENT vs SHUTDOWN VOLTAGE VDD = 2.5 V VDD = 3.6 V VDD = 5 V 0.2 0.8 1 1.2 0.4 0.5 0.6 Shutdown Voltage - V Figure 7 No Load 2.6 2.4 2.5 3 3.5 0.7 0.8 4 4.5 5 5.5 VDD - Supply Voltage - V Figure 6 OUTPUT POWER vs LOAD RESISTANCE VDD = 5 V 1.2 1 f = 1 kHz THD+N = 1% Gain = 2 V/V 1.2 THD+N = 10% 0.8 0.6 THD+N = 1% 0.4 1 VDD = 3.6 V 0.8 VDD = 2.5 V 0.6 0.4 0.2 0.2 0 0.3 2.8 2 0.6 PO - Output Power - W PO - Output Power - W I (SD) - Shutdown Current - A 0.8 0.2 3 2.2 RL = 8 f = 1 kHz Gain = 2 V/V 1.4 0.6 1.2 1.4 1.6 0.7 1 RL = 8 , 33 H 3.2 OUTPUT POWER vs SUPPLY VOLTAGE 0.1 6 0.4 3.4 Figure 5 1 0.8 3.6 PO - Output Power - W 0.9 0.6 3.8 50 0.1 0.4 QUIESCENT CURRENT vs SUPPLY VOLTAGE I (Q)- Quiescent Current - mA Supply Current - mA Supply Current - mA RL = 8 , 33 H 0 0.2 Figure 3 250 200 0.3 VDD = 5 V, RL = 8 , 33 H 0 300 0.4 0.1 PO - Output Power - W VDD = 3.6 V 0.5 VDD = 3.6 V, RL = 8 , 33 H 0.2 SUPPLY CURRENT vs OUTPUT POWER 250 0.1 0.3 Figure 2 SUPPLY CURRENT vs OUTPUT POWER 0 0.4 PO - Output Power - W PO - Output Power - W 0 Class-AB, VDD = 3.6 V, RL = 8 0.5 0 0 0.6 Class-AB, VDD = 5 V, RL = 8 0.6 PD - Power Dissipation - W RL = 32 , 33 H 90 Efficiency - % POWER DISSIPATION vs OUTPUT POWER 0 0 2.5 3 3.5 4 4.5 VDD - Supply Voltage - V Figure 8 5 8 12 16 20 24 RL - Load Resistance - Figure 9 28 32 www.ti.com SLOS369B - JULY 2002 - REVISED DECEMBER 2002 1.6 f = 1 kHz THD+N = 10% Gain = 2 V/V VDD = 5 V 1 VDD = 3.6 V 0.8 VDD = 2.5 V 0.6 0.4 0.2 0 8 12 16 20 24 28 32 RL = 8 , f = 1 kHz, Gain = 2 V/V 10 5 2.5 V 2 3.6 V 1 5V 0.5 0.2 0.1 0.01 0.02 RL - Load Resistance - VDD = 5 V CI = 2 F RL = 8 Gain = 2 V/V 1 0.5 0.2 50 mW 1W 0.05 0.02 0.008 250 mW 20 50 100 200 500 1 k 2 k f - Frequency - Hz 20 k VDD = 3.6 V CI = 2 F RL = 16 Gain = 2 V/V 1 0.5 0.2 15 mW 0.1 75 mW 0.05 0.02 0.01 200 mW 20 50 100 200 500 1 k 2 k f - Frequency - Hz Figure 16 3.6 V 1 5V 0.5 0.2 0.1 0.01 0.02 VDD = 3.6 V CI = 2 F RL = 8 Gain = 2 V/V 5 2 1 0.5 0.2 500 mW 25 mW 0.1 0.05 125 mW 0.02 0.01 20 20 k 50 100 200 500 1 k 2 k 1 2 20 k 10 VDD = 2.5 V CI = 2 F RL = 8 Gain = 2 V/V 5 2 1 15 mW 75 mW 0.5 0.2 0.1 200 mW 0.05 0.02 0.01 20 50 100 200 600 1 k 2 k f - Frequency - Hz f - Frequency - Hz Figure 14 Figure 15 TOTAL HARMONIC DISTORTION + NOISE vs COMMON MODE INPUT VOLTAGE 10 f = 1 kHz PO = 200 mW 1 VDD = 2.5 V VDD = 3.6 V 0.1 0 0.1 TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY 0.5 1 1.5 2 2.5 3 3.5 VIC - Common Mode Input Voltage - V Figure 17 20 k SUPPLY VOLTAGE REJECTION RATIO vs FREQUENCY k 10 THD+N - Total Harmonic Distortion + Noise - % THD+N - Total Harmonic Distortion + Noise - % TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY 2 2.5 V 2 Figure 12 10 Figure 13 5 5 PO - Output Power - W TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY THD+N - Total Harmonic Distortion + Noise - % THD+N - Total Harmonic Distortion + Noise - % 10 0.1 2 10 Figure 11 TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY 2 1 RL = 16 , f = 1 kHz, Gain = 2 V/V PO - Output Power - W Figure 10 5 0.1 30 20 THD+N - Total Harmonic Distortion + Noise - % 1.2 30 20 TOTAL HARMONIC DISTORTION + NOISE vs OUTPUT POWER - Supply Voltage Rejection Ratio - dB SVR PO - Output Power - W 1.4 TOTAL HARMONIC DISTORTION + NOISE vs OUTPUT POWER THD+N - Total Harmonic Distortion + Noise - % OUTPUT POWER vs LOAD RESISTANCE THD+N - Total Harmonic Distortion + Noise - % TYPICAL CHARACTERISTICS 0 CI = 2 F RL = 8 Vp-p = 200 mV Inputs ac-Grounded Gain = 2 V/V -10 -20 -30 -40 VDD = 3.6 V -50 VDD =2. 5 V -60 -70 VDD = 5 V -80 20 50 100 200 600 1 k 2 k f - Frequency - Hz 20 k Figure 18 7 www.ti.com SLOS369B - JULY 2002 - REVISED DECEMBER 2002 TYPICAL CHARACTERISTICS SUPPLY VOLTAGE REJECTION RATIO vs FREQUENCY -30 VDD = 2. 5 V -40 -50 VDD = 5 V -60 -70 VDD = 3.6 V -80 20 50 100 200 600 1 k 2 k f - Frequency - Hz 20 k -20 -30 CI = 2 F RL = 8 Inputs Floating Gain = 2 V/V -40 -50 -60 VDD = 3.6 V -70 -80 -90 -100 20 50 100 200 600 1 k 2 k f - Frequency - Hz Figure 19 20 k 0 f = 217 Hz RL = 8 Gain = 2 V/V -10 -20 -30 -40 VDD = 2.5 V -50 VDD = 3.6 V -60 -70 -80 VDD = 5 V -90 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 VIC - Common Mode Input Voltage - V Figure 20 Figure 21 GSM POWER SUPPLY REJECTION vs TIME GSM POWER SUPPLY REJECTION vs FREQUENCY 0 C1 - Duty 12.6% Voltage - V C1 - Frequency 216.7448 Hz C1 - Amplitude 512 mV C1 - High 3.544 V VOUT -50 -100 VO - Output Voltage - dBV VDD 0 VDD Shown in Figure 22 CI = 2 F, Inputs ac-grounded Gain = 2V/V -50 -100 -150 0 400 t - Time - ms VDD = 2.5 V to 5 V VIC = 1 Vp-p RL = 8 Gain = 2 V/V -30 -40 -50 -60 50 100 200 600 1 k 2 k f - Frequency - Hz Figure 24 8 1600 2000 COMMON-MODE REJECTION RATIO vs COMMON-MODE INPUT VOLTAGE CMRR - Common Mode Rejection Ratio - dB CMRR - Common Mode Rejection Ratio - dB 0 -70 20 1200 Figure 23 COMMON-MODE REJECTION RATIO vs FREQUENCY -20 800 f - Frequency - Hz Figure 22 -10 -150 20 k 0 RL = 8 Gain = 2 V/V -10 -20 -30 -40 VDD = 2.5 V VDD = 3.6 V -50 -60 -70 -80 VDD = 5 V -90 -100 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 VIC - Common Mode Input Voltage - V Figure 25 V DD - Supply Voltage - dBV -20 - Supply Voltage Rejection Ratio - dB -10 0 -10 SVR Gain = 5 V/V CI = 2 F RL = 8 Vp-p = 200 mV Inputs ac-Grounded SUPPLY VOLTAGE REJECTION RATIO vs COMMON-MODE INPUT VOLTAGE k - Supply Voltage Rejection Ratio - dB SVR 0 k k - Supply Voltage Rejection Ratio - dB SVR SUPPLY VOLTAGE REJECTION RATIO vs FREQUENCY www.ti.com SLOS369B - JULY 2002 - REVISED DECEMBER 2002 APPLICATION INFORMATION FULLY DIFFERENTIAL AMPLIFIER The TPA2005D1 is a fully differential amplifier with differential inputs and outputs. The fully differential amplifier consists of a differential amplifier and a common-mode amplifier. The differential amplifier ensures that the amplifier outputs a differential voltage on the output that is equal to the differential input times the gain. The common-mode feedback ensures that the common-mode voltage at the output is biased around VDD/2 regardless of the common-mode voltage at the input. The fully differential TPA2005D1 can still be used with a single-ended input; however, the TPA2005D1 should be used with differential inputs when in a noisy environment, like a wireless handset, to ensure maximum noise rejection. Advantages of Fully DIfferential Amplifiers D Input-coupling capacitors not required: - The fully differential amplifier allows the inputs to be biased at voltage other than mid-supply. For example, if a codec has a midsupply lower than the midsupply of the TPA2005D1, the common-mode feedback circuit will adjust, and the TPA2005D1 outputs will still be biased at midsupply of the TPA2005D1. The inputs of the TPA2005D1 can be biased from 0.5V to VDD - 0.8 V. If the inputs are biased outside of that range, input-coupling capacitors are required. D Midsupply bypass capacitor, C(BYPASS), not required: - The fully differential amplifier does not require a bypass capacitor. This is because any shift in the midsupply affects both positive and negative channels equally and cancels at the differential output. D Better RF-immunity: - GSM handsets save power by turning on and shutting off the RF transmitter at a rate of 217 Hz. The transmitted signal is picked-up on input and output traces. The fully differential amplifier cancels the signal much better than the typical audio amplifier. COMPONENT SELECTION Figure 26 shows the TPA2005D1 typical schematic with differential inputs and Figure 27 shows the TPA2005D1 with differential inputs and input capacitors, and Figure 28 shows the TPA2005D1 with single-ended inputs. Differential inputs should be used whenever possible because the single-ended inputs are much more susceptible to noise. Table 1. Typical Component Values REF DES VALUE EIA SIZE MANUFACTURER PART NUMBER RI CS CI(1) 150 k (0.5%) 0402 Panasonic ERJ2RHD154V 1 F (+22%, -80%) 0402 Murata GRP155F50J105Z 3.3 nF (10%) 0201 Murata GRP033B10J332K (1) CI is only needed for single-ended input or if VICM is not between 0.5 V and VDD - 0.8 V. CI = 3.3 nF (with RI = 150 k) gives a high-pass corner frequency of 321 Hz. 9 www.ti.com SLOS369B - JULY 2002 - REVISED DECEMBER 2002 To Battery Internal Oscillator RI + IN- PWM _ Differential Input RI - VDD H- Bridge CS VO+ VO- + IN+ GND Bias Circuitry SHUTDOWN TPA2005D1 Filter-Free Class D Figure 26. Typical TPA2005D1 Application Schematic With Differential Input for a Wireless Phone To Battery CI Internal Oscillator RI IN- PWM _ Differential Input CI RI VDD H- Bridge CS VO+ VO- + IN+ GND Bias Circuitry SHUTDOWN TPA2005D1 Filter-Free Class D Figure 27. TPA2005D1 Application Schematic With Differential Input and Input Capacitors To Battery CI Single-ended Input Internal Oscillator RI IN- _ RI + PWM H- Bridge CS VO+ VO- IN+ CI SHUTDOWN VDD GND Bias Circuitry TPA2005D1 Filter-Free Class D Figure 28. TPA2005D1 Application Schematic With Single-Ended Input 10 www.ti.com SLOS369B - JULY 2002 - REVISED DECEMBER 2002 Input Resistors (RI) The input resistors (RI) set the gain of the amplifier according to equation (1). VV Gain + 300 kW R I (1) Resistor matching is very important in fully differential amplifiers. The balance of the output on the reference voltage depends on matched ratios of the resistors. CMRR, PSRR, and cancellation of the second harmonic distortion diminish if resistor mismatch occurs. Therefore, it is recommended to use 1% tolerance resistors or better to keep the performance optimized. Matching is more important than overall tolerance. Resistor arrays with 1% matching can be used with a tolerance greater than 1%. Place the input resistors very close to the TPA2005D1 to limit noise injection on the high-impedance nodes. For optimal performance the gain should be set to 2 V/V or lower. Lower gain allows the TPA2005D1 to operate at its best, and keeps a high voltage at the input making the inputs less susceptible to noise. Decoupling Capacitor (CS) The TPA2005D1 is a high-performance class-D audio amplifier that requires adequate power supply decoupling to ensure the efficiency is high and total harmonic distortion (THD) is low. For higher frequency transients, spikes, or digital hash on the line, a good low equivalent-series-resistance (ESR) ceramic capacitor, typically 1 F, placed as close as possible to the device VDD lead works best. Placing this decoupling capacitor close to the TPA2005D1 is very important for the efficiency of the class-D amplifier, because any resistance or inductance in the trace between the device and the capacitor can cause a loss in efficiency. For filtering lower-frequency noise signals, a 10 F or greater capacitor placed near the audio power amplifier would also help, but it is not required in most applications because of the high PSRR of this device. Input Capacitors (CI) The TPA2005D1 does not require input coupling capacitors if the design uses a differential source that is biased from 0.5 V to VDD - 0.8 V (shown in Figure 26). If the input signal is not biased within the recommended common-mode input range, if needing to use the input as a high pass filter (shown in Figure 27), or if using a single-ended source (shown in Figure 28), input coupling capacitors are required. The input capacitors and input resistors form a high-pass filter with the corner frequency, fc, determined in equation (2). fc + 1 2p RICI (2) The value of the input capacitor is important to consider as it directly affects the bass (low frequency) performance of the circuit. Speakers in wireless phones cannot usually respond well to low frequencies, so the corner frequency can be set to block low frequencies in this application. Equation (3) is reconfigured to solve for the input coupling capacitance. C + I 1 2p RI f c (3) If the corner frequency is within the audio band, the capacitors should have a tolerance of 10% or better, because any mismatch in capacitance causes an impedance mismatch at the corner frequency and below. For a flat low-frequency response, use large input coupling capacitors (1 F). However, in a GSM phone the ground signal is fluctuating at 217 Hz, but the signal from the codec does not have the same 217 Hz fluctuation. The difference between the two signals is amplified, sent to the speaker, and heard as a 217 Hz hum. 11 www.ti.com SLOS369B - JULY 2002 - REVISED DECEMBER 2002 SUMMING INPUT SIGNALS WITH THE TPA2005D1 Most wireless phones or PDAs need to sum signals at the audio power amplifier or just have two signal sources that need separate gain. The TPA2005D1 makes it easy to sum signals or use separate signal sources with different gains. Many phones now use the same speaker for the earpiece and ringer, where the wireless phone would require a much lower gain for the phone earpiece than for the ringer. PDAs and phones that have stereo headphones require summing of the right and left channels to output the stereo signal to the mono speaker. Summing Two Differential Input Signals Two extra resistors are needed for summing differential signals (a total of 5 components). The gain for each input source can be set independently (see equations (4) and (5), and Figure 29). Gain 1 + Gain 2 + V V V V O + 300 kW R I1 I1 O + 300 kW R I2 I2 VV (4) VV (5) If summing left and right inputs with a gain of 1 V/V, use RI1 = RI2 = 300 k. If summing a ring tone and a phone signal, set the ring-tone gain to Gain 2 = 2 V/V, and the phone gain to gain 1 = 0.1 V/V. The resistor values would be. . . RI1 = 3 M, and = RI2 = 150 k. Differential Input 1 + RI1 - RI1 R + I2 To Battery Internal Oscillator IN- _ Differential Input 2 - RI2 VDD + PWM H- Bridge CS VO+ VO- IN+ GND SHUTDOWN Bias Circuitry Filter-Free Class D Figure 29. Application Schematic With TPA2005D1 Summing Two Differential Inputs 12 www.ti.com SLOS369B - JULY 2002 - REVISED DECEMBER 2002 Summing a Differential Input Signal and a Single-Ended Input Signal Figure 30 shows how to sum a differential input signal and a single-ended input signal. Ground noise can couple in through IN+ with this method. It is better to use differential inputs. The corner frequency of the single-ended input is set by CI2, shown in equation (8). To assure that each input is balanced, the single-ended input must be driven by a low-impedance source even if the input is not in use Gain 1 + Gain 2 + C I2 + V V V V O + 300 kW R I1 I1 O + 300 kW R I2 I2 VV (6) VV (7) 1 2p RI2 f c2 (8) If summing a ring tone and a phone signal, the phone signal should use a differential input signal while the ring tone might be limited to a single-ended signal. Phone gain is set at gain 1 = 0.1 V/V, and the ring-tone gain is set to gain 2 = 2 V/V, the resistor values would be... RI1 = 3 M, and = RI2 = 150 k. The high paMs corner frequency of the single-ended input is set by CI2. If the desired corner frequency is less than 20 Hz... C C 1 2p 150kW 20Hz I2 u I2 u 53pF RI1 Differential Input 1 Single-Ended Input 2 RI1 CI2 R I2 To Battery Internal Oscillator IN- _ RI2 VDD + PWM H- Bridge CS VO+ VO- IN+ CI2 GND SHUTDOWN Bias Circuitry Filter-Free Class D Figure 30. Application Schematic With TPA2005D1 Summing Differential Input and Single-Ended Input Signals 13 www.ti.com SLOS369B - JULY 2002 - REVISED DECEMBER 2002 Summing Two Single-Ended Input Signals Four resistors and three capacitors are needed for summing single-ended input signals. The gain and corner frequencies (fc1 and fc2) for each input source can be set independently (see equations (9) through (12), and Figure 31). Resistor, RP, and capacitor, CP, are needed on the IN+ terminal to match the impedance on the IN- terminal. The single-ended inputs must be driven by low inpedance sources even if one of the inputs is not outputting an ac signal. Gain 1 + V V Gain 2 + C C I1 + + O + 300 kW R I1 I1 V V VV (9) VV O + 300 kW R I2 I2 (10) 1 2p RI1 f c1 (11) 1 2p RI2 f c2 (12) C +C ) C P I1 I2 (13) I2 R + P R I1 RI1 R ) R I2 I2 Single-Ended Input 1 Single-Ended Input 2 (14) CI1 R I1 To Battery CI2 R I2 Internal Oscillator IN- _ RP VDD + PWM H- Bridge CS VO+ VO- IN+ CP GND SHUTDOWN Bias Circuitry Filter-Free Class D Figure 31. Application Schematic With TPA2005D1 Summing Two Single-Ended Inputs 14 www.ti.com SLOS369B - JULY 2002 - REVISED DECEMBER 2002 EFFICIENCY AND THERMAL INFORMATION The maximum ambient temperature depends on the heat-sinking ability of the PCB system. The derating factor for the 2.5-mm x 2.5-mm MicroStar Junior package is shown in the dissipation rating table. Converting this to JA: q JA + 1 + 1 + 62.5CW 0.016 Derating Factor (15) Given JA of 62.5C/W, the maximum allowable junction temperature of 150C, and the maximum internal dissipation of 0.2 W (worst case 5-V supply), the maximum ambient temperature can be calculated with the following equation. T Max + T Max * q P + 150 * 62.5 (0.2) + 137.5C A J JA Dmax (16) Equation (16) shows that the calculated maximum ambient temperature is 137.5C at maximum power dissipation with a 5-V supply; however, the maximum ambient temperature of the package is limited to 85C. Because of the efficiency of the TPA2005D1, it can be operated under all conditions to an ambient temperature of 85C. The TPA2005D1 is designed with thermal protection that turns the device off when the junction temperature surpasses 150C to prevent damage to the IC. Also, using speakers more resistive than 8- dramatically increases the thermal performance by reducing the output current and increasing the efficiency of the amplifier. BOARD LAYOUT Component Location Place all the external components very close to the TPA2005D1. The input resistors need to be very close to the TPA2005D1 input pins so noise does not couple on the high impedance nodes between the input resistors and the input amplifier of the TPA2005D1. Placing the decoupling capacitor, CS, close to the TPA2005D1 is important for the efficiency of the class-D amplifier. Any resistance or inductance in the trace between the device and the capacitor can cause a loss in efficiency. Trace Width Make the high current traces going to pins VDD, GND, VO+ and VO- of the TPA2005D1 have a minimum width of 0.7 mm. If these traces are too thin, the TPA2005D1's performance and output power will decrease. The input traces do not need to be wide, but do need to run side-by-side to enable common-mode noise cancellation. 15 www.ti.com SLOS369B - JULY 2002 - REVISED DECEMBER 2002 MicroStar Junior BGA Layout Use the following MicroStar Junior BGA ball diameters: D 0.25 mm diameter solder mask D 0.28 mm diameter solder paste mask/stencil D 0.38 mm diameter copper trace Figure 7 shows how to lay out a board for the TPA2005D1 MicroStar Junior BGA. 0.28 mm SD 0.38 mm NC 0.25 mm GND GND Vo- GND VDD IN+ GND GND VDD IN- GND GND Vo+ Solder Mask Paste Mask Copper Trace Figure 32. TPA2005D1 MicroStar Junior BGA Board Layout (Top View) ELIMINATING THE OUTPUT FILTER WITH THE TPA2005D1 This section focuses on why the user can eliminate the output filter with the TPA2005D1. Effect on Audio The class-D amplifier outputs a pulse-width modulated (PWM) square wave, which is the sum of the switching waveform and the amplified input audio signal. The human ear acts as a band-pass filter such that only the frequencies between approximately 20 Hz and 20 kHz are passed. The switching frequency components are much greater than 20 kHz, so the only signal heard is the amplified input audio signal. Traditional Class-D Modulation Scheme The traditional class-D modulation scheme, which is used in the TPA005Dxx family, has a differential output where each output is 180 degrees out of phase and changes from ground to the supply voltage, VDD. Therefore, the differential pre-filtered output varies between positive and negative VDD, where filtered 50% duty cycle yields 0 volts across the load. The traditional class-D modulation scheme with voltage and current waveforms is shown in Figure 33. Note that even at an average of 0 volts across the load (50% duty cycle), the current to the load is high causing a high loss and thus causing a high supply current. 16 www.ti.com SLOS369B - JULY 2002 - REVISED DECEMBER 2002 OUT+ OUT- +5 V Differential Voltage Across Load 0V -5 V Current Figure 33. Traditional Class-D Modulation Scheme's Output Voltage and Current Waveforms Into an Inductive Load With no Input TPA2005D1 Modulation Scheme The TPA2005D1 uses a modulation scheme that still has each output switching from 0 to the supply voltage. However, OUT+ and OUT- are now in phase with each other with no input. The duty cycle of OUT+ is greater than 50% and OUT- is less than 50% for positive voltages. The duty cycle of OUT+ is less than 50% and OUT- is greater than 50% for negative voltages. The voltage across the load sits at 0 volts throughout most of the switching period greatly reducing the switching current, which reduces any I2R losses in the load. OUT+ OUT- Differential Voltage Across Load Output = 0 V +5 V 0V -5 V Current OUT+ OUT- Differential +5 V Voltage Across 0V Load Output > 0 V -5 V Current Figure 34. The TPA2005D1 Output Voltage and Current Waveforms Into an Inductive Load 17 www.ti.com SLOS369B - JULY 2002 - REVISED DECEMBER 2002 Efficiency: Why You Must Use a Filter With the Traditional Class-D Modulation Scheme The main reason that the traditional class-D amplifier needs an output filter is that the switching waveform results in maximum current flow. This causes more loss in the load, which causes lower efficiency. The ripple current is large for the traditional modulation scheme because the ripple current is proportional to voltage multiplied by the time at that voltage. The differential voltage swing is 2 x VDD and the time at each voltage is half the period for the traditional modulation scheme. An ideal LC filter is needed to store the ripple current from each half cycle for the next half cycle, while any resistance causes power dissipation. The speaker is both resistive and reactive, whereas an LC filter is almost purely reactive. The TPA2005D1 modulation scheme has very little loss in the load without a filter because the pulses are very short and the change in voltage is VDD instead of 2 x VDD. As the output power increases, the pulses widen making the ripple current larger. Ripple current could be filtered with an LC filter for increased efficiency, but for most applications the filter is not needed. An LC filter with a cutoff frequency less than the class-D switching frequency allows the switching current to flow through the filter instead of the load. The filter has less resistance than the speaker that results in less power dissipated, which increases efficiency. Effects of Applying a Square Wave Into a Speaker If the amplitude of a square wave is high enough and the frequency of the square wave is within the bandwidth of the speaker, a square wave could cause the voice coil to jump out of the air gap and/or scar the voice coil. A 250-kHz switching frequency, however, is not significant because the speaker cone movement is proportional to 1/f2 for frequencies beyond the audio band. Therefore, the amount of cone movement at the switching frequency is very small. However, damage could occur to the speaker if the voice coil is not designed to handle the additional power. To size the speaker for added power, the ripple current dissipated in the load needs to be calculated by subtracting the theoretical supplied power, PSUP THEORETICAL, from the actual supply power, PSUP, at maximum output power, POUT. The switching power dissipated in the speaker is the inverse of the measured efficiency, MEASURED, minus the theoretical efficiency, THEORETICAL. P P P SPKR +P SPKR + SPKR +P SUP -P SUP THEORETICAL (at max output power) P SUP - SUP THEORETICAL (at max output power) P P OUT OUT (17) P 1 1 * (at max output power) OUT h MEASURED h THEORETICAL hTHEORETICAL + (18) (19) R R L (at max output power) ) 2r L DS(on) (20) The maximum efficiency of the TPA2005D1 with a 3.6 V supply and an 8- load is 86% from equation (20). Using equation (19) with the efficiency at maximum power (84%), we see that there is an additional 17 mW dissipated in the speaker. The added power dissipated in the speaker is not an issue as long as it is taken into account when choosing the speaker. 18 www.ti.com SLOS369B - JULY 2002 - REVISED DECEMBER 2002 When to Use an Output Filter Design the TPA2005D1 without an output filter if the traces from amplifier to speaker are short. The TPA2005D1 passed FCC and CE radiated emissions with no shielding with speaker trace wires 100 mm long or less. Wireless handsets and PDAs are great applications for class-D without a filter. A ferrite bead filter can often be used if the design is failing radiated emissions without an LC filter, and the frequency sensitive circuit is greater than 1 MHz. This is good for circuits that just have to pass FCC and CE because FCC and CE only test radiated emissions greater than 30 MHz. If choosing a ferrite bead, choose one with high impedance at high frequencies, but very low impedance at low frequencies. Use an LC output filter if there are low frequency (< 1 MHz) EMI sensitive circuits and/or there are long leads from amplifier to speaker. Figure 35 and Figure 36 show typical ferrite bead and LC output filters. Ferrite Chip Bead OUTP 1 nF Ferrite Chip Bead OUTN 1 nF Figure 35. Typical Ferrite Chip Bead Filter (Chip bead example: NEC/Tokin: N2012ZPS121) 33 H OUTP 1 F 33 H OUTN 1 F Figure 36. Typical LC Output Filter, Cutoff Frequency of 27 kHz 19 www.ti.com SLOS369B - JULY 2002 - REVISED DECEMBER 2002 MECHANICAL DATA DRB (S-PDSO-N8) PLASTIC SMALL OUTLINE 3,25 2,75 3,25 2,75 Pin 1 Index Area Top and Bottom 1,00 0,80 0,20 REF. Seating Plane 0,08 0,05 0,00 1,85 MAX 8X 0,65 0,45 0,65 1 4 1,59 MAX Exposed Metalized Feature (4x) 8 1,95 5 Exposed Thermal Die Pad (See Nore D) 0,37 8X 0,25 0,10 4203482/B 03/02 NOTES: A. B. C. D. 20 All linear dimensions are in millimeters. This drawing is subject to change without notice. Small Outline No-lead (SON) package configuration. The package thermal performance may be enhanced by bonding the thermal die pad to an external thermal plane. www.ti.com SLOS369B - JULY 2002 - REVISED DECEMBER 2002 MECHANICAL DATA GQY (S-PBGA-N15) PLASTIC BALL GRID ARRAY 1,50 TYP 2,60 SQ 2,40 0,50 0,50 0,25 D C 1,50 TYP 0,25 B A 1 2 3 4 (BOTTOM VIEW) 0,68 0,62 1,00 MAX Seating Plane 0,35 0,25 0,05 M 0,21 0,11 0,08 4201436/B 10/00 NOTES:A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. MicroStar Junior configuration Falls within JEDEC MO-225 MicroStar Junior is a trademark of Texas Instruments. 21 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI's terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. 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