FQP50N06 - Fairchild Semiconductor

FQP50N06

QFETTM

FQP50N06

60V N-Channel MOSFET

General Description

These N-Channel enhancement mode power field effect

transistors are produced using Fairchild’s proprietary,

planar stripe, DMOS technology.

This advanced technology has been especially tailored to

minimize on-state resistance, provide superior switching

performance, and withstand high energy pulse in the

avalanche and commutation mode. These devices are well

suited for low voltage applications such as automotive, DC/

DC converters, and high efficiency switching for power

management in portable and battery operated products.

Features

• 50A, 60V, RDS(on) = 0.022Ω @V GS = 10 V

• Low gate charge ( typical 31 nC)

• Low Crss ( typical 65 pF)

• Fast switching

• 100% avalanche tested

• Improved dv/dt capability

• 175°C maximum junction temperature rating

Absolute Maximu m Rating s TC = 25°C unless otherwise noted

Thermal Characteristics

Symbol Parameter FQP50N06 Units

VDSS Drain-Source Voltage 60 V

IDDrain Current - Continuous (TC = 25°C) 50 A

- Continuous (TC = 100°C) 35.4 A

IDM Drain Current - Pulsed (Note 1) 200 A

VGSS Gate-Source Voltage ± 25 V

EAS Single Pulsed Avalanche Energy (Note 2) 490 mJ

IAR Avalanche Current (Note 1) 50 A

EAR Repetitive Avalanche Energy (Note 1) 12 mJ

dv/dt Peak Diode Recovery dv/dt (Note 3) 7.0 V/ns

PDPower Dissipation (TC = 25°C) 120 W

- Derate above 25°C 0.8 W/°C

TJ, TSTG Operating and Storage Temperature Range -55 to +175 °C

TLMaximum lead temperature for soldering purposes,

1/8" from case for 5 seconds 300 °C

Symbol Parameter Typ Max Units

RθJC Thermal Resistance, Junction-to-Case -- 1.24 °C/W

RθCS Thermal Resistance, Case-to-Sink 0.5 -- °C/W

RθJA Thermal Resistance, Junction-to-Ambient -- 62.5 °C/W

TO-220

FQP Series

GSD

Rev. A2, March 2003

FQP50N06

Electrical Characteristics TC = 25°C unless otherwise noted

Notes:

1. Repetitive Rating : Pulse width limited by maximum junction temperature

2. L = 230µH, IAS = 50A, VDD = 25V, RG = 25 Ω, Starting TJ = 25°C

3. ISD ≤ 50A, di/dt ≤ 300A/µs, VDD ≤ BVDSS, Sta rting TJ = 25°C

4. Pulse Test : Pulse width ≤300µs, Duty cycle ≤2%

5. Essentially independent of operating temperature

Symbol Parame ter Test Condit i ons Min Typ Max Units

Off Characteristics

BVDSS Drain-S ource Breakdown Voltage VGS = 0 V, I D = 250 µA60 -- -- V

∆BVDSS

/ ∆TJ

Breakdown Voltage Temperature

Coefficient ID = 250 µA, Referenced to 25°C -- 0.06 -- V/°C

IDSS Zero Gate Voltage Drain Current VDS = 60 V, VGS = 0 V -- -- 1 µA

VDS = 48 V, TC = 150°C -- -- 10 µA

IGSSF Gate-Body Leakage Current, Forward VGS = 25 V, VDS = 0 V -- -- 100 nA

IGSSR Gate-Body Leakage Current, Reverse VGS = -25 V, VDS = 0 V -- -- -100 nA

On Characteri st ics

VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA2.0 -- 4.0 V

RDS(on) Static Drain-Source

On-Resistance VGS = 10 V, ID = 25 A -- 0.018 0.022 Ω

gFS Forward Transconductance VDS = 25 V, ID = 25 A -- 22 -- S

Dynamic Characteristics

Ciss Input Capacitance VDS = 25 V, VGS = 0 V,

f = 1.0 MHz

-- 1180 1540 pF

Coss Output Capacitance -- 440 580 pF

Crss Reverse Transfer Capacitance -- 65 90 pF

Switching Characteristics

td(on) Turn-On Delay Time VDD = 30 V, ID = 25 A,

RG = 25 Ω

-- 15 40 ns

trTurn-On Rise Time -- 105 220 ns

td(off) Turn-Off D e l a y Time -- 60 130 n s

tfTurn -Off Fa ll Time -- 65 140 ns

QgTotal Gate Ch arge VDS = 48 V, ID = 50 A,

VGS = 10 V

-- 31 41 nC

Qgs Gate-Source Charge -- 8 -- nC

Qgd Gate-Drain Charge -- 13 -- nC

Drain-Source Diode Characteristics and Maximum Ratings

ISMaximum Continuous Drain-Source Diode Forward Current -- -- 50 A

ISM Maximum Pulsed Drain-Source Diode Forward Current -- -- 200 A

VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = 50 A -- -- 1.5 V

trr Reverse Recovery Time VGS = 0 V, I S = 50 A,

dIF / dt = 100 A/µs

-- 52 -- ns

Qrr Reverse Recovery Charge -- 75 -- nC

(Note 4)

(Note 4, 5)

(Note 4)

FQP50N06

0 5 10 15 20 25 30 35

VDS = 30V

VDS = 48V

※ N ote : I D = 50A

VGS, Gate-Source Voltage [V]

QG, Total Gate Charge [nC]

10-1 100101

500

1000

1500

2000

2500

3000 Ciss = C gs + Cgd (C ds = shorted)

Coss = Cds + Cgd

Crss = C gd

※ Notes :

1. V GS = 0 V

2. f = 1 M Hz

Crss

Coss

Ciss

Capacitance [pF]

VDS, Drain-Source Voltage [V]

0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6

100

101

102

175℃※ N o te s :

1. V GS = 0V

2. 2 5 0μs P ulse Test

25℃

IDR , Reverse Drain Current [A]

VSD, Source-D rain voltage [V]

0 50 100 150 200

0.00

0.01

0.02

0.03

0.04

0.05

VGS = 20V

VGS = 10V

※ Note : T J = 25℃

RDS(ON) [Ω],

Drain-Source On-Resistance

ID, Drain Current [A]

246810

100

101

102

175℃

25℃

-55℃

※ N o te s :

1. V DS = 30V

2. 2 5 0μs P ulse Test

ID, Drain Current [A]

VGS, G ate-Source Voltage [V]

10-1 100101

100

101

102

V GS

T o p : 15 .0 V

10 .0 V

8.0 V

7.0 V

6.0 V

5.5 V

5.0 V

B o ttom : 4 .5 V

※ N o te :

1. 2 5 0μs P ulse Test

2. T C = 25℃

ID, Drain Current [A]

VDS, Drain-Source Voltage [V]

Typical Characteristics

Figure 5. Capacitanc e Ch a rac te ri st i cs Figure 6. Gate Charge Ch a racteristics

Figu re 3. On-Resista nce Variation vs.

Drain Current and Gate Voltage Figure 4. Body Diode Fo rwa rd Voltage

Variation vs. Source Current

and Temperature

Figure 2. Transfer CharacteristicsFigure 1. On- R egi on Character i st ics

FQP50N06

10-5 10-4 10-3 10-2 10-1 100101

10-2

10-1

100

※ Notes :

1. Z θJC(t) = 1 .2 4 ℃/W Max .

2. D uty Fac tor , D=t1/t2

3. T JM - TC = P DM * Z θJC

(t)

s ingle pulse

D=0.5

0.02

0.2

0.05

0.1

0.01

ZθJC

(t), Therm al Response

t1, Square W ave Pulse Duration [sec]

25 50 75 100 125 150 175

ID, Drain Current [A]

TC, Case Temperature [℃]

10-1 100101102

100

101

102

103

10 ms

1 ms

100μs

Op era tion in This A rea

is Limited by R DS(on)

※ Notes :

1. TC = 25 oC

2. TJ = 175 oC

3. Single P ulse

ID, Drain Current [A]

VDS, Drain-Sourc e Vol tag e [ V]

-100 -50 0 50 100 150 200

0.0

0.5

1.0

1.5

2.0

2.5

※ N ote s :

1. VGS = 10 V

2. ID = 25 A

RDS(ON) , (Normalized)

Drain-Source On-Resistance

TJ, Junction Temperature [oC]

-100 -50 0 50 100 150 200

0.8

0.9

1.0

1.1

1.2

※

Notes :

1 . VGS = 0 V

2 . ID = 250 μA

BV DSS , (Norm alized)

D rain-Source Breakdown Voltage

TJ, Junction Tem perature [oC]

Typical Characteristics (Continued)

Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current

vs. Case Temperature

Figu re 7. Breakdown Voltage Variati on

vs. Temperature Figure 8. On-Resistance Variation

vs. Temperature

Figure 11. Transient Thermal Response Curve

PDM

FQP50N06

Gate Charge Test Circuit & Waveform

Resist iv e Sw itc h ing Test Circ ui t & Waveform s

Unclamped Inductive Switching Test Circuit & Waveforms

Charge

VGS

10V Qg

Qgs Qgd

3mA

VGS

DUT

VDS

300nF

50KΩ

200nF

12V

Same Type

as DUT

Charge

VGS

10V Qg

Qgs Qgd

3mA

VGS

DUT

VDS

300nF

50KΩ

200nF

12V

Same Type

as DUT

VGS

VDS

10%

90%

td(on) tr

ton toff

td(off) tf

VDD

10V

VDS RL

DUT

VGS

VDS

10%

90%

td(on) tr

ton toff

td(off) tf

VDD

10V

VDS RL

DUT

VGS

EAS =LI

AS2

----

1--------------------

BVDSS -V

BVDSS

VDD

VDS

BVDSS

t p

VDD

IAS

VDS (t)

ID (t)

Time

10V DUT

t p

EAS =LI

AS2

----

EAS =LI

AS2

----

1--------------------

BVDSS -V

BVDSS

VDD

VDS

BVDSS

t p

VDD

IAS

VDS (t)

ID (t)

Time

10V DUT

t p

FQP50N06

Peak Diode Recove ry dv / dt Test Circuit & Waveform s

DUT

VDS

Driver

RGSame Type

as DUT

VGS • dv/dt controlled by RG

•I

SD con troll ed by pulse per iod

VDD

ISD

10V

VGS

( Driver )

ISD

( DUT )

VDS

( DUT )

VDD

Body Diode

Forward Voltage Drop

VSD

IFM , Body Diode Forward Current

Body Diode Reverse Current

IRM

Body Diode Recovery dv/dt

di/dt

D = Gate Pulse Width

Gate Pu lse P eri od

--------------------------

DUT

VDS

Driver

RGSame Type

as DUT

VGS • dv/dt controlled by RG

•I

SD con troll ed by pulse per iod

VDD

ISD

10V

VGS

( Driver )

ISD

( DUT )

VDS

( DUT )

VDD

Body Diode

Forward Voltage Drop

VSD

IFM , Body Diode Forward Current

Body Diode Reverse Current

IRM

Body Diode Recovery dv/dt

di/dt

D = Gate Pulse Width

Gate Pu lse P eri od

--------------------------

D = Gate Pulse Width

Gate Pu lse P eri od

--------------------------

FQP50N06

Package Dimensions

4.50 ±0.20

9.90 ±0.20

1.52 ±0.10

0.80 ±0.10 2.40 ±0.20

10.00 ±0.20

1.27 ±0.10

ø3.60 ±0.10

(8.70)

2.80 ±0.1015.90 ±0.20

10.08 ±0.30 18.95MAX.

(1.70)

(3.70)(3.00)

(1.46)

(1.00)

(45°)

9.20 ±0.2013.08 ±0.20

1.30 ±0.10

1.30 +0.10

–0.05

0.50 +0.10

–0.05

2.54TYP

[2.54 ±0.20]2.54TYP

[2.54 ±0.20]

TO-220

Dimensions in Millimeters

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY

PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY

LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;

NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR

CORPORATION.

As used herein:

1. Life support devices or systems are devic es or syst em s

which, (a) ar e intended for surgical implant into the body,

or (b) support or sustain life, or (c) whose failure to perform

when properly used in accordance with instructions for use

provided in the labeling, can be reasonably expected to

result in significant injury to the user.

2. A critical component is any component of a life support

device or system whose failure to perform can be

reasonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or In

Design This datasheet contains the design specifications for

product development. Specifications may change in

any manner without notice.

Preliminary First Production T his dat asheet contains preliminary data, and

supplementary data will be published at a later date.

Fairchild Semiconduct or reserv es the right to make

changes at any time without notice in order to improve

design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild

Semiconductor reserves the right to make changes at

any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.

The datasheet is printed for reference information only.

Rev. I2

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