1
®
FN7294
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 |Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2003. All Rights Reserved. Elantec is a registered trademark of Elantec Semiconductor, Inc.
All other trademarks mentioned are the property of their respective owners.
EL7560
Programmable CPU Power Supply Unit
The EL7560 is the simplest, most cost
effective method for powering modern
high power CPUs which require a user
adjustable output voltage. Although it is particularly designed
to function with next generation CPUs, its simple design can
provide low cost solutions for any 5V to 3V application.
The circuit uses on chip resistorless current sensing for high
efficiency, stable current mode control. An on chip
temperature sensor resets the OT pin. The OT pin can be
tied directly to the OUTEN pin for automatic overtemperature
shutdown. The user can adjust the oscillator frequency as
well as the slope compensation.
The output voltage is adjustable using a 4-bit parallel
interface. A power OK signal "PWRGD' pulls high when the
FB pin is within -7% of the programmed value.
Pinout
EL7560
(28-PIN SOIC)
TOP VIEW
Features
• 3.3V @ 12.4amps continuous
• Internal FETs
• >90% efficiency
• Synchronous switching
• 4-bit digitally adjustable output voltage
• User adjustable slope compensation
• Internal soft start
• Over temperature indicator
• Low current sleep mode
• Low parts count
• Pulse by pulse current limiting
• High efficiency at light load
• Operates up to 1MHz
• 1% output accuracy
• Sync function
• Power good signal
Applications
• PC motherboards
• Local high power CPU supplies
1
2
3
4
16
1514
13
5
6
7
12
11
9
8
10
20
19
18
17
24
23
22
21
28
27
26
25
FBCP-
CREFCP+
CSLOPEC2V
COSCVSS
VDDVHI
VINLX
VSSPLX
VINLX
VSSPLX
VSSPLX
VID0TEST
VID1PWRGD
VID2OT
VID3OUTEN
+10V
D2
D1 R1
100
C7
+5V
4mF
C10
30Ω
1µF
C11
68p
D3
R3
1K
2.5µH
L1
VOUT
.1µF
C6
4.7µF
C8
5V
R2
10K
+2V - 3.5V
1µF
C5
PGND
L2
1.5µH
5V
C1
OUTPUT
VO LTAGE*
SELECT
C9
2mF.1µF
C4
220p
ACND
10Ω
.1µF
* See VID Table on page 3
Note:
• AGND and PGND should be connected at C10
• D3 is 1.235V reference.
Ordering Information
PART
NUMBER TEMP. RANGE PACKAGE PKG. NO.
EL7560CM -40°C to +85°C 28-Pin SOIC MDP0027
Data Sheet August 21, 1998
OBSOLETE PRODUCT
NO RECOMMENDED REPLACEMENT
contact our Technical Support Center at
1-888-INTERSIL or www.intersil.com/tsc
2
NOTE:
1. The oscillator and voltage doubler operate normally when VDD exceeds VDD-ON threshold, independent of the OUTEN logic level.
Absolute Maximum Ratings (TA = 25°C)
Supply (VIN, VDD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5V
Output Pins . . . . . . . . . . . . . . . -0.3V below GND, +0.3V above VDD
Instantaneous Peak Output Current . . . . . . . . . . . . . . . . . . . . . .16A
Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C
Ambient Operating Temperature . . . . . . . . . . . . . . . .-40°C to +85°C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 135°C
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3W
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
DC Electrical Specifications VDD = VIN = 5V, COSC = 1nF, CSLOPE = 68pF, TA = 25°C, unless otherwise specified (Note 1)
PARAMETER DESCRIPTION CONDITION MIN TYP MAX UNITS
V2X Voltage Doubler Output VDD=5V, ILOAD=20mA 8.0 9 9.5 V
DACLSB DAC Resolution 0.095 0.105 V
FOSC Oscillator Initial Accuracy 105 120 135 kHz
FOSCTC Oscillator Tempco 0°C<TA<125°C ±0.1 %/°C
VRAMP Oscillator Ramp Amplitude 1.2 V
MSS Soft Start Slope FOSC=500kHz 0.3 V/msec
IVID VID Pull Up Current VID = 0V 9 13 18 µA
ICSLOPE CSLOPE Charging Current 32 40 48 µA
IDD Supply Current OUTEN=4V FOSC=120kHz 25 35 mA
IDDOFF Stdby Current OUTEN=0V 3 5 mA
RDSON Composite FET Resistance 18 25 mΩ
RDSONTC RDSON Tempco 0.1 mΩ/°C
VOUT Output Initial Acurracy VID=0111 2.765 2.8 2.835 V
VRANGE Output Voltage Range VID=1110 to 0000 2.065 3.535 V
ILMAX Maximum current VOUT=0 14.0 amps
VOUT-TC Output Tempco 0°C<TA<70°C ±1 %
VOUT-LINE Output Line Regulation VOUT=2.8, 4.5VDD<5.5, VDD=VIN -1 1 %
VOUT-LOAD Output Load Regulation 0.3A<ILOAD<12.4A -1 1 %
VOUT-TOT Output Total Variation -2 2 %
OTOFF Over Temperature Threshold 135 °C
OTHYS Over Temperature Hysteresis 50 °C
VPWRGD Power Good Threshold with Respect to
Desired OutputVoltage
VID=0111 -9 -7 -5 %
VDD-ON Minimum VDD form Startup 4V
VDD-OFF Maximum VDD for Shutdown 3.75 V
EL7560
3
Voltage Identification Codes
P6 PINS
VID0 VDC
VID3 VID2 VID1
1 1 1 1 0, No CPU
11102.1
11012.2
11002.3
10112.4
10102.5
10012.6
10002.7
01112.8
01102.9
01013.0
01003.1
00113.2
00103.3
00013.4
00003.5
EL7560
4
NOTE:
1. The oscillator and voltage doubler operate normally when VDD exceeds VDD-ON threshold, independent of the OUTEN logic level.
EL7560 Pin Descriptions
PIN
NUMBER NAME DESCRIPTION
1C
P- Negative input for the charge pump bootstrap capacitor. (Note 1)
2C
P+ Positive input for the charge pump bootstrap capacitor. (Note 1)
3 C2V Voltage doubler output. Pin requires at least a 1µF capacitor to GND. (Note 1)
4V
SS Ground return for the control circuitry.
5V
HI Positive supply for the high side driver. This pin is bootstrapped from the LX pin with a 0.1µF capacitor.
6 LX Common connection between the two large internal FETs. External inductor connection.
7 LX Same as pin 6.
8 LX Same as pin 6.
9 LX Same as pin 6.
10 LX Same as pin 6.
11 TEST This is test pin and must remain grounded at all times
12 PWRGD Pin pulls high when the FB pin is within - 7%(typ) of its programmed value.
13 OT Overtemperature indicator. Pulls low when the die temperature exceeds 135°C. Pin has 10mA pull-up.
14 OT A logic high on OUTEN enables the regulator (Note 1)
15 VID3 Bit 3(MSB) of the output voltage select DAC.
16 VID2 Bit 2 of the output voltage select DAC.
17 VID1 Bit 1 of the output voltage select DAC.
18 VID0 Bit 0(LSB) of the output voltage select DAC.
19 VSSP Ground return to the buck regulator.
20 VSSP Same as pin 19.
21 VIN Positive power supply input to the buck regulator.
22 VSSP Same as pin 19.
23 VIN Same as pin 21.
24 VDD Pin supplies power to the internal control circuitry.
25 COSC Oscillator timing capacitor. Oscillator Frequency is approximately: FOSC(Hz)=0.0001/COSC(F). The duty cycle is
approximately 5%. (Note 1)
26 CSLOPE Slope compensation capacitor.
27 CREF External reference input pin.
28 FB Voltage feedback pin for the buck regulator.
EL7560
5
Typical Performance Curves
IDD vs VDD
5
35
30
25
20
15
10
0
IDD (mA)
VDD (V)
163245
Oscillator Frequency vs COSC
100
10000
1000
10
Frequency (kHz)
COSC (pF)
10 10000100 1000
ILine Regulation (VID3:0=0000)
3.475
3.545
3.535
3.525
3.515
3.505
3.495
3.485
3.465
VOUT (V)
VIN (V)
4.4 5.0 5.64.6 4.8 5.2 5.4
IOUT = 0.3A
TA=25°C
Load Regulation (VID3:0=0000)
3.47
3.54
3.53
3.52
3.51
3.50
3.49
3.48
3.46
VOUT (V)
IOUT (A)
061224 810
VIN=5V
TA=25°C
Line Regulation (VID3:0=1101)
2.17
2.23
2.22
2.21
2.20
2.19
2.18
2.16
VOUT (V)
VIN (V)
4.4 5.0 5.64.64.8 5.25.4
TA=25°C
IOUT = 4A
IOUT = 8A
IOUT = 11A
IOUT = 0.3A
IOUT = 4A
IOUT = 8A
IOUT = 11A
Load Regulation (VID3:0=1101)
2.17
2.25
2.23
2.21
2.19
2.15
VOUT (V)
IOUT (A)
0612
24 810
VIN=5V
TA=25°C
EL7560
6
Typical Performance Curves (Continued)
VOUT vs CSLOPE
0
6
5
4
3
2
1
-1
VOUT (%)
CSLOPE (pF)
025010050 150 200
VOUT vs CSLOPE
0
6
5
4
3
2
1
-1
VOUT (%)
CSLOPE (pF)
025010050 150 200
DVOUT (%)
DVOUT (%)
DVOUT (%)
Load Reg (%)
Line Reg (%)
Load Reg (%)
Line Reg (%)
Load Reg (%)
Line Reg (%)
RDSON vs Temp
27
39
37
35
33
31
29
25
RDSON (mΩ)
Temperature(°C)
20 1608040 120 14060 100
y = 0.1006x + 23.766
Efficiency vs Output Current
65
95
90
85
80
75
70
60
Eficiency (%)
IOUT
0.3 12.4
4
1811.2
3.5V
3.1V
35
2
2.1V
Transient Load Step
0.3Amp to 12.4Amp
20mV/div
VOUT
Switching Waveforms ILOAD = 2A
2V/div
V(LX)
VOUT
20mV/div
EL7560
7
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
EL7560 Functional Block Diagram
Thermal considerations and power dissipation:
To achieve the maximum 12.4A continuous output current,
the EL7560 is packaged in a 28 pin HSOP (Heat-Slug SO
Package). Within the package, the EL7560 die is attached to
one side of a copper slug. The other side of the slug is
coincident with the package top surface, and is therefore
exposed to the ambient environment. The copper slug
provides an exceptionally low thermal resistance (θJC) of
typically 7°C/W. To obtain low junction to ambient thermal
resistance (θJA), a heatsink is required to provide heat
transfer path from the die to the ambient. The EL7560 power
dissipation is a direct function of the “on” resistance of the
internal power FETs (Rds-on) and the output current. For the
maximum 12.4A output current and the worse case Rds-on
at 125°C (35mΩ), the power dissipation is Iout2*R = 5.38W.
To maintain 12.4A continuous output current operation at the
maximum 70°C ambient temperature, the die temperature
must be kept below the 135°C thermal shut down
temperature. This requires a θJA of 12°C/W. To help achieve
such a low θJA with practical size heatsink, airflow is also
required. Application note #13 shows the 11°C/W thermal
resistance can be achieved with the Wakefield heatsink
#8052-60 and minimum 200LFM airflow.
-
+
-
+
-
+
-
+
-
+
-
+
-
+
Σ
-
+
ISLOPE
VID [0:3], Pin
15,16,17,18
CSLOPE, Pin 26
CREF, Pin 27
DAC
VDD
4V
UVLO
V2X
RSS
COSC, Pin 25
VDD
VDD
CSS
Zero Cross Detect
To VOUT FB, Pin 28
LEB TDELAY
Over Temp Sensor
Q
Q
R
S
FF
R
S
Cp-, Pin 1 Cp+, Pin 2
C2V, Pin 3
VHI, Pin 5
VDD and VIN,
Pin 21,23,24
LX,
Pin 6,7,8,9,10
VSSP, Pin
19,20,21
OT, Pin 13
VSS, Pin 4
S
R
OUTEN, Pin 14
PWRGD, Pin 12
EL7560
