July 2002
2002 Fairc hild Semiconduct or Cor por ation BSS84 Rev B(W)
BSS84
P-Channel Enhancement Mode Field Effect Transistor
General Description
These P-Channel enhanc ement mode field eff ect
transistors are produced using Fairchild’ s proprietary,
high cell density, DMOS t echnology. This very hi gh
density process has been designed to minimize on-
state resistance, provide rugged and reliable
performance and fast switching. They can be used, with
a mini mum of effort, i n most appli cations requiring up to
0.13A DC and can del i ver current up to 0.52A .
This product is particularly suited to low voltage
applicat i ons requiring a low current high s i de switch.
Features
• −0.13A, −50V. RDS(ON) = 10Ω @ VGS = −5 V
• Voltage c ontrolled p-channel s mall si gnal switch
• High densit y cell design for low RDS(ON)
• High saturation current
G
D
S
SOT-23
D
SG
Absolute Maximum Ratings TA=25oC unless otherwise noted
Symbol Parameter Ratings Units
VDSS Drain-Source V ol tage −50 V
VGSS Gate-Source Voltage ±20 V
ID Drain Current – Continuous (Note 1) −0.13 A
– Pulsed −0.52
Maximum Power Dissipat i on (Note 1) 0.36 W
PD Derate Above 25°C 2.9 mW/°C
TJ, TSTG Operating and St orage Junction Temperature Range −55 to +150 °C
TL Maximum Lead Temperature for Sol deri ng
Purposes , 1/16” from Case for 10 Seconds 300
Thermal Characteristics
RθJA Thermal Resistance, Junction-to-Ambient (Note 1) 350 °C/W
Package Marking and Ordering Information
Device Marki ng Device Reel Siz e Tape width Quantity
SP BSS84 7’’ 8mm 3000 units
BSS84
BSS84 Rev B(W)
Electrical Characteristics TA = 25°C unless otherwise noted
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BVDSS Drain–Sourc e Breakdown Voltage VGS = 0 V, ID = –250 µA –50 V
∆BVDSS
∆TJ Breakdown Voltage Temperature
Coefficient ID = –250 µA,Referenced to 25°C
–48 mV/°C
IDSS Zero Gate Volt age Drai n Current VDS = –50 V, VGS = 0 V –15 µA
VDS = –50 V,VGS = 0 V T J = 125°C –60
µA
IGSS Gate–Body Leakage. VGS = ±20 V, V DS = 0 V
±10 nA
On Characteristics (Note 2)
VGS(th) Gate Threshold Voltage VDS = VGS, ID = –1 mA –0.8 –1.7 –2 V
∆VGS(th)
∆TJ Gate Threshold Vol tage
Temperat ure Coef ficient ID = –1 mA, Ref erenced to 25°C
3
mV/°C
RDS(on) Static Drain–Source
On–Resistance VGS = –5 V, I D = –0.10 A
VGS = –5 V,ID = –0.10 A , T J=125°C 1.2
1.9 10
17 Ω
ID(on) On–State Drai n Current VGS = –5 V, VDS = – 10 V –0.6 A
gFS Forward Transconductance VDS = –25V, ID = – 0.10 A 0.05 0.6 S
Dynamic Characteristics
Ciss Input Capacitance 73 pF
Coss Output Capacitance 10 pF
Crss Reverse Transfer Capacitance
VDS = –25 V, V GS = 0 V,
f = 1.0 MHz 5 pF
RG Gate Resistance VGS = –15 mV , f = 1.0 MHz 9 Ω
Switching Characteristics (Note 2)
td(on) Turn–On Delay Time 2.5 5 ns
tr Turn–On Rise Time 6.3 13 ns
td(off) Turn–Off Delay Time 10 20 ns
tf Turn–Off Fall Time
VDD = –30 V, ID = – 0.27A,
VGS = –10 V, RGEN = 6 Ω
4.8 9.6 ns
Qg Total Gate Charge 0.9 1.3 nC
Qgs Gate–Source Charge 0.2 nC
Qgd Gate–Drain Charge
VDS = –25 V, ID = –0.10 A,
VGS = –5 V
0.3 nC
Drain–Source Diode Characteristics and Maximum Ratings
IS Maximum Cont i nuous Drain–Source Diode Forward Current –0.13 A
VSD Drain–Source Diode Forward
Voltage VGS = 0 V, IS = –0.26 A(Note 2) –0.8 –1.2 V
trr Diode Reverse Recovery Ti me 10 nS
Qrr Diode Reverse Rec overy Charge IF = –0.10A
diF/dt = 100 A/µs (Note 2) 3 nC
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.
a) 350°C/W when mounted on a
minimum pad..
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0%
BSS84
BSS84 Rev B(W)
Typical Characteristics
0
0.2
0.4
0.6
0.8
1
012345
-VDS, DR AIN TO SOURCE VOL T AGE (V)
-I
D
, DRAIN CURRENT (A)
VGS = -5V -4.5V -3.5V
-3.0V
-2.5V
0.8
1
1.2
1.4
1.6
1.8
2
0 0.2 0.4 0.6 0.8 1
-ID, DRAIN CURRENT (A)
R
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
VGS=-3.0V
-4.0V -5.0V
-4.5V
-3.5V
Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
-50 -25 0 25 50 75 100 125 150
TJ, JUNCTION TEMP E RATURE (oC)
R
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANC
E
ID = -0.10A
VGS = -5V
1
2
3
4
5
2 2.5 3 3.5 4 4.5 5
-VGS, GATE TO SOURCE VOL T AGE (V)
R
DS(ON)
, ON-RESISTANCE (OHM)
ID = -0.05A
TA = 125oC
TA = 25oC
Figure 3. On-Resistance Variation with
Temperature. Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
0
0.2
0.4
0.6
0.8
1
1 1.5 2 2.5 3 3.5 4
-VGS, GATE TO SOURCE VOLTAGE (V)
-I
D
, DRAIN CURRENT (A)
TA = -55oC25oC
125oC
VDS = -5V
0.0001
0.001
0.01
0.1
1
0.0 0.2 0.4 0.6 0.8 1.0 1.2
-VSD, BODY DIODE FORWARD VOLTAGE (V)
-I
S
, REVERSE DRAIN CURRENT (A
)
VGS = 0V
TA = 125oC
25oC
-55oC
Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
BSS84
BSS84 Rev B(W)
Typical Characteristics
0
1
2
3
4
5
0 0.2 0.4 0.6 0.8 1
Qg, GATE CHARGE (nC)
-V
GS
, GATE-SOURCE VOLTAGE (V)
ID = -0.10A VDS = -8V -25V
-30V
0
20
40
60
80
100
0 1020304050
-VDS, DRAIN TO SOURCE VOLTAGE (V)
CAPACITANCE (pF)
CISS
COSS
CRSS
f = 1 MHz
VGS = 0 V
Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics.
0.001
0.01
0.1
1
110100
-VDS, DRAIN-SOURCE VOLTAGE (V)
-I
D
, DRAIN CURRENT (A)
DC
10s
1s
100ms
RDS(ON) LIMIT
VGS = -5V
SINGLE PULSE
RθJA = 350oC/W
TA = 25oC
10ms 1ms 100us
0
1
2
3
4
5
0.01 0.1 1 10 100
t1, TIME (sec)
P(pk), PEAK TRANSIENT POWER (W)
SINGLE PULSE
RθJA = 350°C/W
TA = 25°C
Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum
Power Dissipation.
0.001
0.01
0.1
1
0.0001 0.001 0.01 0.1 1 10 100 1000
t
1
,
TIME
(sec)
r(t), NORM ALIZED EFFECTIV E TRANSIEN
T
THERMAL RESISTANCE
RθJA(t) = r(t) * RθJA
RθJA = 350oC/W
TJ - TA = P * RθJA(t)
Duty Cycle, D = t1 / t2
P
(p
k
)
t1t2
SINGLE PULSE
0.01
0.02
0.05
0.1
0.2
D = 0.5
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1a.
Transient thermal response will change depending on the circuit board design.
BSS84
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
LIFE SUPPORT POLICY
FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Formative or
In Design
First Production
Full Production
Not In Production
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