VIN
GND
EN
FB
SW
TPS62260DRV L
R1
R2
C
10 F
OUT
m
V
OUT
MODE
C
4.7 F
IN
m
2.2 Hm
C
22pF
1
V =2Vto6V
IN Upto600mA
0
10
20
30
40
50
60
70
80
90
100
0.01 0.1 1 10 100 1000
I -OutputCurrent-mA
O
Efficiency-%
V =2.3V
IN
V =2.7V
IN
V =3V
IN
V =3.6V
IN
V =4.5V
IN
V =1.8V,
MODE=GND,
L =2.2 H,
DCR110mR
OUT
m
TPS62260, TPS62261
TPS62262, TPS62263
www.ti.com
SLVS763D –JUNE 2007–REVISED FEBRUARY 2011
2.25 MHz 600 mA Step Down Converter in 2x2 QFN / TSOT-23 Package
Check for Samples: TPS62260,TPS62261,TPS62262,TPS62263
1FEATURES DESCRIPTION
2•High Efficiency Step-Down Converter
•Output Current up to 600 mA The TPS62260 device is a highly efficient
synchronous step down dc-dc converter optimized for
•VIN Range from 2 V to 6 V for Li-ion Batteries battery powered applications. It provides up to
with Extended Voltage Range 600-mA output current from a single Li-Ion cell and is
•2.25 MHz Fixed Frequency Operation ideal to power mobile phones and other portable
•Power Save Mode at Light Load Currents applications.
•Output Voltage Accuracy in PWM mode ±1.5% With an wide input voltage range of 2 V to 6 V, the
device supports applications powered by Li-Ion
•Typ. 15 μA Quiescent Current batteries with extended voltage range, two and three
•100% Duty Cycle for Lowest Dropout cell alkaline batteries, 3.3 V and 5 V input voltage
•Soft Start rails.
•Voltage Positioning at Light Loads The TPS62260 operates at 2.25 MHz fixed switching
•Available in a small 2×2×0.8mm QFN and frequency and enters Power Save Mode operation at
TSOT-23 package light load currents to maintain high efficiency over the
entire load current range.
•Allows <1mm Solution Height The Power Save Mode is optimized for low output
APPLICATIONS voltage ripple. For low noise applications, the device
can be forced into fixed frequency PWM mode by
•PDAs, Pocket PCs pulling the MODE pin high. In the shutdown mode,
•Low Power DSP Supply the current consumption is reduced to less than 1μA.
•Portable Media Players TPS62260 allows the use of small inductors and
•POL applications capacitors to achieve a small solution size.
The TPS62260 is available in a very small 2×2 6 pin
QFN and TSOT-23 5 pin package.
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2PowerPAD is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date. ©2007–2011, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
TPS62260, TPS62261
TPS62262, TPS62263
SLVS763D –JUNE 2007–REVISED FEBRUARY 2011
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION
OUTPUT PACKAGE PACKAGE
TAPART NUMBER PACKAGE(2) MODE PIN
VOLTAGE(1) DESIGNATOR MARKING
QFN 2x2-6 DRV Yes BYK
TPS62260 Adjustable TSOT-23 5 DDC No, PFM/PWM BYP
auto transition
TPS62261 1.8V fixed QFN 2x2-6 DRV Yes BYL
–40°C to 85°CQFN 2x2-6 DRV Yes BYM
TPS62262 1.2V fixed TSOT-23 5 DDC No, PFM/PWM QXS
auto transition
TPS62263 2.5V fixed QFN 2x2-6 DRV Yes CFX
(1) Contact TI for other fixed output voltage options
(2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)(1)
VALUE UNIT
Input voltage range(2) –0.3 to 7
Voltage range at EN, MODE –0.3 to VIN +0.3, ≤7 V
Voltage on SW –0.3 to 7
Peak output current Internally limited A
HBM Human body model 2 kV
ESD rating(3) CDM Charge device model 1
Machine model 200 V
TJMaximum operating junction temperature –40 to 125 °C
Tstg Storage temperature range –65 to 150 °C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal.
(3) The human body model is a 100-pF capacitor discharged through a 1.5-kΩresistor into each pin. The machine model is a 200-pF
capacitor discharged directly into each pin.
DISSIPATION RATINGS
PACKAGE RθJA POWER RATING FOR TA≤25°C DERATING FACTOR ABOVE TA= 25°C
DRV 76°C/W 1300 mW 13 mW/°C
DDC 250/°C 400 mW 4 mW/°C
RECOMMENDED OPERATING CONDITIONS MIN NOM MAX UNIT
VIN Supply voltage 2 6 V
Output voltage range for adjustable voltage 0.6 VIN V
TAOperating ambient temperature –40 85 °C
TJOperating junction temperature –40 125 °C
2Submit Documentation Feedback ©2007–2011, Texas Instruments Incorporated
Product Folder Link(s): TPS62260 TPS62261 TPS62262 TPS62263
TPS62260, TPS62261
TPS62262, TPS62263
www.ti.com
SLVS763D –JUNE 2007–REVISED FEBRUARY 2011
ELECTRICAL CHARACTERISTICS
Over full operating ambient temperature range, typical values are at TA= 25°C. Unless otherwise noted, specifications apply
for condition VIN = EN = 3.6V. External components CIN = 4.7μF 0603, COUT = 10μF 0603, L = 2.2μH, see the parameter
measurement information.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY
VIN Input voltage range 2.3 6 V
VIN 2.5 V to 6 V 600
IOUT Output current VIN 2.3 V to 2.5 V 300 mA
VIN 2 V to 2.3 V 150
IOUT = 0 mA, PFM mode enabled 15
(MODE = GND) device not switching
μA
IOUT = 0 mA, PFM mode enabled
(MODE = GND) device switching, VOUT = 1.8 V, 18.5
IQOperating quiescent current See (1)
IOUT = 0 mA, switching with no load
(MODE = VIN), PWM operation, VOUT = 1.8 V, 3.8 mA
VIN = 3 V
ISD Shutdown current EN = GND 0.1 1 μA
Falling 1.85
UVLO Undervoltage lockout threshold V
Rising 1.95
ENABLE, MODE
High level input voltage, EN, 2 V ≤VIN ≤6 V 1 VIN
VIH V
MODE
Low level input voltage, EN, 2 V ≤VIN ≤6 V 0 0.4
VIL V
MODE
IIN Input bias current, EN, MODE EN, MODE = GND or VIN 0.01 1 μA
POWER SWITCH
High side MOSFET on-resistance 240 480
RDS(on) VIN = VGS = 3.6 V, TA= 25°C mΩ
Low side MOSFET on-resistance 185 380
Forward current limit MOSFET
ILIMF VIN = VGS = 3.6 V 0.8 1 1.2 A
high-side and low side
Thermal shutdown Increasing junction temperature 140
TSD °C
Thermal shutdown hysteresis Decreasing junction temperature 20
OSCILLATOR
fSW Oscillator frequency 2 V ≤VIN ≤6 V 2 2.25 2.5 MHz
OUTPUT
VOUT Adjustable output voltage range 0.6 VIN V
Vref Reference voltage 600 mV
MODE = VIN, PWM operation, for fixed output
Feedback voltage PWM Mode voltage versions VFB = VOUT,–1.5% 0% 1.5%
2.5 V ≤VIN ≤6 V, 0 mA ≤IOUT ≤600 mA (2)
VFB MODE = GND, device in PFM mode, voltage
Feedback voltage PFM mode 1%
positioning active(1)
Load regulation PWM Mode -0.5 %/A
Time from active EN to reach 95% of VOUT 500
tStart Up Start-up time μs
nominal
tRamp VOUT ramp up time Time to ramp from 5% to 95% of VOUT 250 μs
Ilkg Leakage current into SW pin VIN = 3.6 V, VIN = VOUT = VSW, EN = GND (3) 0.1 1 μA
(1) In PFM mode, the internal reference voltage is set to typ. 1.01×Vref. See the parameter measurement information.
(2) For VIN = VO+ 0.6 V
(3) In fixed output voltage versions, the internal resistor divider network is disconnected from FB pin.
©2007–2011, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Link(s): TPS62260 TPS62261 TPS62262 TPS62263
VIN
GND
EN
SW
FB
1
2
3
5
4
DDCPACKAGE
(TOP VIEW)
DRV PACKAGE
(TOPVIEW)
MODE
FB
GNDSW
EN
VIN
1
2
3
6
5
4
r
Powe PAD
Zero-Pole
Amp.
Integrator
Error Amplifier
+1% Voltagepositioning
PWM
Comp.
VREF
Control
Stage
GateDriver
Anti-
Shoot-Through
Current-
LimitComparator
Current-
LimitComparator
VREF +1%
FB
FB
VIN
GND
MODE
2.25-MHz
Oscillator
SW1
EN
VIN
Softstart
VOUT RAMP
CONTROL
Thermal
Shutdown
.6
Reference
0 VVREF
Undervoltage
Lockout 1.8 V Limit
HighSide
Limit
LowSide
Sawtooth
Generator
Int. Resistor
Network
FB
RI3
RI 1
RI..N
MODE
Onlyin 2x2SON
GND
PFMComparator
TPS62260, TPS62261
TPS62262, TPS62263
SLVS763D –JUNE 2007–REVISED FEBRUARY 2011
www.ti.com
PIN ASSIGNMENTS
TERMINAL FUNCTIONS
TERMINAL
NO. I/O DESCRIPTION
NO.
NAME QFN TSOT23-5
2x2-6
VIN 5 1 PWR VIN power supply pin.
GND 6 2 PWR GND supply pin
This is the enable pin of the device. Pulling this pin to low forces the device into shutdown
EN 4 3 I mode. Pulling this pin to high enables the device. This pin must be terminated.
This is the switch pin and is connected to the internal MOSFET switches. Connect the
SW 1 5 OUT external inductor between this terminal and the output capacitor.
Feedback Pin for the internal regulation loop. Connect the external resistor divider to this pin.
FB 3 4 I In case of fixed output voltage option, connect this pin directly to the output capacitor
This pin is only available at QFN package option. MODE pin = high forces the device to
MODE 2 I operate in fixed frequency PWM mode. MODE pin = low enables the Power Save Mode with
automatic transition from PFM mode to fixed frequency PWM mode.
FUNCTIONAL BLOCK DIAGRAM
4Submit Documentation Feedback ©2007–2011, Texas Instruments Incorporated
Product Folder Link(s): TPS62260 TPS62261 TPS62262 TPS62263
VIN
GND
EN
FB
SW
TPS62260DVR
R1
R2
VOUT
MODE
C
4.7 F
IN
m
L
2.2 Hm
C
22pF
1C
10 F
OUT
m
L:LPS30152.2 H,110m
C GRM188R60J475K4.7 FMurata0603size
C
m W
m
IN
OUT GRM188R60J106M10 FMurata0603sizem
TPS62260, TPS62261
TPS62262, TPS62263
www.ti.com
SLVS763D –JUNE 2007–REVISED FEBRUARY 2011
PARAMETER MEASUREMENT INFORMATION
TYPICAL CHARACTERISTICS
Table 1. Table of Graphs
FIGURE
Output Current VOUT = 1.8 V, Power Save Mode, MODE = GND Figure 1
Output Current VOUT = 1.8 V, PWM Mode, MODE = VIN Figure 2
Output Current VOUT = 3.3 V, PWM Mode, MODE = VIN Figure 3
ηEfficiency Output Current VOUT = 3.3 V, Power Save Mode, MODE = GND Figure 4
Output Current Figure 5
Output Current Figure 6
at 25°C, VOUT = 1.8 V, Power Save Mode, MODE = GND Figure 7
at –40°C, VOUT = 1.8 V, Power Save Mode, MODE = GND Figure 8
at 85°C, VOUT = 1.8 V, Power Save Mode, MODE = GND Figure 9
Output Voltage Accuracy at 25°C, VOUT = 1.8 V, PWM Mode, MODE = VIN Figure 10
at –40°C, VOUT = 1.8 V, PWM Mode, MODE = VIN Figure 11
at 85°C, VOUT = 1.8 V, PWM Mode, MODE = VIN Figure 12
Typical Operation PWM Mode, VOUT = 1.8 V Figure 13
MODE Pin Transition From PFM to PWM Mode at light load Figure 14
Mode Transition MODE Pin Transition From PWM to PFM Mode at light load Figure 15
Start-up Timing Figure 16
Forced PWM Mode , VOUT = 1.5 V, 50 mA to 200 mA Figure 17
Forced PWM Mode , VOUT = 1.5 V, 200 mA to 400 mA Figure 18
PFM Mode to PWM Mode, VOUT = 1.5 V, 150 μA to 400 mA Figure 19
PWM Mode to PFM Mode, VOUT = 1.5 V, 400 mA to 150 μAFigure 20
Load Transient PFM Mode, VOUT = 1.5 V, 1.5 mA to 50 mA Figure 21
PFM Mode, VOUT = 1.5 V, 50 mA to 1.5 mA Figure 22
PFM Mode to PWM Mode, VOUT = 1.8 V, 50 mA to 250 mA Figure 23
PFM Mode to PWM Mode, VOUT = 1.5 V, 50 mA to 400 mA Figure 24
PWM Mode to PFM Mode, VOUT = 1.5 V, 400 mA to 50 mA Figure 25
PFM Mode, VOUT = 1.8 V, 50 mA Figure 26
Line Transient Forced PWM Mode, VOUT = 1.8 V, 250 mA Figure 27
PFM VOUT Ripple, VOUT = 1.8 V, 10 mA, L = 2.2μH, COUT = 10μFFigure 28
Typical Operation PFM VOUT Ripple, VOUT = 1.8 V, 10 mA, L = 4.7μH, COUT = 10μFFigure 29
Shutdown Current into VIN vs Input Voltage, (TA= 85°C, TA= 25°C, TA= -40°C) Figure 30
Quiescent Current vs Input Voltage, (TA= 85°C, TA= 25°C, TA= -40°C) Figure 31
©2007–2011, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Link(s): TPS62260 TPS62261 TPS62262 TPS62263
0
10
20
30
40
50
60
70
80
90
100
1 10 100 1000
I -OutputCurrent-mA
O
h-Efficiency-%
V =2.3V
IN
V =2.7V
IN
V =3V
IN V =3.6V
IN
V =4.5V
IN
V =1.8V,
MODE=V ,
L =2.2 H
OUT
IN
m
0
10
20
30
40
50
60
70
80
90
100
0.01
0.1
1
10
100
1000
I -OutputCurrent-mA
O
Efficiency-%
V =1.8V
MODE=GND
L =2.2 H
DCR110mR
OUT
m
0
10
20
30
40
50
60
70
80
90
100
1 10 100 1000
I – OutputCurrent – mA
OUT
V =3.3V
MODE=V
L =2.2 H
DCR110m
C =10 F0603
OUT
IN
OUT
m
W
m
h– Efficiency – %
V =3.6V
IN
V =4.2V
IN
V =4.5V
IN
V =5V
IN
TPS62260, TPS62261
TPS62262, TPS62263
SLVS763D –JUNE 2007–REVISED FEBRUARY 2011
www.ti.com
TYPICAL CHARACTERISTICS (continued)
Table 1. Table of Graphs (continued)
FIGURE
Figure 32
Static Drain Source On-State vs Input Voltage, (TA= 85°C, TA= 25°C, TA= -40°C)
Resistance Figure 33
EFFICIENCY (Power Save Mode) EFFICIENCY (PWM Mode)
vs vs
OUTPUT CURRENT OUTPUT CURRENT
Figure 1. Figure 2.
EFFICIENCY (PWM Mode) EFFICIENCY (Power Save Mode)
vs vs
OUTPUT CURRENT OUTPUT CURRENT
Figure 3. Figure 4.
6Submit Documentation Feedback ©2007–2011, Texas Instruments Incorporated
Product Folder Link(s): TPS62260 TPS62261 TPS62262 TPS62263
I − OutputCurrent − mA
O
0
10
20
30
40
90
100
1 10 100 1000
Efficiency − %
50
60
V =2.3V
IV =2.3V
I
V =2.7V
I
V =3.6V
I
V =4.5V
I
V =1.2V,
MODE=V ,
L =2 H,
MIPSA2520
C =10 F0603
O
I
O
m
m
70
80
I − OutputCurrent − mA
O
0
10
20
30
40
90
100
0.01 0.1 100 1000
Efficiency − %
50
60
V =2.3V
I
V =2.7V
I
V =3.6V
I
V =4.5V
I
V =1.2V
MODE=GND
L =2 H
MIPSA2520
C =10 F0603
O
O
m
m
70
80
101
1.74
1.76
1.78
1.8
1.82
1.84
1.86
1.88
PFMMode,VoltagePositioning
V – OutputVoltageDC – V
O
0.01
0.1
1
10
100
1000
I – OutputCurrent – mA
O
T =25°C
V =1.8V
MODE=GND
L =2.2 H
C =10 F
A
OUT
O
m
m
1.74
1.76
1.78
1.8
1.82
1.84
1.86
1.88
V – OutputVoltageDC – V
O
0.01
0.1
1
10
100
1000
I – OutputCurrent – mA
O
T = –40 C
V =1.8V
MODE=GND
L =2.2 H
C =10 F
A
OUT
O
°
m
m
TPS62260, TPS62261
TPS62262, TPS62263
www.ti.com
SLVS763D –JUNE 2007–REVISED FEBRUARY 2011
EFFICIENCY EFFICIENCY
vs vs
OUTPUT CURRENT OUTPUT CURRENT
Figure 5. Figure 6.
OUTPUT VOLTAGE ACCURACY OUTPUT VOLTAGE ACCURACY (Power Save Mode)
vs vs
OUTPUT CURRENT OUTPUT CURRENT
Figure 7. Figure 8.
©2007–2011, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Link(s): TPS62260 TPS62261 TPS62262 TPS62263
1.746
1.764
1.782
1.8
1.818
1.836
1.854
V -OutputVoltageDC-V
O
0.01 0.1 1 10 100 1000
I -OutputCurrent-mA
O
V =2.3V
IN
V =2.7V
V =3V
V =3.6V
V =4.5V
IN
IN
IN
IN
T =25°C,
V =1.8V,
MODE=V ,
L =2.2 H
A
OUT
IN
m
1.74
1.76
1.78
1.8
1.82
1.84
1.86
1.88
V – OutputVoltageDC – V
O
0.01
0.1
1
10
100
1000
I – OutputCurrent – mA
O
T =85 C
V =1.8V
MODE=GND
L =2.2 H
C =10 F
A
OUT
O
°
m
m
1.746
1.764
1.782
1.8
1.818
1.836
1.854
V -OutputVoltageDC-V
O
0.01 0.1 1 10 100 1000
I -OutputCurrent-mA
O
V =2V
IN
V =2.7V
V =3V
V =3.6V
V =4.5V
IN
IN
IN
IN
T =-40°C,
V =1.8V,
MODE=V ,
L =2.2 H
A
OUT
IN
m
1.746
1.764
1.782
1.8
1.818
1.836
1.854
V -OutputVoltageDC-V
O
0.01 0.1 1 10 100 1000
I -OutputCurrent-mA
O
V =2.3V
IN
V =2.7V
V =3V
V =3.6V
V =4.5V
IN
IN
IN
IN
T =85°C,
V =1.8V,
MODE=V ,
L =2.2 H
A
OUT
IN
m
TPS62260, TPS62261
TPS62262, TPS62263
SLVS763D –JUNE 2007–REVISED FEBRUARY 2011
www.ti.com
OUTPUT VOLTAGE ACCURACY (Power Save Mode) OUTPUT VOLTAGE ACCURACY (PWM Mode)
vs vs
OUTPUT CURRENT OUTPUT CURRENT
Figure 9. Figure 10.
OUTPUT VOLTAGE ACCURACY (PWM Mode) OUTPUT VOLTAGE ACCURACY (PWM Mode)
vs vs
OUTPUT CURRENT OUTPUT CURRENT
Figure 11. Figure 12.
8Submit Documentation Feedback ©2007–2011, Texas Instruments Incorporated
Product Folder Link(s): TPS62260 TPS62261 TPS62262 TPS62263
TimeBase-10 s/Divm
V 3.6V
V 1.8V,I 150mA
L 2.2 H,C 10 F0603
IN
OUT OUT
OUT
m m
V 10mV/Div
OUT
SW2V/Div
ICOIL 200mA/Div
TimeBase-1 s/Divm
MODE
2V/Div
SW
2V/Div
I
200mA/Div
coil
V =3.6V
V =1.8V
I =10mA
IN
OUT
OUT
PFMMode ForcedPWMMode
EN2V/Div
SW2V/Div
V 2V/Div
OUT
I 100mA/Div
IN
V =3.6V
R =10
V =1.8V
I intoC
MODE=GND
IN
Load
OUT
IN IN
Ω
TimeBase-100 s/Divm
TimeBase-2.5 s/Divm
MODE
2V/Div
SW
2V/Div
ICOIL
200mA/Div
V =3.6V
V =1.8V
I =10mA
IN
OUT
OUT
PFMMode
ForcedPWMMode
TPS62260, TPS62261
TPS62262, TPS62263
www.ti.com
SLVS763D –JUNE 2007–REVISED FEBRUARY 2011
MODE PIN TRANSITION FROM PFM
TYPICAL OPERATION (PWM Mode) TO FORCED PWM MODE AT LIGHT LOAD
Figure 13. Figure 14.
MODE PIN TRANSITION FROM PWM
TO PFM MODE AT LIGHT LOAD START-UP TIMING
Figure 15. Figure 16.
©2007–2011, Texas Instruments Incorporated Submit Documentation Feedback 9
Product Folder Link(s): TPS62260 TPS62261 TPS62262 TPS62263
TimeBase-20 s/Divm
V 3.6V
V 1.5V
I 50mA to200mA
MODE=
IN
OUT
OUT
VIN
I 200mA/Div
OUT
V 50mV/Div
OUT
ICOIL 500mA/Div
TimeBase-20 s/Divm
I 200mA/Div
OUT
V 50mV/Div
OUT
ICOIL 500mA/Div
200mA
400mA
V 3.6V
V 1.5V
I 200mA to400mA
IN
OUT
OUT
V
V
I
IN
OUT
OUT
3.6V
1.5V
150 A to400mA
MODE=GND
m
VOUT 50mV/Div
ICOILl500mA/Div
TimeBase 500– s/Divm
SW2V/Div
IOUT 500mA/Div
150 Am
400mA
V 3.6V
V 1.5V
I 150 A to400mA
MODE=GND
IN
OUT
OUT
m
V 50mV/Div
OUT
I 500mA/Div
COIL
TimeBase 500– s/Divm
SW2V/Div
I 500mA/Div
OUT
150 Am
400mA
TPS62260, TPS62261
TPS62262, TPS62263
SLVS763D –JUNE 2007–REVISED FEBRUARY 2011
www.ti.com
LOAD TRANSIENT LOAD TRANSIENT
(Forced PWM Mode) (Forced PWM Mode)
Figure 17. Figure 18.
LOAD TRANSIENT LOAD TRANSIENT
(PFM Mode To PWM Mode) (PWM Mode To PFM Mode)
Figure 19. Figure 20.
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Product Folder Link(s): TPS62260 TPS62261 TPS62262 TPS62263
V 3.6V
V 1.5V
I
MODE=GND
IN
OUT
OUT 1.5mA to50mA
V 50mV/Div
OUT
ICOIL 500mA/Div
TimeBase 50– s/Divm
SW2V/Div
I 50mA/Div
OUT
1.5mA
50mA
V 3.6V
V 1.5V
I 50mA to
MODE=GND
IN
OUT
OUT 1.5mA
V 50mV/Div
OUT
I 500mA/Div
COIL
TimeBase 50– s/Divm
SW2V/Div
I 50mA/Div
OUT
1.5mA
50mA
V 3.6V
V 1.8V
I 50
MODE=GND
IN
OUT
OUT mA to250mA
V 50mV/Div
OUT
I 500mA/Div
COIL
TimeBase 20– s/Divm
SW2V/Div
I 200mA/Div
OUT
50mA
250mA
V 3.6V
V 1.5V
I 50
MODE=GND
IN
OUT
OUT mA to400mA
V 50mV/Div
OUT
I500mA/Div
COIL
TimeBase 20– s/Divm
SW2V/Div
I 500mA/Div
OUT
50mA
400mA
PFMMode PWMMode
TPS62260, TPS62261
TPS62262, TPS62263
www.ti.com
SLVS763D –JUNE 2007–REVISED FEBRUARY 2011
LOAD TRANSIENT (PFM Mode) LOAD TRANSIENT (PFM Mode)
Figure 21. Figure 22.
LOAD TRANSIENT LOAD TRANSIENT
(PFM Mode To PWM Mode) (PFM Mode To PWM Mode)
Figure 23. Figure 24.
©2007–2011, Texas Instruments Incorporated Submit Documentation Feedback 11
Product Folder Link(s): TPS62260 TPS62261 TPS62262 TPS62263
VIN 3.6Vto4.2V
500mV/Div
V =1.8V
50mV/Div
I =50mA
MODE=GND
OUT
OUT
V 3.6V
V 1.5V
I 50
MODE=GND
IN
OUT
OUT mA to400mA
V 50mV/Div
OUT
I 500mA/Div
COIL
TimeBase 20– s/Divm
SW2V/Div
I 500mA/Div
OUT
50mA
400mA
PFMMode
PWMMode
TimeBase – 10 s/Divm
V 20mV/Div
OUT
SW2V/Div
I 200mA/Div
COIL
V 3.6V to 4.2V
500 mV/Div
IN
V = 1.8 V
50 mV/Div
I = 250 mA
MODE = VIN
OUT
OUT
Time Base – 100 s/Divm
TPS62260, TPS62261
TPS62262, TPS62263
SLVS763D –JUNE 2007–REVISED FEBRUARY 2011
www.ti.com
LOAD TRANSIENT
(PWM Mode To PFM Mode) LINE TRANSIENT (PFM Mode)
Figure 25. Figure 26.
LINE TRANSIENT (Forced PWM Mode) TYPICAL OPERATION (PFM Mode)
Figure 27. Figure 28.
12 Submit Documentation Feedback ©2007–2011, Texas Instruments Incorporated
Product Folder Link(s): TPS62260 TPS62261 TPS62262 TPS62263
V 3.6V;V 1.8V,I 10
MODE=GND
IN OUT OUT mA,
L =4.7 H,C =10 F0603,m m
OUT
V 20mV/Div
OUT
I 200mA/Div
COIL
TimeBase 2– s/Divm
SW2V/Div
V − InputVoltage − V
IN
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
2 2.5 3 3.5 4 4.5 5 5.5 6
I-ShutdownCurrentIntoVIN −A
SD m
T =85 C
A
o
T =-40 C
A
o
EN=GND
T =25 C
A
o
V − InputVoltage − V
IN
8
10
12
14
16
18
20
22 2.5 3 3.5 44.5 5 5.5 6
I-QuiescentCurrent −A
Qm
T =85 C
A
o
T =-40 C
A
o
MODE=GND,
EN=VIN,
DeviceNotSwitching
T =25 C
A
o
MODE=GND
EN=VIN
DeviceNotSwitching T =85 C
A°
T =25 C
A°
T = –40 C
A°
V – InputVoltage – V
IN
22.5 3 3.5 44.5 5 5.5 6
8
10
12
14
16
18
20
I – QuiescentCurrent – A
Qm
V − InputVoltage − V
IN
0
0.1
0.2
0.3
0.4
0.7
0.8
2 2.5 3 3.5 4 4.5 5
R-StaticDrain-SourceOn-StateResistance −
DS(on)W
T =85 C
A
o
T =-40 C
A
o
HighSideSwitching
T =25 C
A
o
0.5
0.6
TPS62260, TPS62261
TPS62262, TPS62263
www.ti.com
SLVS763D –JUNE 2007–REVISED FEBRUARY 2011
SHUTDOWN CURRENT INTO VIN
vs
TYPICAL OPERATION (PFM Mode) INPUT VOLTAGE
Figure 29. Figure 30.
QUIESCENT CURRENT STATIC DRAIN-SOURCE ON-STATE RESISTANCE
vs vs
INPUT VOLTAGE INPUT VOLTAGE
Figure 31. Figure 32.
©2007–2011, Texas Instruments Incorporated Submit Documentation Feedback 13
Product Folder Link(s): TPS62260 TPS62261 TPS62262 TPS62263
V − InputVoltage − V
IN
0
0.05
0.1
0.15
0.2
0.35
0.4
2 2.5 3 3.5 4 4.5 5
R-StaticDrain-SourceOn-StateResistance −
DS(on)W
T =85 C
A
o
T =-40 C
A
o
LowSideSwitching
T =25 C
A
o
0.25
0.3
TPS62260, TPS62261
TPS62262, TPS62263
SLVS763D –JUNE 2007–REVISED FEBRUARY 2011
www.ti.com
STATIC DRAIN-SOURCE ON-STATE RESISTANCE
vs
INPUT VOLTAGE
Figure 33.
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Product Folder Link(s): TPS62260 TPS62261 TPS62262 TPS62263
TPS62260, TPS62261
TPS62262, TPS62263
www.ti.com
SLVS763D –JUNE 2007–REVISED FEBRUARY 2011
DETAILED DESCRIPTION
OPERATION
The TPS62260 step down converter operates with typically 2.25 MHz fixed frequency pulse width modulation
(PWM) at moderate to heavy load currents. At light load currents the converter can automatically enter Power
Save Mode and operates then in PFM mode.
During PWM operation the converter use a unique fast response voltage mode control scheme with input voltage
feed-forward to achieve good line and load regulation allowing the use of small ceramic input and output
capacitors. At the beginning of each clock cycle initiated by the clock signal, the High Side MOSFET switch is
turned on. The current flows now from the input capacitor via the High Side MOSFET switch through the inductor
to the output capacitor and load. During this phase, the current ramps up until the PWM comparator trips and the
control logic will turn off the switch. The current limit comparator will also turn off the switch in case the current
limit of the High Side MOSFET switch is exceeded. After a dead time preventing shoot through current, the Low
Side MOSFET rectifier is turned on and the inductor current will ramp down. The current flows now from the
inductor to the output capacitor and to the load. It returns back to the inductor through the Low Side MOSFET
rectifier.
The next cycle will be initiated by the clock signal again turning off the Low Side MOSFET rectifier and turning on
the on the High Side MOSFET switch.
POWER SAVE MODE
The Power Save Mode is enabled with MODE Pin set to low level. If the load current decreases, the converter
will enter Power Save Mode operation automatically. During Power Save Mode the converter skips switching and
operates with reduced frequency in PFM mode with a minimum quiescent current to maintain high efficiency. The
converter will position the output voltage typically +1% above the nominal output voltage. This voltage positioning
feature minimizes voltage drops caused by a sudden load step.
The transition from PWM mode to PFM mode occurs once the inductor current in the Low Side MOSFET switch
becomes zero, which indicates discontinuous conduction mode.
During the Power Save Mode the output voltage is monitored with a PFM comparator. As the output voltage falls
below the PFM comparator threshold of VOUT nominal +1%, the device starts a PFM current pulse. The High
Side MOSFET switch will turn on, and the inductor current ramps up. After the On-time expires, the switch is
turned off and the Low Side MOSFET switch is turned on until the inductor current becomes zero.
The converter effectively delivers a current to the output capacitor and the load. If the load is below the delivered
current, the output voltage will rise. If the output voltage is equal or higher than the PFM comparator threshold,
the device stops switching and enters a sleep mode with typical 15μA current consumption.
If the output voltage is still below the PFM comparator threshold, a sequence of further PFM current pulses are
generated until the PFM comparator threshold is reached. The converter starts switching again once the output
voltage drops below the PFM comparator threshold.
With a fast single threshold comparator, the output voltage ripple during PFM mode operation can be kept small.
The PFM Pulse is time controlled, which allows to modify the charge transferred to the output capacitor by the
value of the inductor. The resulting PFM output voltage ripple and PFM frequency depend in first order on the
size of the output capacitor and the inductor value. Increasing output capacitor values and inductor values will
minimize the output ripple. The PFM frequency decreases with smaller inductor values and increases with larger
values.
The PFM mode is left and PWM mode entered in case the output current can not longer be supported in PFM
mode. The Power Save Mode can be disabled through the MODE pin set to high. The converter will then operate
in fixed frequency PWM mode.
Dynamic Voltage Positioning
This feature reduces the voltage under/overshoots at load steps from light to heavy load and vice versa. It is
active in Power Save Mode and regulates the output voltage 1% higher than the nominal value. This provides
more headroom for both the voltage drop at a load step, and the voltage increase at a load throw-off.
©2007–2011, Texas Instruments Incorporated Submit Documentation Feedback 15
Product Folder Link(s): TPS62260 TPS62261 TPS62262 TPS62263
Outputvoltage
Vout (PWM)
Vout +1%
PFMComparator
threshold
VoltagePositioning
Lightload
PFMMode
moderatetoheavyload
PWMMode
TPS62260, TPS62261
TPS62262, TPS62263
SLVS763D –JUNE 2007–REVISED FEBRUARY 2011
www.ti.com
Figure 34. Power Save Mode Operation with automatic Mode transition
100% Duty Cycle Low Dropout Operation
The device starts to enter 100% duty cycle mode once the input voltage comes close to the nominal output
voltage. In order to maintain the output voltage, the High Side MOSFET switch is turned on 100% for one or
more cycles.
With further decreasing VIN the High Side MOSFET switch is turned on completely. In this case the converter
offers a low input-to-output voltage difference. This is particularly useful in battery-powered applications to
achieve longest operation time by taking full advantage of the whole battery voltage range.
The minimum input voltage to maintain regulation depends on the load current and output voltage, and can be
calculated as:
VINmin = VOmax + IOmax ×(RDS(on)max + RL)
With:
IOmax = maximum output current plus inductor ripple current
RDS(on)max = maximum P-channel switch RDSon.
RL= DC resistance of the inductor
VOmax = nominal output voltage plus maximum output voltage tolerance
Undervoltage Lockout
The undervoltage lockout circuit prevents the device from malfunctioning at low input voltages and from
excessive discharge of the battery and disables the output stage of the converter. The undervoltage lockout
threshold is typically 1.85V with falling VIN.
MODE SELECTION
The MODE pin allows mode selection between forced PWM mode and Power Save Mode.
Connecting this pin to GND enables the Power Save Mode with automatic transition between PWM and PFM
mode. Pulling the MODE pin high forces the converter to operate in fixed frequency PWM mode even at light
load currents. This allows simple filtering of the switching frequency for noise sensitive applications. In this mode,
the efficiency is lower compared to the power save mode during light loads.
The condition of the MODE pin can be changed during operation and allows efficient power management by
adjusting the operation mode of the converter to the specific system requirements.
16 Submit Documentation Feedback ©2007–2011, Texas Instruments Incorporated
Product Folder Link(s): TPS62260 TPS62261 TPS62262 TPS62263
TPS62260, TPS62261
TPS62262, TPS62263
www.ti.com
SLVS763D –JUNE 2007–REVISED FEBRUARY 2011
ENABLE
The device is enabled setting EN pin to high. During the start up time tStart Up the internal circuits are settled and
the soft start circuit is activated. The EN input can be used to control power sequencing in a system with various
DC/DC converters. The EN pin can be connected to the output of another converter, to drive the EN pin high and
getting a sequencing of supply rails. With EN = GND, the device enters shutdown mode in which all internal
circuits are disabled. In fixed output voltage versions, the internal resistor divider network is then disconnected
from FB pin.
SOFT START
The TPS62260 has an internal soft start circuit that controls the ramp up of the output voltage. The output
voltage ramps up from 5% to 95% of its nominal value within typical 250μs. This limits the inrush current in the
converter during ramp up and prevents possible input voltage drops when a battery or high impedance power
source is used. The soft start circuit is enabled within the start up time tStart Up.
SHORT-CIRCUIT PROTECTION
The High Side and Low Side MOSFET switches are short-circuit protected with maximum switch current = ILIMF.
The current in the switches is monitored by current limit comparators. Once the current in the High Side
MOSFET switch exceeds the threshold of it's current limit comparator, it turns off and the Low Side MOSFET
switch is activated to ramp down the current in the inductor and High Side MOSFET switch. The High Side
MOSFET switch can only turn on again, once the current in the Low Side MOSFET switch has decreased below
the threshold of its current limit comparator.
THERMAL SHUTDOWN
As soon as the junction temperature, TJ, exceeds 140°C (typical) the device goes into thermal shutdown. In this
mode, the High Side and Low Side MOSFETs are turned-off. The device continues its operation when the
junction temperature falls below the thermal shutdown hysteresis.
©2007–2011, Texas Instruments Incorporated Submit Documentation Feedback 17
Product Folder Link(s): TPS62260 TPS62261 TPS62262 TPS62263
VIN
GND
EN
FB
SW
L1
2.2 Hm
MODE
V = 2 V to 6 V
IN
TPS62262DRV V 1.2 V
Up to 600 mA
OUT
C
4.7 F
IN
m
C
10 F
OUT
m
VIN
GND
EN
FB
SW
MODE
C
4.7 F
IN
m
L
2.2 H
1
m
R
360k
1
W
R
360k
2
W
C
22pF
1
C
10 F
OUT
m
V 1.2V
OUT
TPS62260DRV
VIN
GND
EN
FB
SW
R2
360kΩ
R1
540kΩ
MODE
V =2Vto6V
IN
C
4.7 F
IN
m
TPS62260DRV L1
2.2 Hm
C1
22pF
C
10 F
OUT
m
V 1.5V
Upto600mA
OUT
TPS62260, TPS62261
TPS62262, TPS62263
SLVS763D –JUNE 2007–REVISED FEBRUARY 2011
www.ti.com
APPLICATION INFORMATION
Figure 35. TPS62260 Fixed 1.2-V Output
Figure 36. TPS62260DRV Adjustable 1.2-V Output
Figure 37. TPS62260 adjustable 1.5-V Output
18 Submit Documentation Feedback ©2007–2011, Texas Instruments Incorporated
Product Folder Link(s): TPS62260 TPS62261 TPS62262 TPS62263
VIN
GND
EN
FB
SW
L1
2.2 Hm
MODE
V =2Vto6V
IN
TPS62261DRV V 1.8V
Upto600mA
OUT
C
4.7 F
IN
mC
10 F
OUT
m
VOUT +VREF ǒ1)R1
R2Ǔ
DIL+VOUT
1*VOUT
VIN
L f
ILmax +Ioutmax)
DIL
2
TPS62260, TPS62261
TPS62262, TPS62263
www.ti.com
SLVS763D –JUNE 2007–REVISED FEBRUARY 2011
Figure 38. TPS62261 Fixed 1.8-V Output
OUTPUT VOLTAGE SETTING
The output voltage can be calculated to:
with an internal reference voltage VREF typical 0.6V.
To minimize the current through the feedback divider network, R2should be 180 kΩor 360 kΩ. The sum of R1
and R2should not exceed ~1MΩ, to keep the network robust against noise. An external feed forward capacitor
C1is required for optimum load transient response. The value of C1should be in the range between 22pF and
33pF.
Route the FB line away from noise sources, such as the inductor or the SW line.
OUTPUT FILTER DESIGN (INDUCTOR AND OUTPUT CAPACITOR)
The TPS62260 is designed to operate with inductors in the range of 1.5μH to 4.7μH and with output capacitors in
the range of 4.7μF to 22μF. The part is optimized for operation with a 2.2μH inductor and 10μF output capacitor.
Larger or smaller inductor values can be used to optimize the performance of the device for specific operation
conditions. For stable operation, the L and C values of the output filter may not fall below 1μH effective
inductance and 3.5μF effective capacitance.
Inductor Selection
The inductor value has a direct effect on the ripple current. The selected inductor has to be rated for its dc
resistance and saturation current. The inductor ripple current (ΔIL) decreases with higher inductance and
increases with higher VIor VO.
The inductor selection has also impact on the output voltage ripple in PFM mode. Higher inductor values will lead
to lower output voltage ripple and higher PFM frequency, lower inductor values will lead to a higher output
voltage ripple but lower PFM frequency.
Equation 1 calculates the maximum inductor current in PWM mode under static load conditions. The saturation
current of the inductor should be rated higher than the maximum inductor current as calculated with Equation 2.
This is recommended because during heavy load transient the inductor current will rise above the calculated
value.
(1)
(2)
©2007–2011, Texas Instruments Incorporated Submit Documentation Feedback 19
Product Folder Link(s): TPS62260 TPS62261 TPS62262 TPS62263
IRMSCOUT +VOUT
1*VOUT
VIN
L f 1
2 3
Ǹ
DVOUT +VOUT
1*VOUT
VIN
L f ǒ1
8 Cout f)ESRǓ
TPS62260, TPS62261
TPS62262, TPS62263
SLVS763D –JUNE 2007–REVISED FEBRUARY 2011
www.ti.com
With:
f = Switching Frequency (2.25MHz typical)
L = Inductor Value
ΔIL= Peak to Peak inductor ripple current
ILmax = Maximum Inductor current
A more conservative approach is to select the inductor current rating just for the switch current limit ILIMF of the
converter.
Accepting larger values of ripple current allows the use of lower inductance values, but results in higher output
voltage ripple, greater core losses, and lower output current capability.
The total losses of the coil have a strong impact on the efficiency of the DC/DC conversion and consist of both
the losses in the dc resistance (R(DC)) and the following frequency-dependent components:
•The losses in the core material (magnetic hysteresis loss, especially at high switching frequencies)
•Additional losses in the conductor from the skin effect (current displacement at high frequencies)
•Magnetic field losses of the neighboring windings (proximity effect)
•Radiation losses
Table 2. List of Inductors
DIMENSIONS [mm3] Inductance μH INDUCTOR TYPE SUPPLIER
2.5x2.0x1.0max 2.0 MIPS2520D2R2 FDK
2.5x2.0x1.2max 2.0 MIPSA2520D2R2 FDK
2.5x2.0x1.0max 2.2 KSLI-252010AG2R2 Htachi Metals
2.5x2.0x1.2max 2.2 LQM2HPN2R2MJ0L Murata
3x3x1.5max 2.2 LPS3015 2R2 Coilcraft
Output Capacitor Selection
The advanced fast-response voltage mode control scheme of the TPS62260 allows the use of tiny ceramic
capacitors. Ceramic capacitors with low ESR values have the lowest output voltage ripple and are
recommended. The output capacitor requires either an X7R or X5R dielectric. Y5V and Z5U dielectric capacitors,
aside from their wide variation in capacitance over temperature, become resistive at high frequencies.
At nominal load current, the device operates in PWM mode and the RMS ripple current is calculated as:
(3)
At nominal load current, the device operates in PWM mode and the overall output voltage ripple is the sum of the
voltage spike caused by the output capacitor ESR plus the voltage ripple caused by charging and discharging the
output capacitor:
(4)
At light load currents, the converter operates in Power Save Mode and the output voltage ripple is dependent on
the output capacitor and inductor value. Larger output capacitor and inductor values minimize the voltage ripple
in PFM mode and tighten DC output accuracy in PFM mode.
20 Submit Documentation Feedback ©2007–2011, Texas Instruments Incorporated
Product Folder Link(s): TPS62260 TPS62261 TPS62262 TPS62263
TPS62260, TPS62261
TPS62262, TPS62263
www.ti.com
SLVS763D –JUNE 2007–REVISED FEBRUARY 2011
Input Capacitor Selection
An input capacitor is required for best input voltage filtering, and minimizing the interference with other circuits
caused by high input voltage spikes. For most applications, a 4.7μF to 10μF ceramic capacitor is recommended.
Because ceramic capacitor loses up to 80% of its initial capacitance at 5 V, it is recommended that 10μF input
capacitors be used for input voltages >4.5V. The input capacitor can be increased without any limit for better
input voltage filtering. Take care when using only small ceramic input capacitors. When a ceramic capacitor is
used at the input and the power is being supplied through long wires, such as from a wall adapter, a load step at
the output or VIN step on the input can induce ringing at the VIN pin. This ringing can couple to the output and
be mistaken as loop instability or could even damage the part by exceeding the maximum ratings.
Table 3. List of Capacitors
CAPACITANCE TYPE SIZE SUPPLIER
4.7μF GRM188R60J475K 0603 1.6x0.8x0.8mm3Murata
10μF GRM188R60J106M69D 0603 1.6x0.8x0.8mm3Murata
LAYOUT CONSIDERATIONS
Figure 39. Suggested Layout for Fixed Output Voltage Options
©2007–2011, Texas Instruments Incorporated Submit Documentation Feedback 21
Product Folder Link(s): TPS62260 TPS62261 TPS62262 TPS62263
GND
COUT
CIN
VOUT
VIN
U
L
GND
R1
R2
C1
TPS62260, TPS62261
TPS62262, TPS62263
SLVS763D –JUNE 2007–REVISED FEBRUARY 2011
www.ti.com
Figure 40. Suggested Layout for Adjustable Output Voltage Version
As for all switching power supplies, the layout is an important step in the design. Proper function of the device
demands careful attention to PCB layout. Care must be taken in board layout to get the specified performance. If
the layout is not carefully done, the regulator could show poor line and/or load regulation, stability issues as well
as EMI problems. It is critical to provide a low inductance, impedance ground path. Therefore, use wide and
short traces for the main current paths. The input capacitor should be placed as close as possible to the IC pins
as well as the inductor and output capacitor.
Connect the GND Pin of the device to the PowerPAD™land of the PCB and use this pad as a star point. Use a
common Power GND node and a different node for the Signal GND to minimize the effects of ground noise.
Connect these ground nodes together to the PowerPAD land (star point) underneath the IC. Keep the common
path to the GND PIN, which returns the small signal components and the high current of the output capacitors as
short as possible to avoid ground noise. The FB line should be connected right to the output capacitor and routed
away from noisy components and traces (e.g., SW line).
22 Submit Documentation Feedback ©2007–2011, Texas Instruments Incorporated
Product Folder Link(s): TPS62260 TPS62261 TPS62262 TPS62263
PACKAGE OPTION ADDENDUM
www.ti.com 18-Apr-2011
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
TPS62260DDCR ACTIVE SOT DDC 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS62260DDCRG4 ACTIVE SOT DDC 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS62260DDCT ACTIVE SOT DDC 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS62260DDCTG4 ACTIVE SOT DDC 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS62260DRVR ACTIVE SON DRV 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS62260DRVRG4 ACTIVE SON DRV 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS62260DRVT ACTIVE SON DRV 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS62260DRVTG4 ACTIVE SON DRV 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS62261DRVR ACTIVE SON DRV 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS62261DRVRG4 ACTIVE SON DRV 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS62261DRVT ACTIVE SON DRV 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS62261DRVTG4 ACTIVE SON DRV 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS62262DDCR ACTIVE SOT DDC 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS62262DDCT ACTIVE SOT DDC 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS62262DRVR ACTIVE SON DRV 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS62262DRVRG4 ACTIVE SON DRV 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS62262DRVT ACTIVE SON DRV 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
PACKAGE OPTION ADDENDUM
www.ti.com 18-Apr-2011
Addendum-Page 2
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
TPS62262DRVTG4 ACTIVE SON DRV 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS62263DRVR ACTIVE SON DRV 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS62263DRVRG4 ACTIVE SON DRV 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS62263DRVT ACTIVE SON DRV 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS62263DRVTG4 ACTIVE SON DRV 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TPS62260, TPS62261, TPS62262, TPS62263 :
PACKAGE OPTION ADDENDUM
www.ti.com 18-Apr-2011
Addendum-Page 3
•Automotive: TPS62260-Q1, TPS62261-Q1, TPS62262-Q1, TPS62263-Q1
NOTE: Qualified Version Definitions:
•Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TPS62260DDCR SOT DDC 5 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
TPS62260DDCT SOT DDC 5 250 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
TPS62260DRVR SON DRV 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2
TPS62260DRVT SON DRV 6 250 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2
TPS62261DRVR SON DRV 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2
TPS62261DRVT SON DRV 6 250 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2
TPS62262DDCR SOT DDC 5 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
TPS62262DDCT SOT DDC 5 250 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
TPS62262DRVR SON DRV 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2
TPS62262DRVT SON DRV 6 250 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2
TPS62263DRVR SON DRV 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2
TPS62263DRVT SON DRV 6 250 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2
PACKAGE MATERIALS INFORMATION
www.ti.com 2-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TPS62260DDCR SOT DDC 5 3000 203.0 203.0 35.0
TPS62260DDCT SOT DDC 5 250 203.0 203.0 35.0
TPS62260DRVR SON DRV 6 3000 203.0 203.0 35.0
TPS62260DRVT SON DRV 6 250 203.0 203.0 35.0
TPS62261DRVR SON DRV 6 3000 203.0 203.0 35.0
TPS62261DRVT SON DRV 6 250 203.0 203.0 35.0
TPS62262DDCR SOT DDC 5 3000 203.0 203.0 35.0
TPS62262DDCT SOT DDC 5 250 203.0 203.0 35.0
TPS62262DRVR SON DRV 6 3000 203.0 203.0 35.0
TPS62262DRVT SON DRV 6 250 203.0 203.0 35.0
TPS62263DRVR SON DRV 6 3000 203.0 203.0 35.0
TPS62263DRVT SON DRV 6 250 203.0 203.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 2-Jul-2012
Pack Materials-Page 2
IMPORTANT NOTICE
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any product or service without notice, and advise customers to obtain the latest version of relevant information
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pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
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CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
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In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
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