SP3508 Rugged 3.3V, 20Mbps, 8 Channel Multiprotocol Transceiver with Programmable DCE/DTE and Termination Resistors FEATURES * Fast 20Mbps Differential Transmission Rates * Internal Transceiver Termination Resistors for V.11 & V.35 * Interface Modes: -- RS-232 (V.28) -- X.21 (V.11) -- RS-449/V.36 (V.10 & V.11) Now Available in Lead Free Packaging Refer to page 9 for pinout -- EIA-530 (V.10 & V.11) -- EIA-530A (V.10 & V.11) -- V.35 (V.35 & V.28) * Protocols are Software Selectable with 3-Bit Word * Eight (8) Drivers and Eight (8) Receivers *Termination Network Disable Option * Internal Line or Digital Loopback for Diagnostic Testing * Certified conformance to NET1/NET2 and TBR-1 TBR-2 by TUV Rheinland (TBR2/30451940.001/04) * Easy Flow-Through Pinout * +3.3V Only Operation * Individual Driver and Receiver Enable/Disable Controls *Operates in either DTE or DCE Mode APPLICATIONS * Router * Frame Relay * CSU * DSU * PBX * Secure Communication Terminals DESCRIPTION The SP3508 is a monolithic device that supports eight (8) popular serial interface standards for Wide Area Network (WAN) connectivity. The SP3508 is fabricated using a low power BiCMOS process technology, and incorporates a regulated charge pump allowing +3.3V only operation. Exar's patented charge pump provides a regulated output of +5.5V, which will provide enough voltage for compliant operation in all modes. Eight (8) drivers and eight (8) receivers can be configured via software for any of the above interface modes at any time. The SP3508 requires no additional external components for compliant operation for all of the eight (8) modes of operation other than six capacitors used for the internal charge pump. All necessary termination is integrated within the SP3508 and is switchable when V.35 drivers and V.35 receivers, or when V.11 receivers are used. The SP3508 provides the controls and transceiver availability for operating as either a DTE or DCE. Additional features with the SP3508 include internal loopback that can be initiated in any of the operating modes by use of the LOOPBACK pin. While in loopback mode, receiver outputs are internally connected to driver inputs creating an internal signal path bypassing the serial communications controller for diagnostic testing. The SP3508 also includes a latch enable pin with the driver and receiver address decoder. The internal V.11 or V.35 termination can be switched off using a control pin (TERM_OFF) for monitoring applications. All eight (8) drivers and receivers in the SP3508 include separate enable pins for added convenience. The SP3508 is ideal for WAN serial ports in networking equipment such as routers, access concentrators, network muxes, DSU/CSU's, networking test equipment, and other access devices. Exar Corporation 48720 Kato Road, Fremont CA, 94538 * (510)668-7017 * www.exar.com SP3508_100_072208 ABSOLUTE MAXIMUM RATINGS VCC ..................................................................................................+7V Input Voltages: Logic................................................. -0.3V to (VCC+0.5V) Drivers............................................... -0.3V to (VCC+0.5V) Receivers..............................................................15.5V Output Voltages: Logic................................................. -0.3V to (VCC+0.5V) Drivers......................................................................12V Receivers.......................................... -0.3V to (VCC+0.5V) Storage Temperature...................................................-65C to +150C Power Dissipation....................................................................1520mW (derate 19.0mW/C above +70C) Junction Temperature TJ. ........................................................ +141C Package Derating: oJA....................................................................36.9 C/W oJC......................................................................6.5 C/W These are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections of the specifications below is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. STORAGE CONSIDERATIONS Due to the relatively large package size of the 100-pin quad flat-pack, storage in a low humidity environment is preferred. Large high density plastic packages are moisture sensitive and should be stored in Dry Vapor Barrier Bags. Prior to usage, the parts should remain bagged and stored below 40C and 60%RH. If the parts are removed from the bag, they should be used within 48 hours or stored in an environment at or below 20%RH. If the above conditions cannot be followed, the parts should be baked for four hours at 125C in order to remove moisture prior to soldering. Exar ships the 100-pin LQFP in Dry Vapor Barrier Bags with a humidity indicator card and desiccant pack. The humidity indicator should be below 30%RH. ELECTRICAL SPECIFICATIONS TA = 0 to 70C and VCC = 3.3V 5% unless otherwise noted. The denotes the specifications which apply over the full operating tempera- ture range (-40C to +85C), unless otherwise specified. PARAMETER MIN. TYP. MAX. UNITS CONDITIONS LOGIC INPUTS VIL VIH 0.8 2.0 V V V IOUT = -3.2mA V IOUT = 1.0mA LOGIC OUTPUTS VOL VOH 0.4 VCC - 0.6 VCC - 0.3 V.28 DRIVER DC Parameters (OUTPUTS) Open Circuit Voltage Loaded Voltage +/-10 +/-5.0 Short-Circuit Current Power-Off Impedance +/-100 300 V Per Figure 1 V Per Figure 2 mA Per Figure 4 Per Figure 5 s V.28 DRIVER AC Parameters (Outputs) VCC = 3.3V for AC parameters Transition Time 1.5 Instantaneous Slew Rate Propagation Delay: tPHL 30 0.5 V/ s 1.0 3.0 3.0 s kbps Propagation Delay: tPLH 0.5 1.0 Max. Transmission Rate 120 230 Per Figure 6, +3V to -3V Per Figure 3 s Exar Corporation 48720 Kato Road, Fremont CA, 94538 * (510)668-7017 * www.exar.com SP3508_100_072208 ELECTRICAL SPECIFICATIONS TA = 0 to 70C and VCC = 3.3V 5% unless otherwise noted. The denotes the specifications which apply over the full operating tempera- ture range (-40C to +85C), unless otherwise specified. PARAMETER MIN. TYP. MAX. UNITS CONDITIONS V.28 RECEIVER DC Parameters (Inputs) Input Impedance 3 Open-Circuit Bias HIGH Threshold 1.7 LOW Threshold 0.8 7 k Per Figure 7 +2.0 V Per Figure 8 3.0 V V 1.2 V.28 RECEIVER AC Parameters VCC = 3.3V for AC parameters Propagation Delay: tPHL 100 500 ns Propagation Delay: tPLH 100 500 ns Max. Transmission Rate 120 230 kbps V.10 DRIVER DC Parameters (Outputs) Open Circuit Voltage +/-4.0 Test-Terminated Voltage 0.9VCC +/-6.0 V Per Figure 9 V Per Figure 10 Short-Circuit Current +/-150 mA Per Figure 11 Power-Off Current +/-100 A Per Figure 12 200 ns V.10 DRIVER AC Parameters (Outputs) VCC = 3.3V for AC parameters Transition Time Propagation Delay: tPHL 100 500 ns Propagation Delay: tPLH 100 500 ns kbps Max. Transmission Rate 120 Per Figure 13, 10% to 90% V.10 RECEIVER DC Parameters (Inputs) Input Current -3.25 Input Impedance +3.25 k +/-0.3 V 4 Sensitivity mA V.10 RECEIVER AC Parameters VCC = 3.3V for AC parameters Propagation Delay: tPHL 120 250 ns Propagation Delay: tPLH 120 250 ns kbps Max. Transmission Rate Per Figures 14 and 15 120 Exar Corporation 48720 Kato Road, Fremont CA, 94538 * (510)668-7017 * www.exar.com SP3508_100_072208 ELECTRICAL SPECIFICATIONS TA = 0 to 70C and VCC = 3.3V 5% unless otherwise noted. The denotes the specifications which apply over the full operating tempera- ture range (-40C to +85C), unless otherwise specified. PARAMETER MIN. TYP. MAX. UNITS CONDITIONS V.11 DRIVER DC Parameters (Outputs) V Per Figure 16 +/-2.0 V Per Figure 17 0.5(VOC) V Open Circuit Voltage (VOC) Test Terminated Voltage +/-6.0 Balance +/-0.4 V Per Figure 17 +3.0 V Per Figure 17 Short-Circuit Current +/-150 mA Per Figure 18 Power-Off Current +/-100 A Per Figure 19 Offset V.11 DRIVER AC Parameters (Outputs) VCC = 3.3V for AC parameters Transition Time 10 ns Per Figures 21 and 35, 10% to 90% using CL = 50pF Propagation Delay: tPHL 30 85 ns Per Figures 32 and 35 Propagation Delay: tPLH 30 85 ns Per Figures 32 and 35 5 10 ns Per Figures 32 and 35 Mbps +7 V +/-0.2 V Differential Skew Max. Transmission Rate 20 V.11 RECEIVER DC Parameters (Inputs) Common Mode Range -7 Sensitivity Input Current -3.25 Current with 100 Termination Input Impedance +3.25 mA Per Figures 20 and 22; Power on or off +/-60 mA Per Figures 23 and 24 4 k V.11 RECEIVER AC Parameters VCC = 3.3V for AC parameters using CL = 50pF Propagation Delay: tPHL 30 85 ns Per Figures 32 and 37 Propagation Delay: tPLH 30 85 ns Per Figures 32 and 37 5 10 ns Per Figure 32 Skew Max. Transmission Rate 20 Mbps Exar Corporation 48720 Kato Road, Fremont CA, 94538 * (510)668-7017 * www.exar.com SP3508_100_072208 ELECTRICAL SPECIFICATIONS TA = 0 to 70C and VCC = 3.3V 5% unless otherwise noted. The denotes the specifications which apply over the full operating tempera- ture range (-40C to +85C), unless otherwise specified. PARAMETER MIN. TYP. MAX. UNITS CONDITIONS +/-1.20 V Per Figure 16 V.35 DRIVER DC Parameters (Outputs) Open Circuit Voltage Test Terminated Voltage +/-0.44 +/-0.66 V Per Figure 25 +/-0.6 V Per Figure 25 -0.2VST +0.2VST V Per Figure 25; VST = Steady State value Source Impedance 50 150 Per Figure 26; ZS = V2/V1 x 50 Short-Circuit Impedance 135 165 Per Figure 27 Offset Output Overshoot V.35 DRIVER AC Parameters (Outputs) VCC = 3.3V for AC parameters Transition Time 20 ns Propagation Delay: tPHL 30 85 ns Per Figures 32 and 35; CL = 20pF Propagation Delay: tPLH 30 85 ns Per Figures 32 and 35; CL = 20pF 5 ns Per Figures 32 and 35; CL = 20pF Mbps mV Differential Skew Max. Transmission Rate 20 V.35 RECEIVER DC Parameters (Inputs) Sensitivity +/-50 +/-200 Source Impedance 90 110 Per Figure 29; ZS = V2/V1 x 50 Short-Circuit Impedance 135 165 Per Figure 30 V.35 RECEIVER AC Parameters VCC = 3.3V for AC parameters Propagation Delay: tPHL 30 85 ns Per Figures 32 and 37; CL = 20pF Propagation Delay: tPLH 30 85 ns Per Figures 32 and 37; CL = 20pF 5 10 ns Per Figure 32; CL = 20pF Skew Max. Transmission Rate 20 Mbps TRANSCEIVER LEAKAGE CURRENTS Driver Output 3-State Current Receiver Output 3-State Current 1 200 A Per Figure 31; Drivers Disabled 10 A DX = 111 Exar Corporation 48720 Kato Road, Fremont CA, 94538 * (510)668-7017 * www.exar.com SP3508_100_072208 ELECTRICAL SPECIFICATIONS TA = 0 to 70C and VCC = 3.3V 5% unless otherwise noted. The denotes the specifications which apply over the full operating tempera- ture range (-40C to +85C), unless otherwise specified. PARAMETER MIN. TYP. MAX. UNITS 3.15 3.3 3.45 V CONDITIONS POWER REQUIREMENTS VCC ICC (No Mode Selected) 1 A All ICC values are with VCC = +3.3V (V.28 / RS-232) 95 mA fIN = 230kbps; Drivers active and loaded (V.11 / RS-422) 230 mA fIN = 20Mbps; Drivers active and loaded (EIA-530 & RS-449) 270 mA fIN = 20Mbps; Drivers active and loaded (V.35) 170 mA V.35 @ fIN = 20Mbps, V.28 @ fIN = 230kbps Exar Corporation 48720 Kato Road, Fremont CA, 94538 * (510)668-7017 * www.exar.com SP3508_100_072208 OTHER AC CHARACTERISTICS TA = 0 to 70C and VCC = 3.3V 5% unless otherwise noted. PARAMETER MIN. TYP. MAX. Units CONDITIONS DRIVER DELAY TIME BETWEEN ACTIVE MODE AND TRI-STATE MODE RS-232/V.28 tPZL; Tri-state to Output LOW 0.70 5.0 s CL = 100pF, Fig. 33 & 39; S1 closed tPZH; Tri-state to Output HIGH 0.40 2.0 s CL = 100pF, Fig. 33 & 39; S2 closed tPLZ; Output LOW to Tri-state 0.20 2.0 s CL = 100pF, Fig. 33 & 39; S1 closed tPHZ; Output HIGH to Tri-state 0.40 2.0 s CL = 100pF, Fig. 33 & 39; S2 closed tPZL; Tri-state to Output LOW 0.15 2.0 s CL = 100pF, Fig. 33 & 39; S1 closed tPZH; Tri-state to Output HIGH 0.20 2.0 s CL = 100pF, Fig. 33 & 39; S2 closed tPLZ; Output LOW to Tri-state 0.20 2.0 s CL = 100pF, Fig. 33 & 39; S1 closed tPHZ; Output HIGH to Tri-state 0.15 2.0 s CL = 100pF, Fig. 33 & 39; S2 closed tPZL; Tri-state to Output LOW 2.80 10.0 s CL = 100pF, Fig. 33 & 36; S1 closed tPZH; Tri-state to Output HIGH 0.10 2.0 s CL = 100pF, Fig. 33 & 36; S2 closed tPLZ; Output LOW to Tri-state 0.10 2.0 s CL = 15pF, Fig. 33 & 36; S1 closed tPHZ; Output HIGH to Tri-state 0.10 2.0 s CL = 15pF, Fig. 33 & 36; S2 closed tPZL; Tri-state to Output LOW 2.60 10.0 s CL = 100pF, Fig. 33 & 36; S1 closed tPZH; Tri-state to Output HIGH 0.10 2.0 s CL = 100pF, Fig. 33 & 36; S2 closed tPLZ; Output LOW to Tri-state 0.10 2.0 s CL = 15pF, Fig. 33 & 36; S1 closed tPHZ; Output HIGH to Tri-state 0.15 2.0 s CL = 15pF, Fig. 33 & 36; S2 closed RS-423/V.10 RS-422/V.11 V.35 RECEIVER DELAY TIME BETWEEN ACTIVE MODE AND TRI-STATE MODE RS-232/V.28 tPZL; Tri-state to Output LOW 0.12 2.0 s CL = 100pF, Fig. 34 & 37; S1 closed tPZH; Tri-state to Output HIGH 0.10 2.0 s CL = 100pF, Fig. 34 & 37; S2 closed tPLZ; Output LOW to Tri-state 0.10 2.0 s CL = 100pF, Fig. 34 & 37; S1 closed tPHZ; Output HIGH to Tri-state 0.10 2.0 s CL = 100pF, Fig. 34 & 37; S2 closed tPZL; Tri-state to Output LOW 0.10 2.0 s CL = 100pF, Fig. 34 & 37; S1 closed tPZH; Tri-state to Output HIGH 0.10 2.0 s CL = 100pF, Fig. 34 & 37; S2 closed tPLZ; Output LOW to Tri-state 0.10 2.0 s CL = 100pF, Fig. 34 & 37; S1 closed tPHZ; Output HIGH to Tri-state 0.10 2.0 s CL = 100pF, Fig. 34 & 37; S2 closed RS-423/V.10 Exar Corporation 48720 Kato Road, Fremont CA, 94538 * (510)668-7017 * www.exar.com SP3508_100_072208 Other AC Characteristics: Continued TA = 0 to 70C and VCC = +3.3V unless otherwise noted. PARAMETER MIN. TYP. MAX. UNITS CONDITIONS tPZL; Tri-state to Output LOW 0.10 2.0 s CL = 100pF, Fig. 34 & 38; S1 closed tPZH; Tri-state to Output HIGH 0.10 2.0 s CL = 100pF, Fig. 34 & 38; S2 closed tPLZ; Output LOW to Tri-state 0.10 2.0 s CL = 15pF, Fig. 34 & 38; S1 closed tPHZ; Output HIGH to Tri-state 0.10 2.0 s CL = 15pF, Fig. 34 & 38; S2 closed tPZL; Tri-state to Output LOW 0.10 2.0 s CL = 100pF, Fig. 34 & 38; S1 closed tPZH; Tri-state to Output HIGH 0.10 2.0 s CL = 100pF, Fig. 34 & 38; S2 closed tPLZ; Output LOW to Tri-state 0.10 2.0 s CL = 15pF, Fig. 34 & 38; S1 closed tPHZ; Output HIGH to Tri-state 0.10 2.0 s CL = 15pF, Fig. 34 & 38; S2 closed RS-422/V.11 V.35 Transceiver to Transceiver Skew RS-232 Driver RS-232 Receiver RS-422 Driver RS-422 Receiver RS-423 Driver RS-423 Receiver V.35 Driver V.35 Receiver (per Figures 32, 35, 37) 100 ns [ (tPHL )Tx1 - (tPHL )Txn ] 100 ns [ (tPLH )Tx1 - (tPLH )Txn] 20 ns [ (tPHL )Rx1 - (tPHL )Rxn ] 20 ns [ (tPLH )Rx1 - (tPLH )Rxn ] 2 ns [ (tPHL)Tx1 - (tPHL )Txn ] 2 ns [ (tPLH )Tx1 - (tPLH )Txn ] 3 ns [ (tPHL )Rx1 - (tPHL: )Rxn ] 3 ns [ (tPLH )Rx1 - (tPLH )Rxn ] 5 ns [ (tPHL )Tx2 - (tPHL )Txn ] 5 ns [ (tPLH )Tx2 - (tPLH )Txn ] 5 ns [ (tPHL )Rx2 - (tPHL )Rxn ] 5 ns [ (tPLH )Rx2 - (tPLH )Rxn ] 4 ns [ (tPHL )Tx1 - (tPHL )Txn ] 4 ns [ (tPLH )Tx1 - (tPLH )Txn ] 6 ns [ (tPHL )Rx1 - (tPHL )Rxn ] 6 ns [ (tPLH )Rx1 - (tPLH )Rxn] Exar Corporation 48720 Kato Road, Fremont CA, 94538 * (510)668-7017 * www.exar.com SP3508_100_072208 PINOUT Exar Corporation 48720 Kato Road, Fremont CA, 94538 * (510)668-7017 * www.exar.com SP3508_100_072208 SP3508 Pin Designation Pin Number Pin Name Description 1 GND Signal Ground 2 SDEN TxD Driver Enable Input 3 TTEN TxCE Driver Enable Input 4 STEN ST Driver Enabe Input 5 RSEN RTS Driver Enable Input 6 TREN DTR Driver Enable Input 7 RRCEN DCD Driver Enable Input 8 RLEN RL Driver Enable Input 9 LLEN# LL Driver Enable Input 10 RDEN# RxD Receiver Enabe Input 11 RTEN# RxC Receiver Enable Input 12 TxCEN# TxC Receiver Enable Input 13 CSEN# CTS Receiver Enable Input 14 DMEN# DSR Receiver Enable Input 15 RRTEN# DCDDTE Receiver Enable Input 16 ICEN# RI Receiver Enable Input 17 TMEN TM Receiver Enable Input 18 D0 Mode Select Input 19 D1 Mode Select Input 20 D2 Mode Select Input 21 DLATCH# 22 TERM_OFF 23 VCC Power Supply Input 24 C3P Charge Pump Capacitor 25 GND Signal Ground Decoder Latch Input Termination Disable Input Exar Corporation 48720 Kato Road, Fremont CA, 94538 * (510)668-7017 * www.exar.com 10 SP3508_100_072208 SP3508 Pin Designation Pin Number Pin Name Description 26 C3N Charge Pump Capacitor 27 VSS2 Minus VCC 28 AGND Signal Ground 29 AVCC Power Supply Input 30 LOOPBACK# Loopback Mode Enable Input 31 TxD TxD Driver TTL Input 32 TxCE TxCE Driver TTL input 33 ST ST Driver TTL Input 34 RTS RTS Driver TTL Input 35 DTR DTR Driver TTL Input 36 DCD_DCE DCDDCE Driver TTL Input 37 RL RL Driver TTL Input 38 LL LL Driver TTL Input 39 RxD RxD Receiver TTL Output 40 RxC RxC Receiver TTL Output 41 TxC TxC Receiver TTL Output 42 CTS CTS Receiver TTL Output 43 DSR DSR Receiver TTL Output 44 DCD_DTE DCDDTE Receiver TTL Output 45 RI RI Receiver TTL Output 46 TM TM Receiver TTL Output 47 GND Signal Ground 48 VCC Power Supply Input 49 RD(B) RxD Non-Inverting Input 50 RD(A) RxD Inverting Input Exar Corporation 48720 Kato Road, Fremont CA, 94538 * (510)668-7017 * www.exar.com 11 SP3508_100_072208 SP3508 Pin Designation Pin Number Pin Name Description 51 RT(B) RxC Non-Inverting Input 52 RT(A) RxC Inverting Input 53 TxC(B) 54 GND 55 TxC(A) TxC Inverting Input 56 CS(B) CTS Non-Inverting Input 57 CS(A) CTS Inverting Input 58 DM(B) DSR Non-Inverting Input 59 DM(A) DSR Inverting Input 60 GNDV10 61 RRT(B) DCDDTE Non-Inverting Input 62 RRT(A) DCDDTE Inverting Input 63 IC RI Receiver Input 64 TM(A) TM Receiver Input 65 LL(A) LL Driver Output 66 VCC Power Supply Input 67 RL(A) RL Driver Output 68 VSS1 -2xVCC Charge Pump Output 69 C2N Charge Pump Capacitor 70 C1N Charge Pump Capacitor 71 GND Signal Ground 72 C2P Charge Pump Capacitor 73 VCC Power Supply Input 74 C1P Charge Pump Capacitor 75 GND Signal Ground TxC Non-Inverting Input Signal Ground V.10 RX Reference Node Exar Corporation 48720 Kato Road, Fremont CA, 94538 * (510)668-7017 * www.exar.com 12 SP3508_100_072208 SP3508 Pin Designation Pin Number Pin Name Description 76 VDD 2xVCC Charge Pump Output 77 RRC(B) DCDDCE Non-Inverting Output 78 VCC 79 RRC(A) Power Supply Input DCDDCE Inverting Output 80 GND Signal Ground 81 RS(A) RTS Inverting Output 82 VCC 83 RS(B) RTS Non-Inverting Output 84 GND Signal Ground 85 TR(A) DTR Inverting Output 86 VCC Power Supply Input 87 TR(B) DTR Non-Inverting Output 88 GND Signal Ground 89 ST(A) ST Inverting Output 90 VCC Power Supply Input 91 ST(B) ST Non-Inverting Output 92 GND Signal Ground 93 TT(A) TxCE Inverting Output 94 VCC Power Supply Input 95 TT(B) TxCE Non-Inverting Output 96 GND Signal Ground 97 SD(A) TxD Inverting Output 98 VCC Power Supply Input 99 SD(B) 100 VCC Power Supply Input TxD Non-Inverting Output Power Supply Input Exar Corporation 48720 Kato Road, Fremont CA, 94538 * (510)668-7017 * www.exar.com 13 SP3508_100_072208 SP3508 Driver Table Driver Output Pin V.35 Mode EIA-530 Mode RS-232 Mode (V.28) EIA-530A Mode RS-449 Mode (V.36) X.21 Mode (V.11) Shutdown MODE (D0, D1, D2) 001 010 011 100 101 110 111 T 1OUT(a) V.35 V.11 V.28 V.11 V.11 V.11 High-Z TxD(a) T 1OUT(b) V.35 V.11 High-Z V.11 V.11 V.11 High-Z TxD(b) T 2OUT(a) V.35 V.11 V.28 V.11 V.11 V.11 High-Z TxCE(a) T 2OUT(b) V.35 V.11 High-Z V.11 V.11 V.11 High-Z TxCE(b) T 3OUT(a) V.35 V.11 V.28 V.11 V.11 V.11 High-Z TxC_DCE(a) T 3OUT(b) V.35 V.11 High-Z V.11 V.11 V.11 High-Z TxC_DCE(b) T 4OUT(a) V.28 V.11 V.28 V.11 V.11 V.11 High-Z RTS(a) T 4OUT(b) High-Z V.11 High-Z V.11 V.11 V.11 High-Z RTS(b) T 5OUT(a) V.28 V.11 V.28 V.10 V.11 V.11 High-Z DTR(a) T 5OUT(b) High-Z V.11 High-Z High-Z V.11 V.11 High-Z DTR(b) T 6OUT(a) V.28 V.11 V.28 V.11 V.11 V.11 High-Z DCD_DCE(a) T 6OUT(b) High-Z V.11 High-Z V.11 V.11 V.11 High-Z DCD_DCE(b) T 7OUT(a) V.28 V.10 V.28 V.10 V.10 High-Z High-Z RL T 8OUT(a) V.28 V.10 V.28 V.10 V.10 High-Z High-Z LL X.21 Mode (V.11) Shutdown Suggested Signal Suggested Signal Table 1. Driver Mode Selection SP3508 Receiver Table Receiver Input Pin V.35 Mode EIA-530 Mode RS-232 Mode (V.28) EIA-530A Mode RS-449 Mode (V.36) MODE (D0, D1, D2) 001 010 011 100 101 110 111 R 1IN(a) V.35 V.11 V.28 V.11 V.11 V.11 High-Z RxD(a) R 1IN(b) V.35 V.11 High-Z V.11 V.11 V.11 High-Z RxD(b) R 2IN(a) V.35 V.11 V.28 V.11 V.11 V.11 High-Z RxC(a) R 2IN(b) V.35 V.11 High-Z V.11 V.11 V.11 High-Z RxC(b) R 3IN(a) V.35 V.11 V.28 V.11 V.11 V.11 High-Z TxC_DTE(a) R 3IN(b) V.35 V.11 High-Z V.11 V.11 V.11 High-Z TxC_DTE(b) R 4IN(a) V.28 V.11 V.28 V.11 V.11 V.11 High-Z CTS(a) R 4IN(b) High-Z V.11 High-Z V.11 V.11 V.11 High-Z CTS(b) R 5IN(a) V.28 V.11 V.28 V.10 V.11 V.11 High-Z DSR(a) R 5IN(b) High-Z V.11 High-Z High-Z V.11 V.11 High-Z DSR(b) R 6IN(a) V.28 V.11 V.28 V.11 V.11 V.11 High-Z DCD_DTE(a) R 6IN(b) High-Z V.11 High-Z V.11 V.11 V.11 High-Z DCD_DTE(b) R 7IN(a) V.28 V.10 V.28 V.10 V.10 High-Z High-Z RI R 8IN(a) V.28 V.10 V.28 V.10 V.10 High-Z High-Z TM Table 2. Receiver Mode Selection Exar Corporation 48720 Kato Road, Fremont CA, 94538 * (510)668-7017 * www.exar.com 14 SP3508_100_072208 Test Circuits A A VOC VT 3k C C Figure 1. V.28 Driver Output Open Circuit Voltage Figure 2. V.28 Driver Output Loaded Voltage A A VT 7k O scilloscope I sc C C Scope used f or sle w rate measurement. Figure 3. V.28 Driver Output Slew Rate Figure 4. V.28 Driver Output Short-Circuit Current V C C = 0V A A Ix 2V 3k 2500pF O s cillos cope C C Figure 6. V.28 Driver Output Rise/Fall Times Figure 5. V.28 Driver Output Power-Off Impedance Exar Corporation 48720 Kato Road, Fremont CA, 94538 * (510)668-7017 * www.exar.com 15 SP3508_100_072208 A A I ia 15V voc C C Figure 7. V.28 Receiver Input Impedance Figure 8. V.28 Receiver Input Open Circuit Bias A A 3.9k Vt 450 VOC C C Figure 9. V.10 Driver Output Open-Circuit Voltage Figure 10. V.10 Driver Output Test Terminated Voltage V C C = 0V A A Ix 0.25V I sc C C Figure 11. V.10 Driver Output Short-Circuit Current Figure 12. V.10 Driver Output Power-Off Current Exar Corporation 48720 Kato Road, Fremont CA, 94538 * (510)668-7017 * www.exar.com 16 SP3508_100_072208 A A I ia 10V O scilloscope 450 C C Figure 13. V.10 Driver Output Transition Time Figure 14. V.10 Receiver Input Current A V. 10 R E CE IV E R +3. 25mA V OCA 3.9k VOC V OCB -10V -3V +3V B +10V Ma ximu m Input C urrent V ers us Voltage C -3. 25mA Figure 15. V.10 Receiver Input IV Graph Figure 16. V.11 Driver Output Open-Circuit Voltage A A Isa 50 VT 50 B B V OS I sb C C Figure 17. V.11 Driver Output Test Terminated Voltage Figure 18. V.11 Driver Output Short-Circuit Current Exar Corporation 48720 Kato Road, Fremont CA, 94538 * (510)668-7017 * www.exar.com 17 SP3508_100_072208 V C C = 0V A A Iia Ixa 10V 0.25V B B C C V C C = 0V A A 0.25V 10V Ixb B Iib B C C Figure 19. V.11 Driver Output Power-Off Current Figure 20. V.11 Receiver Input Current A V. 11 R E C E IV E R +3. 25mA 50 Oscilloscope 50 B -10V 50 -3V VE +3V +10V Ma ximu m Input C urrent V ers us Voltage C -3. 25mA Figure 22. V.11 Receiver Input IV Graph Figure 21. V.11 Driver Output Rise/Fall Time Exar Corporation 48720 Kato Road, Fremont CA, 94538 * (510)668-7017 * www.exar.com 18 SP3508_100_072208 A V.11 R E CE IV E R Iia w/ O ptiona l C a ble Termina tion (100W to 150W) 6V 100 to 150 i [mA] = V [V ] / 0.1 i [mA] = V [V ] - 3) / 4. 0 -6V -3V +3V B +6V i [mA] = V [V ] - 3) / 4. 0 C Ma ximum Input C urrent vers us Voltage i [mA] = V [V ] / 0.1 Figure 24. V.11 Receiver Input Graph with Termination A 6V A 100 to 150 50 VT Iib B 50 VOS B C C Figure 23. V.11 Receiver Input Current w/ Termination Figure 25. V.35 Driver Output Test Terminated Voltage V1 A A 50 24kHz, 550mV p-p S ine Wave V2 B IS C B 2V C C Figure 27. V.35 Driver Output Short-Circuit Impedance Figure 26. V.35 Driver Output Source Impedance Exar Corporation 48720 Kato Road, Fremont CA, 94538 * (510)668-7017 * www.exar.com 19 SP3508_100_072208 V1 A A 50 50 24kHz, 550mV p-p S ine Wa ve O scilloscope V2 50 B B 50 C C Figure 29. V.35 Receiver Input Source Impedance Figure 28. V.35 Driver Output Rise/Fall Time Any one of the three conditions f or disab ling the dr iver. A V CC = 0V 1 1 1 D2 D1 D0 V CC A IZS C 10V I ZS C 10V I sc B Logic "1" B 2V C Figure 30. V.35 Receiver Input Short-Circuit Impedance Figure 31. Driver Output Leakage Current Test C L1 T IN B B A fIN (50% Duty Cycle, 2.5V P-P R OU T A C L2 15pF ) Figure 32. Driver/Receiver Timing Test Circuit Exar Corporation 48720 Kato Road, Fremont CA, 94538 * (510)668-7017 * www.exar.com 20 SP3508_100_072208 Output Under Test VCC S1 500 VCC S1 CR L CL 1K Test P oint R eceiver Output 1K S2 S2 Figure 34. Receiver Timing Test Load Circuit Figure 33. Driver Timing Test Load Circuit f > 10MHz; tR < 5ns ; tF < 5ns +3V DR IV E R INP UT 1.5V 0V A DR IV E R O UT P UT DIF F E R E NT IAL O UT P UT VB - VA 1.5V tPLH tPHL V O 1/2V O 1/2V O B tDPLH V O+ 0V VO- tDPHL tR tF tSKEW = | tDPLH - tDPHL | Figure 35. Driver Propagation Delays Mx or T x_ E nable f = 1MHz; tR 10ns ; tF 10ns +3V 1.5V 0V A, B 1.5V tZL 5V 2.3V V OL V OH A, B 2.3V 0V tLZ O utput normally L O W 0.5V O utput normally H IG H 0.5V tZH tHZ Figure 36. Driver Enable and Disable Times f > 10MHz; tR < 5ns ; tF < 5ns V 0D2 + A-B 0V V 0D2 - R E C E IVE R O UT O UT P UT V OH V OL 0V INP UT (V OH - V OL )/2 (V OH - V OL )/2 tPLH tPHL tSKEW = | tPHL - tPLH | Figure 37. Receiver Propagation Delays Exar Corporation 48720 Kato Road, Fremont CA, 94538 * (510)668-7017 * www.exar.com 21 SP3508_100_072208 DE C x +3V R x ENABLE 0V +3.3V R E C E IVE R O UT V IL f = 1MHz; tR < 10ns ; tF < 10ns 1.5V 1.5V tZL 1.5V V IH R E C E IVE R O UT 0V 1.5V tLZ O utput normally L O W 0.5V O utput normally H IG H 0.5V tZH tHZ Figure 38. Receiver Enable and Disable Times T x_ E nable +3V 0V 0V T OUT V OL +3V T x_ E nable T OUT 0V V OH f = 60kH z; tR < 10ns ; tF < 10ns 1.5V 1.5V tLZ tZL V OL - 0.5V O utput LO W V OL - 0.5V f = 60kH z; tR < 10ns ; tF < 10ns 1.5V 1.5V tZH O utput HIG H tHZ V OH - 0.5V 0V Figure 39. V.28 (RS-232) and V.10 (RS-423) Driver Enable and Disable Times Exar Corporation 48720 Kato Road, Fremont CA, 94538 * (510)668-7017 * www.exar.com 22 SP3508_100_072208 Figure 40. Typical V.10 Driver Output Waveform. Figure 41. Typical V.11 Driver Output Waveform. Figure 42. Typical V.28 Driver Output Waveform. Figure 43. Typical V.35 Driver Output Waveform. Exar Corporation 48720 Kato Road, Fremont CA, 94538 * (510)668-7017 * www.exar.com 23 SP3508_100_072208 (See pinout assignments for +3.3V (decoupling capacitor not shown) GND and VCC pins) C1 C2 1mF 1mF CVDD 1mF VCC +3.3V 76 VDD 74 C1+ 70 C1- 72 C2+ Regulated Charge Pump 69 C2- C3+ C3VSS1 24 26 1mF 68 1mF 29 AVCC Inverter VSS2 27 1mF CVSS1 CVSS2 31 50 RD(a) C3 TxD 97 RxD RDEN SD(a) 39 10 99 RD(b) 49 2 RT(a) 52 32 SD(b) SDEN TxCE 93 RxC RTEN TT(a) 40 11 95 RT(b) 51 3 TxC(a) 55 33 TT(b) TTEN ST 89 TxC TxCEN ST(a) 41 12 91 TxC(b) 53 4 CS(a) 57 34 ST(b) STEN RTS 81 CTS CSEN RS(a) 42 13 83 CS(b) 56 5 DM(a) 59 35 RS(b) RSEN DTR 85 DSR DMEN 14 87 DM(b) 58 6 RRT(a) 62 36 DCD_DTE RRTEN RRT(b) RI ICEN TR(b) TREN DCD_DCE 79 44 15 RRC(a) 77 61 RRC(b) 7 63 IC TR(a) 43 RRCEN 37 45 RL 67 16 RL(a) 8 64 TM(a) TM TMEN RLEN 38 46 LL 65 17 LL(a) 9 18 19 20 21 RECEIVER TERMINATION NETWORK V.35 MODE V.11 MODE 51ohms 22 30 D0 D1 D2 SP3508 V.10-GND AGND LLEN 60 28 D-LATCH TERM-OFF LOOPBACK GND V.35 DRIVER TERMINATION NETWORK 124ohms 51ohms RX ENABLE V.35 MODE 51ohms 124ohms TX ENABLE 51ohms Figure 44. Functional Diagram Exar Corporation 48720 Kato Road, Fremont CA, 94538 * (510)668-7017 * www.exar.com 24 SP3508_100_072208 FEATURES The SP3508 contains highly integrated serial transceivers that offer programmability between interface modes through software control. The SP3508 offers the hardware interface modes for RS-232 (V.28), RS449/V.36 (V.11 and V.10), EIA-530 (V.11 and V.10), EIA-530A (V.11 and V.10), V.35 (V.35 and V.28) and X.21(V.11). The interface mode selection is done via three control pins, which can be latched via microprocessor control. There are four basic types of driver circuits - ITU-T-V.28 (RS-232), ITU-T-V.10 (RS-423), ITU-T-V.11 (RS-422), and CCITT-V.35. The SP3508 has eight drivers, eight receivers, and a patented on-board charge pump (5,306,954) that is ideally suited for wide area network connectivity and other multiprotocol applications. Other features include digital and line loopback modes, individual enable/disable control lines for each driver and receiver, fail-safe when inputs are either open or shorted. The RS-423 (V.10) drivers are also singleended signals which produce open circuit VOL and VOH measurements of +4.0V to +6.0V. When terminated with a 450 load to ground, the driver output will not deviate more than 10% of the open circuit value. This is in compliance of the ITU V.10 specification. The V.10 (RS-423) drivers are used in RS-449/V.36, EIA-530, and EIA-530A modes as Category II signals from each of their corresponding specifications. The V.10 driver can transmit over 120Kbps if necessary. The V.28 (RS-232) drivers output singleended signals with a minimum of +5V (with 3k & 2500pF loading), and can operate over 120kbps. Since the SP3508 uses a charge pump to generate the RS-232 output rails, the driver outputs will never exceed +10V. The V.28 driver architecture is similar to Sipex's standard line of RS-232 transceivers. THEORY OF OPERATION The SP3508 device is made up of The third type of drivers are V.11 (RS-422) differential drivers. Due to the nature of differential signaling, the drivers are more immune to noise as opposed to single-ended transmission methods. The advantage is evident over high speeds and long transmission lines. The strength of the driver outputs can produce differential signals that can maintain +2V differential output levels with a load of 100. The strength allows the SP3508 differential driver to drive over long cable lengths with minimal signal degradation. The V.11 drivers are used in RS-449, EIA-530, EIA-530A and V.36 modes as Category I signals which are used for clock and data. Exar's new driver design over its predecessors allow the SP3508 to operate over 20Mbps for differential transmission. 1) the drivers 2) the receivers 3) charge pumps 4) DTE/DCE switching algorithm 5) control logic. Drivers The SP3508 has eight enhanced independent drivers. Control for the mode selection is done via a three-bit control word into D0, D1, and D2. The drivers are prearranged such that for each mode of operation, the relative position and functionality of the drivers are set up to accommodate the selected interface mode. As the mode of the drivers is changed, the electrical characteristics will change to support the required signal levels. The mode of each driver in the different interface modes that can be selected is shown in Table 1. The fourth type of drivers are V.35 differential drivers. There are only three available on the SP3508 for data and clock (TxD, TxCE, and TxC in DCE mode). Exar Corporation 48720 Kato Road, Fremont CA, 94538 * (510)668-7017 * www.exar.com 25 SP3508_100_072208 FEATURES interface modes that can be selected. There are two basic types of receiver circuits--ITU-T-V .28 (RS-232) and ITU-T-V.11, (RS-422). These drivers are current sources that drive loop current through a differential pair resulting in a 550mV differential voltage at the receiver. These drivers also incorporate fixed termination networks for each driver in order to set the VOH and VOL depending on load conditions. This termination network is basically a "Y" configuration consisting of two 51 resistors connected in series and a 124 resistor connected between the two 50 resistors to GND. Filtering can be done on these pins to reduce common mode noise transmitted over the transmission line by connecting a capacitor to ground. The RS-232 (V.28) receiver is single-ended and accepts RS-232 signals from the RS232 driver. The RS-232 receiver has an operating input voltage range of +15V and can receive signals downs to +3V. The input sensitivity complies with RS-232 and V.28 at +3V. The input impedance is 3k to 7k in accordance to RS-232 and V.28. The receiver output produces a TTL/CMOS signal with a +2.4V minimum for a logic "1" and a +0.4V maximum for a logic "0". The RS-232 (V.28) protocol uses these receivers for all data, clock and control signals. They are also used in V.35 mode for control line signals: CTS, DSR, LL, and RL. The RS-232 receivers can operate over 120kbps. The drivers also have separate enable pins which simplifies half-duplex configurations for some applications, especially programmable DTE/DCE. The enable pins will either enable or disable the output of the drivers according to the appropriate active logic illustrated on Figure 44. The enable pins have internal pull-up and pull-down devices, depending on the active polarity of the receiver, that enable the driver upon power-on if the enable lines are left floating. During disabled conditions, the driver outputs will be at a high impedance 3-state. The second type of receiver is a differential type that can be configured internally to support ITU-T-V.10 and CCITT-V.35 depending on its input conditions. This receiver has a typical input impedance of 10k and a differential threshold of less than +200mV, which complies with the ITU-T-V.11 (RS-422) specifications. V.11 receivers are used in RS-449/V.36, EIA-530, EIA-530A and X.21 as Category I signals for receiving clock, data, and some control line signals not covered by Category II V.10 circuits. The differential V.11 transceiver has improved architecture that allows over 20Mbps transmission rates. The driver inputs are both TTL or CMOS compatible. All driver inputs have an internal pull-up resistor so that the output will be at a defined state at logic LOW ("0"). Unused driver inputs can be left floating. The internal pull-up resistor value is approximately 500k. Receivers The SP3508 has eight enhanced independent receivers. Control for the mode selection is done via a three-bit control word that is the same as the driver control word. Therefore, the modes for the drivers and receivers are identical in the application. Like the drivers, the receivers are prearranged for the specific requirements of the synchronous serial interface. As the operating mode of the receivers is changed, the electrical characteristics will change to support the required serial interface protocols of the receivers. Table 1 shows the mode of each receiver in the different Receivers dedicated for data and clock (RxD, RxC, TxC) incorporate internal termination for V.11. The termination resistor is typically 120 connected between the A and B inputs. The termination is essential for minimizing crosstalk and signal reflection over the transmission line . The minimum value is guaranteed to exceed 100, thus complying with the V.11 and RS-422 specifications. This resistor is invoked when the receiver is operating as a V.11 receiver, in modes EIA-530, EIA-530A, RS-449/V.36, and X.21. Exar Corporation 48720 Kato Road, Fremont CA, 94538 * (510)668-7017 * www.exar.com 26 SP3508_100_072208 FEATURES are open, terminated but open, or shorted together. For single-ended V.28 and V.10 receivers, there are internal 5k pull-down resistors on the inputs which produces a logic high ("1") at the receiver outputs. The differential receivers have a proprietary circuit that detect open or shorted inputs and if so, will produce a logic HIGH ("1") at the receiver output. The same receivers also incorporate a termination network internally for V.35 applications. For V.35, the receiver input termination is a "Y" termination consisting of two 51 resistors connected in series and a 124 resistor connected between the two 50 resistors and GND. The receiver itself is identical to the V.11 receiver. The differential receivers can be configured to be ITU-T-V.10 single-ended receivers by internally connecting the non-inverting input to ground. This is internally done by default from the decoder. The non-inverting input is rerouted to V10GND and can be grounded separately. The ITU-T-V.10 receivers can operate over 120Kbps and are used in RS449/V.36, E1A-530, E1A-530A and X.21 modes as Category II signals as indicated by their corresponding specifications. All receivers include an enable/disable line for disabling the receiver output allowing convenient half-duplex configurations. The enable pins will either enable or disable the output of the receivers according to the appropriate active logic illustrated on Figure 44. The receiver's enable lines include an internal pull-up or pull-down device, depending on the active polarity of the receiver, that enables the receiver upon power up if the enable lines are left floating. During disabled conditions, the receiver outputs will be at a high impedance state. If the receiver is disabled any associated termination is also disconnected from the inputs. CHARGE PUMP SP3508 uses an internal capacitive charge pump to generate Vdd and Vss. The design is a patented (5,306,954) four-phased voltage shifting charge pump converters that converts the input voltage of 3.3V to nominal output voltages of +/-6V (Vdd & Vss1). SP3508 also includes an inverter block that inverts Vcc to -Vcc (Vss2). There is a free-running oscillator that controls the four phases of the voltage shifting. A description of each phase follows. 4-phased doubler pump Phase 1 -VSS1 charge storage -During this phase of the clock cycle, the positive side of capacitors C1 and C2 are initially charged to VCC. C1+ is then switched to ground and the charge in C1- is transferred to C2-. Since C2+ is connected to VCC, the voltage potential across capacitor C2 is now 2xVCC. All receivers include a fail-safe feature that outputs a logic high when the receiver inputs V CC = +3V C VDD +3V C1 + - -3 V C2 + - -3 V + - - + V DD S tora ge C apacitor V SS1 S tora ge C apacitor C VSS1 Figure 45. Charge Pump - Phase 1. Exar Corporation 48720 Kato Road, Fremont CA, 94538 * (510)668-7017 * www.exar.com 27 SP3508_100_072208 FEATURES Phase 2 -VSS1 transfer -Phase two of the clock connects the negative terminal of C2 to the VSS1 storage capacitor and the positive terminal of C2 to ground, and transfers the negative generated voltage to CVSS1. This generated voltage is regulated to -5.5V. Simultaneously, the positive side of the capacitor C1 is switched to VCC and the negative side is connected to ground. V CC = +3V C VDD + C1 - + C2 - -6 V + - - + V DD S tora ge C apacitor V SS S tora ge C apacitor C VSS1 Figure 46. Charge Pump - Phase 2. Phase 3 -VDD charge storage -The third phase of the clock is identical to the first phase-the charge transferred in C1 produces -VCC in the negative terminal of C1 which is applied to the negative side of the capacitor C2. Since C2+ is at VCC, the voltage potential across C2 is 2xVCC. V CC = +3V +3V C1 + - -3 V C2 + - -3 V C VDD + - - + V DD S tora ge C apacitor V SS1 S tora ge C apacitor C VSS1 Figure 47.Charge Pump - Phase 3. Phase 4 -VDD transfer -The fourth phase of the clock connects the negative terminal of C2 to ground, and transfers the generated 5.5V across C2 to CVDD, the VDD storage capacitor. This voltage is regulated to +5.5V. At the regulated voltage, the internal oscillator is disabled and simultaneously with this, the positive side of capacitor C1 is switched to VCC and the negative side is connected to ground, and the cycle begins again. The charge pump cycle will continue as long as the operational conditions for the internal oscillator are present. Since both V+ and V- are separately generated from VCC; in a no-load condition V+ and V- will be symmetrical. Older charge pump approaches that generate V- from V+ will show a decrease in the magnitude of V- compared to V+ due to the inherent inefficiencies in the design. The clock rate for the charge pump typically operates at 250kHz. The external capacitors can be as low as 1F with a 16V breakdown voltage rating. Exar Corporation 48720 Kato Road, Fremont CA, 94538 * (510)668-7017 * www.exar.com 28 SP3508_100_072208 FEATURES V CC = +3V C VDD +6V C1 + C2 - + - + - - + V DD S tora ge C apacitor V SS1 S tora ge C apacitor C VSS1 Figure 48. Charge Pump - Phase 4. 2-phased inverter pump Phase 1 Please refer to figure below: In the first phase of the clock cycle, switches S2 and S4 are opened and S1 and S3 closed. This connects the flying capacitor, C3, from Vin to ground. C3 charge up to the input voltage applied at Vcc. Phase 2 In the second phase of the clock cycle, switches S2 and S4 are closed and S1 and S3 are opened. This connects the flying capacitor, C3, in parallel with the output capacitor, CVSS2. The Charge stored in C3 is now transferred to CVSS2. Simultaneously, the negative side of CVSS2 is connected to Vss2 and the positive side is connected to ground. With the voltage across CVSS2 smaller than the voltage across C3, the charge flows from C3 to CVSS2 until the voltage at the Vss2 equals -Vcc. V SS2 = -V CC V CC S1 C3 + S2 + C VSS2 S4 S3 V SS2 Figure 49. Circuit for an Ideal Voltage Inverter. Exar Corporation 48720 Kato Road, Fremont CA, 94538 * (510)668-7017 * www.exar.com 29 SP3508_100_072208 Recommended Signals and Port Pin Assignments DCE Configuration V.28 V.28 V.28 V.28 V.28 TM CE CF CC CB DB DD 25 22 8 6 5 15 17 V.10 BA(A) BA(B) DA(A) DA(B) TM 2 12 24 11 25 V.11 V.11 V.11 V.11 V.11 V.11 V.11 V.11 V.10 RL RS(A) RS(B) TR(A) TR(B) SD(A) SD(B) TT(A) TT(B) TM 10 14 7 25 12 30 4 22 17 35 18 V.28 V.28 V.28 V.28 V.35 V.35 V.35 V.35 V.28 V.28 V.28 V.28 141 140 108 105 103 103 113 113 142 125 109 107 L N H C P S U W NN J F E V.11 V.11 V.11 V.11 V.11 V.11 C(A) C(B) T(A) T(B) X(A) X(B) 3 10 2 9 7** 14** RS-232 or V.24 Signal Mnemo DB-25 Type nic Pin(F) V.28 BB 3 V.28 2 V.11 V.11 V.11 V.11 4 19 20 23 V.10 LL X.21 Mnemo DB-15 nic Pin(F) R(A) 4 R(B) 11 B(A) 7** B(B) 14** S(A) 6 S(B) 13 I(A) 5 I(B) 12 V.28 BA 24 CA(A) CA(B) CD(A) CD(B) 21 V.10 Signal Type V.11 V.11 V.11 V.11 V.11 V.11 V.11 V.11 V.28 DA 4 V.11 V.11 V.11 V.11 RL 18 V.35 Mnemo M34 nic Pin(F) 104 R 104 T 115 V 115 X 114 Y 114 AA 106 D V.28 CA 20 V.10 LL Signal Type V.35 V.35 V.35 V.35 V.35 V.35 V.28 V.28 CD 21 V.10 RS-449 Mnemo DB-37 nic Pin(F) RD(A) 6 RD(B) 24 RT(A) 8 RT(B) 26 ST(A) 5 ST(B) 23 CS(A) 9 CS(B) 27 DM(A) 11 DM(B) 29 RR(A) 13 RR(B) 31 65 V.28 RL 18 Signal Type V.11 V.11 V.11 V.11 V.11 V.11 V.11 V.11 V.11 V.11 V.11 V.11 LL(A) Pin Mnemonic SD(A) SD(B) TT(A) TT(B) ST(A) ST(B) RS(A) RS(B) TR(A) TR(B) RRC(A) RRC(B) RL(A) V.28 LL EIA-530 Mnemo DB-25 nic Pin(F) BB(A) 3 BB(B) 16 DD(A) 17 DD(B) 9 DB(A) 15 DB(B) 12 CB(A) 5 CB(B) 13 CC(A) 6 CC(B) 22 CF(A) 8 CF(B) 10 Driver_7 50 49 52 51 55 53 57 56 59 58 62 61 63 V.28 Signal Type V.11 V.11 V.11 V.11 V.11 V.11 V.11 V.11 V.11 V.11 V.11 V.11 Driver_8 RD(A) RD(B) RT(A) RT(B) TxC(A) TxC(B) CS(A) CS(B) DM(A) DM(B) RRT(A) RRT(B) IC 64 Receiver_6 Receiver_5 Receiver_4 Receiver_3 Receiver_2 Receiver_1 Receiver_7 TM(A) ** X.21 use either B() or X(), not both Receiver_8 Pin assignments and signal functions are subject to national or regional variation and proprietary / non-standard implementations 30 SP3508 Multiprotocol Configured as DCE Interface to PortConnector Pin Circuit Number Driver_1 97 99 Driver_2 93 95 Driver_3 89 91 Driver_4 81 83 Driver_5 85 87 Driver_6 79 77 67 Interface to System Logic Pin Number Pin Mnemonic 31 TxD 2 SDEN 32 TxCE 3 TTEN 33 ST 4 STEN 34 RTS 5 RSEN 35 DTR 6 TREN 36 DCD_DCE 7 RRCEN 37 RL 8 RLEN 38 LL 9 LLEN# 39 RxD 10 RDEN# 40 RxC 11 RTEN# 41 TxC 12 TxCEN# 42 CTS 13 CSEN# 43 DSR 14 DMEN# 44 DCD_DTE 15 RRTEN# 45 RI 16 ICEN# 46 TM 17 TMEN Spare drivers and receivers may be used for optional signals (Signal Quality, Rate Detect, Standby) or may be disabled using individual enable pins for each driver and receiver SP3508_100_072208 Exar Corporation 48720 Kato Road, Fremont CA, 94538 * (510)668-7017 * www.exar.com Circuit Driver_1 Driver_2 Driver_3 Driver_4 Driver_5 Driver_6 RS-232 or V.24 EIA-530 Recommended Signals and Port Pin Assignments Signal Mnemo DB-25 Type nic Pin(M) V.28 BA 2 RS-449 Signal Type V.35 V.35 V.35 V.35 X.21 C(A) C(B) 4 11 7** 14** 6 13 5 12 3 10 Mnemo DB-15 nic Pin(M) T(A) 2 T(B) 9 X(A) 7** X(B) 14** V.11 V.11 R(A) R(B) B(A) B(B) S(A) S(B) I(A) I(B) ** X.21 use either B() or X(), not both V.11 V.11 V.11 V.11 V.11 V.11 V.11 V.11 Signal Type V.11 V.11 V.11 V.11 DtE Configuration V.35 Mnemo M34 nic Pin(M) 103 P 103 S 113 U 113 W Mnemo DB-37 nic Pin(M) SD(A) 4 SD(B) 22 TT(A) 17 TT(B) 35 Mnemo DB-25 nic Pin(M) BA(A) 2 BA(B) 12 DA(A) 24 DA(B) 11 Signal Type V.11 V.11 V.11 V.11 Signal Type V.11 V.11 V.11 V.11 C 24 H DA 105 V.28 108 4 V.28 CA V.28 V.28 7 25 12 30 4 19 20 23 RS(A) RS(B) TR(A) TR(B) CA(A) CA(B) CD(A) CD(B) V.11 V.11 V.11 V.11 V.11 V.11 V.11 V.11 N 20 140 CD V.28 V.28 14 V.10 RL 21 L RL V.28 141 V.10 Pin Number 97 99 93 95 89 91 81 83 85 87 79 77 67 V.28 21 Pin Mnemonic SD(A) SD(B) TT(A) TT(B) ST(A) ST(B) RS(A) RS(B) TR(A) TR(B) RRC(A) RRC(B) RL(A) 10 RL Driver_7 LL LL BB R T V X Y AA D V.10 V.28 17 Receiver_2 104 104 115 115 114 114 106 E 18 V.28 DD 15 Receiver_3 V.35 V.35 V.35 V.35 V.35 V.35 V.28 107 LL 65 V.28 DB 5 Receiver_4 V.28 J F V.10 LL(A) V.28 CB 6 Receiver_5 109 NN 125 142 V.28 V.28 V.28 3 Driver_8 V.28 CC 8 18 Receiver_1 V.28 22 6 24 8 26 5 23 9 27 11 29 13 31 CF RD(A) RD(B) RT(A) RT(B) ST(A) ST(B) CS(A) CS(B) DM(A) DM(B) RR(A) RR(B) CE V.11 V.11 V.11 V.11 V.11 V.11 V.11 V.11 V.11 V.11 V.11 V.11 V.28 3 16 17 9 15 12 5 13 6 22 8 10 V.28 BB(A) BB(B) DD(A) DD(B) DB(A) DB(B) CB(A) CB(B) CC(A) CC(B) CF(A) CF(B) 50 49 52 51 55 53 57 56 59 58 62 61 63 V.11 V.11 V.11 V.11 V.11 V.11 V.11 V.11 V.11 V.11 V.11 V.11 RD(A) RD(B) RT(A) RT(B) TxC(A) TxC(B) CS(A) CS(B) DM(A) DM(B) RRT(A) RRT(B) IC Receiver_6 18 Receiver_7 TM 25 V.10 TM 25 V.28 TM 64 V.10 TM(A) Pin assignments and signal functions are subject to national or regional variation and proprietary / non-standard implementations Receiver_8 SP3508 Multiprotocol Configured as DTE Interface to PortConnector Pin Mnemonic TxD SDEN TxCE TTEN ST STEN RTS RSEN DTR TREN DCD_DCE RRCEN RL RLEN LL LLEN# RxD RDEN# RxC RTEN# TxC TxCEN# CTS CSEN# DSR DMEN# DCD_DTE RRTEN# RI ICEN# TM TMEN Interface to System Logic Pin Number 31 2 32 3 33 4 34 5 35 6 36 7 37 8 38 9 39 10 40 11 41 12 42 13 43 14 44 15 45 16 46 17 Spare drivers and receivers may be used for optional signals (Signal Quality, Rate Detect, Standby) or may be disabled using individual enable pins for each driver and receiver 31 SP3508_100_072208 Exar Corporation 48720 Kato Road, Fremont CA, 94538 * (510)668-7017 * www.exar.com FEATURES There are internal pull-up devices on D0, D1 and D2, which allow the device to be in SHUTDOWN mode ("111") upon power up. However, if the device is powered-up with the D_LATCH at a logic HIGH, the decoder state of the SP3508 will be undefined. TERM_OFF FUNCTION The SP3508 contains a TERM_OFF pin that disables all three receiver input termination networks regardless of mode. This allows the device to be used in monitor mode applications typically found in networking test equipment. CTR1/CTR2 EUROPEAN COMPLIANCY The TERM_OFF pin internally contains a pull-down device with an impedance of over 500k, which will default in a "ON" condition during power-up if V.35 receivers enable line and the SHUTDOWN mode from the decoder will disable the termination regardless of TERM_OFF. As with all of Exar's previous multi-protocol serial transceiver IC's the drivers and receivers have been designed to meet all the requirements to NET1/NET2 and TBR2 in order to meet CTR1/CTR2 compliancy. The SP3508 is also tested in-house at Exar and adheres to all the NET1/2 physical layer testing and the ITU Series V specifications before shipment. Please note that although the SP3508, as with its predecessors, adhere to CRT1/CTR2 compliancy testing, any complex or usual configuration should be double-checked to ensure CTR1/CTR2 compliance. Consult the factory for details. LOOPBACK FUNCTION The SP3508 contains a LOOPBACK pin that invokes a loopback path. This loopback path is illustrated in Figure 50. LOOPBACK has an internal pull-up resistor that defaults to normal mode during power up or if the pin is left floating. During loopback, the driver output and receiver input characteristics will still adhere to its appropriate specifications. DECODER AND D_LATCH FUNCTION The SP3508 contains a D_LATCH pin that latches the data into the D0, D1 and D2 decoder inputs. If tied to a logic LOW ("0"), the latch is transparent, allowing the data at the decoder inputs to propagate through and program the SP3508 accordingly. If tied to a logic HIGH ("1"), the latch locks out the data and prevents the mode from changing until this pin is brought to a logic LOW. Exar Corporation 48720 Kato Road, Fremont CA, 94538 * (510)668-7017 * www.exar.com 32 SP3508_100_072208 97 TxD 99 50 RxD 39 49 93 TxCE 95 40 51 89 ST 91 41 53 81 RTS 83 42 56 85 DTR DSR RL RI LL TM TT(b) RT(a) RT(b) ST(a) ST(b) TxC(a) TxC(b) RS(a) RS(b) CS(a) CS(b) TR(a) 87 TR(b) 59 DM(a) 43 58 36 77 62 DCD_DTE TT(a) 35 79 DCD_DCE RD(b) 34 57 CTS RD(a) 33 55 TxC SD(b) 32 52 RxC SD(a) 31 44 61 37 67 45 63 38 65 46 64 DM(b) RRC(a) RRC(b) RR T(a) RR T(b) RL(a) IC LL(a) TM(a) Figure 50. Loopback Path Exar Corporation 48720 Kato Road, Fremont CA, 94538 * (510)668-7017 * www.exar.com 33 SP3508_100_072208 +3.3V CVDD C1 C2 1mF 1mF 1mF 10mF 76 74 VDD VCC C1+ 70 72 C3- 26 VSS1 +3.3V Charge Pump Section VSS2 29 AV CC 31 TxD 32 TxCE 33 ST 34 RTS 35 27 1mF C3 CVSS1 mDB-26 Serial Port Connector Pins CVSS2 SD(b) 99 TT(a) 93 TT(b) 95 ST(a) 89 ST(b) 91 RS(a) 81 RS(b) 83 TR(a) 85 DTR TR(b) 87 RRC(a) 79 Signal (DTE_DCE) 2 (V.11, V.35, V.28) 14 (V.11, V.35) 24 (V.11, V.35, V.28) 11 (V.11, V.35) TXD_RXD_A TXD_RXD_B TXCE_TXC_A TXCE_TXC_B 4 (V.11, V.28) 19 (V.11) 20 (V.11, V.28) 23 (V.11) RTS_CTS_A RTS_CTS_B DTR_DSR_A DTR_DSR_B RRC(b) 77 37 RL RL(a) 67 21 (V.10, V.28) RL_RI 38 LL LL(a)65 18 (V.10, V.28) LL_TM 39 RxD RD(a) 50 40 RxC RT(a) 52 RT(b) 51 41 TxC TxC(a) 55 TxC(b) 53 42 CTS CS(a) 57 CS(b) 56 DSR DM(a) 59 DM(b) 58 3 (V.11, V.35, V.28) 16 (V.11, V.35) 17 (V.11, V.35, V.28) 9 (V.11, V.35) 15 (V.11, V.35, V.28) 12 (V.11, V.35) 5 (V.11, V.28) 13 (V.11) 6 (V.11, V.28) 22 (V.11) 8 (V.11, V.28) 10 (V.11) RXD_TXD_A RXD_TXD_B RXC_TXCE_A RXC_TXCE_B *TXC_RXC_A *TXC_RXC_B CTS_RTS_A CTS_RTS_B DSR_DTR_A DSR_DTR_B DCD_DCD_A DCD_DCD_B 22 (V.10, V.28) RI_RL 25 (V.10, V.28) LL_TM 43 RD(b) 49 RRT(a) 62 44 DCD_DTE +3.3V 68 Transceiver Section SD(a) 97 36 DCD_DCE DCE/DTE 69 C1- C2+ C2-C3+ 24 RRT(b) 61 45 RI IC 63 46 TM TM(a) 64 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 SDEN TTEN STEN RSEN TREN RRCEN RLEN LLEN RDEN RTEN TxCEN CSEN DMEN RRTEN ICEN TMEN Logic Section D0 SP3508CF D1 D2 D_LATCH TERM_OFF LOOPBACK AGND 18 19 20 21 22 30 +3.3V * - Driver applies for DCE only on pins Receiver applies for DTE only on pins Driver applies for DCE only on pins 8 Receiver applies for DTE only on pins 28 GND 15 and 12. 15 and 12. and 10. 8 and 10. Input Line Output Line I/O Lines represented by double arrowhead signifies a bi-directional bus. Figure 51. SP3508 Typical Operating Configuration to Serial Port Connector with DCE/DTE programmability Exar Corporation 48720 Kato Road, Fremont CA, 94538 * (510)668-7017 * www.exar.com 34 SP3508_100_072208 PACKAGE: 100 Pin LQFP Exar Corporation 48720 Kato Road, Fremont CA, 94538 * (510)668-7017 * www.exar.com 35 SP3508_100_072208 ORDERING INFORMATION Part Number Temperature Range Package Types SP3508CF-L............................................ 0C to +70C................................................... 100-pin JEDEC LQFP SP3508EF-L......................................... -40C to +85C................................................... 100-pin JEDEC LQFP REVISION HISTORY Date Revision 1/12/04 A Description Implemented Tracking revision 2/27/04 B Included Diamond column in spec table inidcating which specs apply over full operating temperature range. Correct typo to Fig. 51 pin 61 and 62. 3/31/04 C Corrected max dimension for symbol c on LQFP package outline 6/03/04 D Added table to page 27 and 28 10/12/04 E Certified conformance to NET1/NET2 and TBR-1/TBR-2 TUV by TUV Rheinland (Test report # TBR2/30451940.001/04) 10/29/04 F Corrected V.28 Driver Open circuit values, pages 27 and 28 -- both for DCE and DTE that BA(B) should connect to pin 14. 7/17/08 1.0.0 Change Revision format from letter code to number code. Change Logo, footnote and notice statement from Sipex to Exar. Add TJ limits to Absolute Maximum Ratings. Change propagation delay limit specification for V.11 and V.35 Driver/Receiver from 60ns Maximum to 85ns Maximum. Update ordering information to show only RoHS packaging (-L) is available. Notice EXAR Corporation reserves the right to make changes to any products contained in this publication in order to improve design, performance or reliability. EXAR Corporation assumes no representation that the circuits are free of patent infringement. Charts and schedules contained herein are only for illustration purposes and may vary depending upon a user's specific application. While the information in this publication has been carefully checked; no responsibility, however, is assumed for inaccuracies. EXAR Corporation does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless EXAR Corporation receives, in writting, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized ; (b) the user assumes all such risks; (c) potential liability of EXAR Corporation is adequately protected under the circumstances. Copyright 2008 EXAR Corporation Datasheet July 2008 Send your Interface technical inquiry with technical details to: uarttechsupport@exar.com Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited. Exar Corporation 48720 Kato Road, Fremont CA, 94538 * (510)668-7017 * www.exar.com 36 SP3508_100_072208